void mdp4_dtv_wait4vsync(int cndx)
{
	struct vsycn_ctrl *vctrl;
	struct mdp4_overlay_pipe *pipe;
	int ret;

	if (cndx >= MAX_CONTROLLER) {
		pr_err("%s: out or range: cndx=%d\n", __func__, cndx);
		return;
	}

	vctrl = &vsync_ctrl_db[cndx];
	pipe = vctrl->base_pipe;

	if (atomic_read(&vctrl->suspend) > 0)
		return;
	
	mdp4_dtv_vsync_irq_ctrl(cndx, 1);

	ret = wait_event_interruptible_timeout(vctrl->wait_queue, 1,
			msecs_to_jiffies(VSYNC_PERIOD * 8));
	if (ret <= 0)
		pr_err("%s timeout ret=%d", __func__, ret);

	mdp4_dtv_vsync_irq_ctrl(cndx, 0);
	mdp4_stat.wait4vsync1++;
}
Exemplo n.º 2
0
void mdp4_dtv_wait4vsync(int cndx)
{
	struct vsycn_ctrl *vctrl;
	struct mdp4_overlay_pipe *pipe;
	unsigned long flags;

	if (cndx >= MAX_CONTROLLER) {
		pr_err("%s: out or range: cndx=%d\n", __func__, cndx);
		return;
	}

	vctrl = &vsync_ctrl_db[cndx];
	pipe = vctrl->base_pipe;

	if (atomic_read(&vctrl->suspend) > 0)
		return;

	mdp4_dtv_vsync_irq_ctrl(cndx, 1);

	spin_lock_irqsave(&vctrl->spin_lock, flags);

	if (vctrl->wait_vsync_cnt == 0)
		INIT_COMPLETION(vctrl->vsync_comp);
	vctrl->wait_vsync_cnt++;
	spin_unlock_irqrestore(&vctrl->spin_lock, flags);

	wait_for_completion(&vctrl->vsync_comp);
	mdp4_dtv_vsync_irq_ctrl(cndx, 0);
	mdp4_stat.wait4vsync1++;
}
Exemplo n.º 3
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void mdp4_dtv_vsync_ctrl(struct fb_info *info, int enable)
{
	struct vsycn_ctrl *vctrl;
	int cndx = 0;

	vctrl = &vsync_ctrl_db[cndx];

	if (!external_common_state->hpd_state)
		wake_up_interruptible_all(&vctrl->wait_queue);

	if (vctrl->vsync_irq_enabled == enable)
		return;

	pr_debug("%s: vsync enable=%d\n", __func__, enable);

	vctrl->vsync_irq_enabled = enable;

	mdp4_dtv_vsync_irq_ctrl(cndx, enable);
}
Exemplo n.º 4
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void mdp4_dtv_vsync_ctrl(struct fb_info *info, int enable)
{
    struct vsycn_ctrl *vctrl;
    int cndx = 0;

    vctrl = &vsync_ctrl_db[cndx];

    if (!external_common_state->hpd_state)
        complete_all(&vctrl->vsync_comp);

    if (vctrl->vsync_irq_enabled == enable)
        return;

    pr_debug("%s: vsync enable=%d\n", __func__, enable);

    vctrl->vsync_irq_enabled = enable;

    mdp4_dtv_vsync_irq_ctrl(cndx, enable);

    if (vctrl->vsync_irq_enabled &&  atomic_read(&vctrl->suspend) == 0)
        atomic_set(&vctrl->vsync_resume, 1);
}