int mdp4_dsi_video_on(struct platform_device *pdev)
{
int dsi_width;
int dsi_height;
int dsi_bpp;
int dsi_border_clr;
int dsi_underflow_clr;
int dsi_hsync_skew;
int hsync_period;
int hsync_ctrl;
int vsync_period;
int display_hctl;
int display_v_start;
int display_v_end;
int active_hctl;
int active_h_start;
int active_h_end;
int active_v_start;
int active_v_end;
int ctrl_polarity;
int h_back_porch;
int h_front_porch;
int v_back_porch;
int v_front_porch;
int hsync_pulse_width;
int vsync_pulse_width;
int hsync_polarity;
int vsync_polarity;
int data_en_polarity;
int hsync_start_x;
int hsync_end_x;
uint8 *buf;
unsigned int buf_offset;
int bpp;
struct fb_info *fbi;
struct fb_var_screeninfo *var;
struct msm_fb_data_type *mfd;
struct mdp4_overlay_pipe *pipe;
int ret = 0;
int cndx = 0;
struct vsycn_ctrl *vctrl;
struct msm_panel_info *pinfo;
vctrl = &vsync_ctrl_db[cndx];
mfd = (struct msm_fb_data_type *)platform_get_drvdata(pdev);
pinfo = &mfd->panel_info;
if (!mfd)
return -ENODEV;
if (mfd->key != MFD_KEY)
return -EINVAL;
mutex_lock(&mfd->dma->ov_mutex);
vctrl->mfd = mfd;
vctrl->dev = mfd->fbi->dev;
vctrl->blt_ctrl = pinfo->lcd.blt_ctrl;
vctrl->vsync_irq_enabled = 0;
vsync_irq_cnt = 0;
/* mdp clock on */
mdp_clk_ctrl(1);
fbi = mfd->fbi;
var = &fbi->var;
pipe = mdp4_dsi_video_alloc_base_pipe();
if (IS_ERR_OR_NULL(pipe)) {
mutex_unlock(&mfd->dma->ov_mutex);
return -EPERM;
}
if (mfd->panel_info.pdest == DISPLAY_4)
mdp4_overlay_panel_mode(MDP4_PANEL_DSI_VIDEO_DMA_S,
pipe->mixer_num);
else
mdp4_overlay_panel_mode(MDP4_PANEL_DSI_VIDEO, pipe->mixer_num);
bpp = fbi->var.bits_per_pixel / 8;
buf = (uint8 *) fbi->fix.smem_start;
buf_offset = calc_fb_offset(mfd, fbi, bpp);
atomic_set(&vctrl->suspend, 0);
pipe->src_height = fbi->var.yres;
pipe->src_width = fbi->var.xres;
pipe->src_h = fbi->var.yres;
pipe->src_w = fbi->var.xres;
pipe->src_y = 0;
pipe->src_x = 0;
pipe->dst_h = fbi->var.yres;
pipe->dst_w = fbi->var.xres;
pipe->srcp0_ystride = fbi->fix.line_length;
pipe->bpp = bpp;
if (mfd->display_iova)
pipe->srcp0_addr = mfd->display_iova + buf_offset;
else
pipe->srcp0_addr = (uint32)(buf + buf_offset);
pipe->dst_h = fbi->var.yres;
pipe->dst_w = fbi->var.xres;
mdp4_overlay_solidfill_init(pipe);
mdp4_overlay_mdp_pipe_req(pipe, mfd);
mdp4_calc_blt_mdp_bw(mfd, pipe);
mdp4_overlay_dmap_xy(pipe); /* dma_p */
mdp4_overlay_dmap_cfg(mfd, 1);
if (pipe->pipe_type == OVERLAY_TYPE_VIDEO)
mdp4_overlay_vg_setup(pipe); /* video/graphic pipe */
else
mdp4_overlay_rgb_setup(pipe); /* rgb pipe */
mdp4_overlayproc_cfg(pipe);
mdp4_overlay_reg_flush(pipe, 1);
mdp4_mixer_stage_up(pipe, 0);
mdp4_mixer_stage_commit(pipe->mixer_num);
/*
* DSI timing setting
*/
h_back_porch = var->left_margin;
h_front_porch = var->right_margin;
v_back_porch = var->upper_margin;
v_front_porch = var->lower_margin;
hsync_pulse_width = var->hsync_len;
vsync_pulse_width = var->vsync_len;
dsi_border_clr = mfd->panel_info.lcdc.border_clr;
dsi_underflow_clr = mfd->panel_info.lcdc.underflow_clr;
dsi_hsync_skew = mfd->panel_info.lcdc.hsync_skew;
dsi_width = mfd->panel_info.xres +
mfd->panel_info.lcdc.xres_pad;
dsi_height = mfd->panel_info.yres +
mfd->panel_info.lcdc.yres_pad;
dsi_bpp = mfd->panel_info.bpp;
hsync_period = hsync_pulse_width + h_back_porch + dsi_width
+ h_front_porch;
hsync_ctrl = (hsync_period << 16) | hsync_pulse_width;
hsync_start_x = h_back_porch + hsync_pulse_width;
hsync_end_x = hsync_period - h_front_porch - 1;
display_hctl = (hsync_end_x << 16) | hsync_start_x;
vsync_period =
(vsync_pulse_width + v_back_porch + dsi_height + v_front_porch);
display_v_start = ((vsync_pulse_width + v_back_porch) * hsync_period)
+ dsi_hsync_skew;
display_v_end =
((vsync_period - v_front_porch) * hsync_period) + dsi_hsync_skew - 1;
if (dsi_width != var->xres) {
active_h_start = hsync_start_x + first_pixel_start_x;
active_h_end = active_h_start + var->xres - 1;
active_hctl =
ACTIVE_START_X_EN | (active_h_end << 16) | active_h_start;
} else {
active_hctl = 0;
}
if (dsi_height != var->yres) {
active_v_start =
display_v_start + first_pixel_start_y * hsync_period;
active_v_end = active_v_start + (var->yres) * hsync_period - 1;
active_v_start |= ACTIVE_START_Y_EN;
} else {
active_v_start = 0;
active_v_end = 0;
}
dsi_underflow_clr |= 0x80000000; /* enable recovery */
hsync_polarity = 0;
vsync_polarity = 0;
data_en_polarity = 0;
ctrl_polarity =
(data_en_polarity << 2) | (vsync_polarity << 1) | (hsync_polarity);
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_ON, FALSE);
MDP_OUTP(MDP_BASE + DSI_VIDEO_BASE + 0x4, hsync_ctrl);
MDP_OUTP(MDP_BASE + DSI_VIDEO_BASE + 0x8, vsync_period * hsync_period);
MDP_OUTP(MDP_BASE + DSI_VIDEO_BASE + 0xc,
vsync_pulse_width * hsync_period);
MDP_OUTP(MDP_BASE + DSI_VIDEO_BASE + 0x10, display_hctl);
MDP_OUTP(MDP_BASE + DSI_VIDEO_BASE + 0x14, display_v_start);
MDP_OUTP(MDP_BASE + DSI_VIDEO_BASE + 0x18, display_v_end);
MDP_OUTP(MDP_BASE + DSI_VIDEO_BASE + 0x1c, active_hctl);
MDP_OUTP(MDP_BASE + DSI_VIDEO_BASE + 0x20, active_v_start);
MDP_OUTP(MDP_BASE + DSI_VIDEO_BASE + 0x24, active_v_end);
MDP_OUTP(MDP_BASE + DSI_VIDEO_BASE + 0x28, dsi_border_clr);
MDP_OUTP(MDP_BASE + DSI_VIDEO_BASE + 0x2c, dsi_underflow_clr);
MDP_OUTP(MDP_BASE + DSI_VIDEO_BASE + 0x30, dsi_hsync_skew);
MDP_OUTP(MDP_BASE + DSI_VIDEO_BASE + 0x38, ctrl_polarity);
mdp_pipe_ctrl(MDP_CMD_BLOCK, MDP_BLOCK_POWER_OFF, FALSE);
mdp_histogram_ctrl_all(TRUE);
mdp4_overlay_dsi_video_start();
mutex_unlock(&mfd->dma->ov_mutex);
return ret;
}
/* 3D side by side */
void mdp4_dsi_video_3d_sbys(struct msm_fb_data_type *mfd,
struct msmfb_overlay_3d *r3d)
{
struct fb_info *fbi;
unsigned int buf_offset;
int bpp;
uint8 *buf = NULL;
int cndx = 0;
struct vsycn_ctrl *vctrl;
struct mdp4_overlay_pipe *pipe;
vctrl = &vsync_ctrl_db[cndx];
pipe = vctrl->base_pipe;
if (vctrl->base_pipe == NULL)
return;
pipe = vctrl->base_pipe;
pipe->is_3d = r3d->is_3d;
pipe->src_height_3d = r3d->height;
pipe->src_width_3d = r3d->width;
if (pipe->is_3d)
mdp4_overlay_panel_3d(MDP4_3D_SIDE_BY_SIDE);
else
mdp4_overlay_panel_3d(MDP4_3D_NONE);
fbi = mfd->fbi;
bpp = fbi->var.bits_per_pixel / 8;
buf = (uint8 *) fbi->fix.smem_start;
buf_offset = calc_fb_offset(mfd, fbi, bpp);
if (pipe->is_3d) {
pipe->src_height = pipe->src_height_3d;
pipe->src_width = pipe->src_width_3d;
pipe->src_h = pipe->src_height_3d;
pipe->src_w = pipe->src_width_3d;
pipe->dst_h = pipe->src_height_3d;
pipe->dst_w = pipe->src_width_3d;
pipe->srcp0_ystride = msm_fb_line_length(0,
pipe->src_width, bpp);
} else {
/* 2D */
pipe->src_height = fbi->var.yres;
pipe->src_width = fbi->var.xres;
pipe->src_h = fbi->var.yres;
pipe->src_w = fbi->var.xres;
pipe->dst_h = fbi->var.yres;
pipe->dst_w = fbi->var.xres;
pipe->srcp0_ystride = fbi->fix.line_length;
}
pipe->src_y = 0;
pipe->src_x = 0;
pipe->dst_y = 0;
pipe->dst_x = 0;
if (mfd->display_iova)
pipe->srcp0_addr = mfd->display_iova + buf_offset;
else
pipe->srcp0_addr = (uint32)(buf + buf_offset);
if (pipe->pipe_type == OVERLAY_TYPE_VIDEO)
mdp4_overlay_vg_setup(pipe); /* video/graphic pipe */
else
mdp4_overlay_rgb_setup(pipe); /* rgb pipe */
mdp4_overlayproc_cfg(pipe);
mdp4_overlay_dmap_xy(pipe);
mdp4_overlay_dmap_cfg(mfd, 1);
mdp4_overlay_reg_flush(pipe, 1);
mdp4_mixer_stage_up(pipe, 0);
mdp4_mixer_stage_commit(pipe->mixer_num);
mb();
}
void mdp4_lcdc_overlay_update_base_layer(struct msm_fb_data_type *mfd)
{
MDPIBUF *iBuf = &mfd->ibuf;
struct fb_info *fbi=0;
uint8 *buf = (uint8 *) iBuf->buf;
struct mdp4_overlay_pipe *pipe = 0;
mutex_lock(&mfd->dma->ov_mutex);
if(mfd->enabled_fbs == LAYER_FB0) {
fbi = mfd->fbi[0]; //fb0 as base
pipe =
mdp4_overlay_ndx2pipe(mfd->overlay_g1_pipe_index);
}
else if(mfd->enabled_fbs == (LAYER_FB0|LAYER_FB1)) {
fbi = mfd->fbi[1]; //fb1 as base
pipe =
mdp4_overlay_ndx2pipe(mfd->overlay_g2_pipe_index);
}
else if(mfd->enabled_fbs == (LAYER_FB0|LAYER_VIDEO_0)) {
pipe =
mdp4_overlay_ndx2pipe(mfd->overlay_v1_pipe_index);
}
else if(mfd->enabled_fbs == (LAYER_FB1|LAYER_FB0|LAYER_VIDEO_0)) {
pipe =
mdp4_overlay_ndx2pipe(mfd->overlay_v1_pipe_index);
}
pipe->src_height = fbi->var.yres;
pipe->src_width = fbi->var.xres;
pipe->src_h = fbi->var.yres;
pipe->src_w = fbi->var.xres;
pipe->src_y = 0;
pipe->src_x = 0;
pipe->dst_h = fbi->var.yres;
pipe->dst_w = fbi->var.xres;
pipe->dst_y = 0;
pipe->dst_x = 0;
pipe->srcp0_addr = (uint32) buf;
pipe->srcp0_ystride = fbi->fix.line_length;
pipe->mixer_stage = MDP4_MIXER_STAGE_BASE;
mdp4_overlay_dmap_xy(pipe);
mdp4_overlay_dmap_cfg(mfd, 1);
if (pipe->pipe_type == OVERLAY_TYPE_VIDEO) {
//Base layer for video is filled with black
pipe->solid_fill = 1;
mdp4_overlay_vg_setup(pipe); /* video/graphic pipe */
}
else {
mdp4_overlay_rgb_setup(pipe);
}
if(!lcdc_pipe) {
mdp4_mixer_stage_up(pipe);
}
mdp4_overlayproc_cfg(pipe);
mdp4_overlay_reg_flush(pipe, 1);
lcdc_pipe = pipe;
mutex_unlock(&mfd->dma->ov_mutex);
}