static void int_4_isr(void)
{
uint8_t status, reg ;
/* INTR_STATUS4 */
status = mhl_i2c_reg_read(TX_PAGE_3, 0x0021);
/*
* When I2C is inoperational (D3) and
* a previous interrupt brought us here,
* do nothing.
*/
if ((0x00 == status) && (mhl_msm_state->cur_state == POWER_STATE_D3)) {
pr_debug("MHL: spurious interrupt\n");
return;
}
if (0xFF != status) {
if ((status & BIT0) && (mhl_msm_state->chip_rev_id < 1)) {
uint8_t tmds_cstat;
uint8_t mhl_fifo_status;
/* TMDS CSTAT */
tmds_cstat = mhl_i2c_reg_read(TX_PAGE_3, 0x0040);
pr_debug("TMDS CSTAT: 0x%02x\n", tmds_cstat);
if (tmds_cstat & 0x02) {
mhl_fifo_status = mhl_i2c_reg_read(TX_PAGE_3,
0x0023);
pr_debug("MHL FIFO status: 0x%02x\n",
mhl_fifo_status);
if (mhl_fifo_status & 0x0C) {
mhl_i2c_reg_write(TX_PAGE_3, 0x0023,
0x0C);
pr_debug("Apply MHL FIFO Reset\n");
mhl_i2c_reg_write(TX_PAGE_3, 0x0000,
0x94);
mhl_i2c_reg_write(TX_PAGE_3, 0x0000,
0x84);
}
}
}
if (status & BIT1)
pr_debug("MHL: INT4 BIT1 is set\n");
/* MHL_EST interrupt */
if (status & BIT2) {
pr_debug("mhl_msm_connection() from ISR\n");
mhl_connect_api(true);
mhl_msm_connection();
pr_debug("MHL Connect Drv: INT4 Status = %02X\n",
(int) status);
} else if (status & BIT3) {
pr_debug("MHL: uUSB-A type device detected.\n");
mhl_i2c_reg_write(TX_PAGE_3, 0x001C, 0x80);
switch_mode(POWER_STATE_D3);
}
if (status & BIT5) {
mhl_connect_api(false);
/* Clear interrupts - REG INTR4 */
reg = mhl_i2c_reg_read(TX_PAGE_3, 0x0021);
mhl_i2c_reg_write(TX_PAGE_3, 0x0021, reg);
mhl_msm_disconnection();
if (notify_usb_online)
notify_usb_online(0);
pr_debug("MHL Disconnect Drv: INT4 Status = %02X\n",
(int)status);
}
if ((mhl_msm_state->cur_state != POWER_STATE_D0_MHL) &&\
(status & BIT6)) {
/* RGND READY Intr */
switch_mode(POWER_STATE_D0_MHL);
mhl_msm_read_rgnd_int();
}
/* Can't succeed at these in D3 */
if (mhl_msm_state->cur_state != POWER_STATE_D3) {
/* CBUS Lockout interrupt? */
/*
* Hardware detection mechanism figures that
* CBUS line is latched and raises this intr
* where we force usb switch open and release
*/
if (status & BIT4) {
force_usb_switch_open();
release_usb_switch_open();
}
}
}
pr_debug("MHL END Drv: INT4 Status = %02X\n", (int) status);
mhl_i2c_reg_write(TX_PAGE_3, 0x0021, status);
return;
}
static void int_4_isr(void)
{
uint8_t status, reg ;
status = mhl_i2c_reg_read(TX_PAGE_3, 0x0021);
if ((0x00 == status) && (mhl_msm_state->cur_state == POWER_STATE_D3)) {
pr_debug("MHL: spurious interrupt\n");
return;
}
if (0xFF != status) {
if ((status & BIT0) && (mhl_msm_state->chip_rev_id < 1)) {
uint8_t tmds_cstat;
uint8_t mhl_fifo_status;
tmds_cstat = mhl_i2c_reg_read(TX_PAGE_3, 0x0040);
pr_debug("TMDS CSTAT: 0x%02x\n", tmds_cstat);
if (tmds_cstat & 0x02) {
mhl_fifo_status = mhl_i2c_reg_read(TX_PAGE_3,
0x0023);
pr_debug("MHL FIFO status: 0x%02x\n",
mhl_fifo_status);
if (mhl_fifo_status & 0x0C) {
mhl_i2c_reg_write(TX_PAGE_3, 0x0023,
0x0C);
pr_debug("Apply MHL FIFO Reset\n");
mhl_i2c_reg_write(TX_PAGE_3, 0x0000,
0x94);
mhl_i2c_reg_write(TX_PAGE_3, 0x0000,
0x84);
}
}
}
if (status & BIT1)
pr_debug("MHL: INT4 BIT1 is set\n");
if (status & BIT2) {
pr_debug("mhl_msm_connection() from ISR\n");
mhl_connect_api(true);
mhl_msm_connection();
pr_debug("MHL Connect Drv: INT4 Status = %02X\n",
(int) status);
} else if (status & BIT3) {
pr_debug("MHL: uUSB-A type device detected.\n");
mhl_i2c_reg_write(TX_PAGE_3, 0x001C, 0x80);
switch_mode(POWER_STATE_D3);
}
if (status & BIT5) {
mhl_connect_api(false);
reg = mhl_i2c_reg_read(TX_PAGE_3, 0x0021);
mhl_i2c_reg_write(TX_PAGE_3, 0x0021, reg);
mhl_msm_disconnection();
if (notify_usb_online)
notify_usb_online(0);
pr_debug("MHL Disconnect Drv: INT4 Status = %02X\n",
(int)status);
}
if ((mhl_msm_state->cur_state != POWER_STATE_D0_MHL) &&\
(status & BIT6)) {
switch_mode(POWER_STATE_D0_MHL);
mhl_msm_read_rgnd_int();
}
if (mhl_msm_state->cur_state != POWER_STATE_D3) {
if (status & BIT4) {
force_usb_switch_open();
release_usb_switch_open();
}
}
}
pr_debug("MHL END Drv: INT4 Status = %02X\n", (int) status);
mhl_i2c_reg_write(TX_PAGE_3, 0x0021, status);
return;
}
