static int labpc_pci_auto_attach(struct comedi_device *dev,
unsigned long context)
{
struct pci_dev *pcidev = comedi_to_pci_dev(dev);
const struct labpc_boardinfo *board = NULL;
struct labpc_private *devpriv;
int ret;
if (context < ARRAY_SIZE(labpc_pci_boards))
board = &labpc_pci_boards[context];
if (!board)
return -ENODEV;
dev->board_ptr = board;
dev->board_name = board->name;
ret = comedi_pci_enable(dev);
if (ret)
return ret;
devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
if (!devpriv)
return -ENOMEM;
devpriv->mite = mite_alloc(pcidev);
if (!devpriv->mite)
return -ENOMEM;
ret = mite_setup(devpriv->mite);
if (ret < 0)
return ret;
dev->iobase = (unsigned long)devpriv->mite->daq_io_addr;
return labpc_common_attach(dev, mite_irq(devpriv->mite), IRQF_SHARED);
}
static int nidio_attach(struct comedi_device *dev, struct comedi_devconfig *it)
{
struct comedi_subdevice *s;
int i;
int ret;
int n_subdevices;
unsigned int irq;
printk("comedi%d: nidio:", dev->minor);
if ((ret = alloc_private(dev, sizeof(struct nidio96_private))) < 0)
return ret;
spin_lock_init(&devpriv->mite_channel_lock);
ret = nidio_find_device(dev, it->options[0], it->options[1]);
if (ret < 0)
return ret;
ret = mite_setup(devpriv->mite);
if (ret < 0) {
printk("error setting up mite\n");
return ret;
}
comedi_set_hw_dev(dev, &devpriv->mite->pcidev->dev);
devpriv->di_mite_ring = mite_alloc_ring(devpriv->mite);
if (devpriv->di_mite_ring == NULL)
return -ENOMEM;
dev->board_name = this_board->name;
irq = mite_irq(devpriv->mite);
printk(" %s", dev->board_name);
if (this_board->uses_firmware) {
ret = pci_6534_upload_firmware(dev, it->options);
if (ret < 0)
return ret;
}
if (!this_board->is_diodaq) {
n_subdevices = this_board->n_8255;
} else {
n_subdevices = 1;
}
if ((ret = alloc_subdevices(dev, n_subdevices)) < 0)
return ret;
if (!this_board->is_diodaq) {
for (i = 0; i < this_board->n_8255; i++) {
subdev_8255_init(dev, dev->subdevices + i,
nidio96_8255_cb,
(unsigned long)(devpriv->mite->
daq_io_addr +
NIDIO_8255_BASE(i)));
}
} else {
printk(" rev=%d",
readb(devpriv->mite->daq_io_addr + Chip_Version));
s = dev->subdevices + 0;
dev->read_subdev = s;
s->type = COMEDI_SUBD_DIO;
s->subdev_flags =
SDF_READABLE | SDF_WRITABLE | SDF_LSAMPL | SDF_PACKED |
SDF_CMD_READ;
s->n_chan = 32;
s->range_table = &range_digital;
s->maxdata = 1;
s->insn_config = &ni_pcidio_insn_config;
s->insn_bits = &ni_pcidio_insn_bits;
s->do_cmd = &ni_pcidio_cmd;
s->do_cmdtest = &ni_pcidio_cmdtest;
s->cancel = &ni_pcidio_cancel;
s->len_chanlist = 32;
s->buf_change = &ni_pcidio_change;
s->async_dma_dir = DMA_BIDIRECTIONAL;
writel(0, devpriv->mite->daq_io_addr + Port_IO(0));
writel(0, devpriv->mite->daq_io_addr + Port_Pin_Directions(0));
writel(0, devpriv->mite->daq_io_addr + Port_Pin_Mask(0));
writeb(0x00,
devpriv->mite->daq_io_addr +
Master_DMA_And_Interrupt_Control);
ret = request_irq(irq, nidio_interrupt, IRQF_SHARED,
"ni_pcidio", dev);
if (ret < 0) {
printk(" irq not available");
}
dev->irq = irq;
}
printk("\n");
return 0;
}
