void S5L8900X_uart_init(void)
{
/* Map the VICs. */
gS5L8900XVic0Base = ml_io_map(VIC0, PAGE_SIZE);
gS5L8900XVic1Base = ml_io_map(VIC1, PAGE_SIZE);
gS5L8900XEdgeICBase = ml_io_map(EDGEIC, PAGE_SIZE);
gS5L8900XTimerBase = ml_io_map(TIMER_BASE, PAGE_SIZE);
return;
}
void RealView_framebuffer_init(void)
{
gRealviewPl111Base = ml_io_map(REALVIEW_PL111_BASE, PAGE_SIZE);
/*
* The hardware demands a framebuffer, but the framebuffer has to be given
* in a hardware address.
*/
void *framebuffer = pmap_steal_memory(1024 * 768 * 4);
void *framebuffer_phys = pmap_extract(kernel_pmap, framebuffer);
uint32_t depth = 2;
uint32_t width = 1024;
uint32_t height = 768;
uint32_t pitch = (width * depth);
uint32_t fb_length = (pitch * width);
uint32_t timingRegister, controlRegister;
/*
* Set framebuffer address
*/
HARDWARE_REGISTER(gRealviewPl111Base + PL111_UPPER_FB) = framebuffer_phys;
HARDWARE_REGISTER(gRealviewPl111Base + PL111_LOWER_FB) = framebuffer_phys;
/*
* Initialize timings to 1024x768x16
*/
HARDWARE_REGISTER(gRealviewPl111Base + PL111_TIMINGS_0) = LCDTIMING0_PPL(width);
HARDWARE_REGISTER(gRealviewPl111Base + PL111_TIMINGS_1) = LCDTIMING1_LPP(height);
/*
* Enable the TFT/LCD Display
*/
HARDWARE_REGISTER(gRealviewPl111Base + PL111_CONTROL) = LCDCONTROL_LCDEN | LCDCONTROL_LCDTFT | LCDCONTROL_LCDPWR | LCDCONTROL_LCDBPP(5);
PE_state.video.v_baseAddr = (unsigned long) framebuffer_phys;
PE_state.video.v_rowBytes = width * 4;
PE_state.video.v_width = width;
PE_state.video.v_height = height;
PE_state.video.v_depth = 4 * (8); // 16bpp
kprintf(KPRINTF_PREFIX "framebuffer initialized\n");
bzero(framebuffer, (pitch * height));
char tempbuf[16];
if (PE_parse_boot_argn("-graphics-mode", tempbuf, sizeof(tempbuf))) {
/*
* BootX like framebuffer.
*/
memset(framebuffer, 0xb9, PE_state.video.v_rowBytes * PE_state.video.v_height);
initialize_screen((void *) &PE_state.video, kPEGraphicsMode);
} else {
initialize_screen((void *) &PE_state.video, kPETextMode);
}
}
void RealView_framebuffer_init(void)
{
gRealviewPl111Base = ml_io_map(REALVIEW_PL111_BASE, PAGE_SIZE);
/*
* The hardware demands a framebuffer, but the framebuffer has to be given
* in a hardware address.
*/
void* framebuffer = pmap_steal_memory(1024 * 768 * 4);
void* framebuffer_phys = pmap_get_phys(kernel_pmap, framebuffer);
uint32_t depth = 2;
uint32_t width = 1024;
uint32_t height = 768;
uint32_t pitch = (width * depth);
uint32_t fb_length = (pitch * width);
uint32_t timingRegister, controlRegister;
/* Set framebuffer address */
HARDWARE_REGISTER(gRealviewPl111Base + PL111_UPPER_FB) = framebuffer_phys;
HARDWARE_REGISTER(gRealviewPl111Base + PL111_LOWER_FB) = framebuffer_phys;
/* Initialize timings to 1024x768x16 */
HARDWARE_REGISTER(gRealviewPl111Base + PL111_TIMINGS_0) = LCDTIMING0_PPL(width);
HARDWARE_REGISTER(gRealviewPl111Base + PL111_TIMINGS_1) = LCDTIMING1_LPP(height);
/* Enable the TFT/LCD Display */
HARDWARE_REGISTER(gRealviewPl111Base + PL111_CONTROL) =
LCDCONTROL_LCDEN |
LCDCONTROL_LCDTFT |
LCDCONTROL_LCDPWR |
LCDCONTROL_LCDBPP(4);
PE_state.video.v_baseAddr = (unsigned long)framebuffer_phys;
PE_state.video.v_rowBytes = width * 2;
PE_state.video.v_width = width;
PE_state.video.v_height = height;
PE_state.video.v_depth = 2 * (8); // 16bpp
kprintf(KPRINTF_PREFIX "framebuffer initialized\n");
bzero(framebuffer, (pitch * height));
initialize_screen((void*)&PE_state.video, kPEAcquireScreen);
initialize_screen((void*)&PE_state.video, kPEEnableScreen);
}
void RealView_uart_init(void)
{
char temp_buf[16];
gRealviewUartBase = ml_io_map(REALVIEW_UART0_BASE, PAGE_SIZE);
if (PE_parse_boot_argn("-use_realview_eb_pic", temp_buf, sizeof(temp_buf))) {
gRealviewPicBase = ml_io_map(REALVIEW_EB_PIC0_BASE, PAGE_SIZE);
gRealviewPicDistribBase = ml_io_map(REALVIEW_EB_PIC0_BASE + PAGE_SIZE, PAGE_SIZE);
} else {
gRealviewPicBase = ml_io_map(REALVIEW_PIC0_BASE, PAGE_SIZE);
gRealviewPicDistribBase = ml_io_map(REALVIEW_PIC0_BASE + PAGE_SIZE, PAGE_SIZE);
}
gRealviewSysControllerBase = ml_io_map(REALVIEW_SYSCTL_BASE, PAGE_SIZE);
gRealviewTimerBase = ml_io_map(REALVIEW_TIMER0_BASE, PAGE_SIZE);
}
__private_extern__
vm_offset_t chudxnu_io_map(uint64_t phys_addr, vm_size_t size)
{
return ml_io_map(phys_addr, size); // XXXXX limited to first 2GB XXXXX
}
void Sun4i_uart_init(void)
{
gSun4iUartBase = ml_io_map(UART_BASE, PAGE_SIZE);
}
void
cpu_machine_idle_init(boolean_t from_boot)
{
static const unsigned int *BootArgs_paddr = (unsigned int *)NULL;
static const unsigned int *CpuDataEntries_paddr = (unsigned int *)NULL;
static unsigned int resume_idle_cpu_paddr = (unsigned int )NULL;
cpu_data_t *cpu_data_ptr = getCpuDatap();
if (from_boot) {
unsigned int jtag = 0;
unsigned int wfi;
if (PE_parse_boot_argn("jtag", &jtag, sizeof (jtag))) {
if (jtag != 0)
idle_enable = FALSE;
else
idle_enable = TRUE;
} else
idle_enable = TRUE;
if (!PE_parse_boot_argn("wfi", &wfi, sizeof (wfi)))
wfi = 1;
if (wfi == 0)
bcopy_phys((addr64_t)ml_static_vtop((vm_offset_t)&patch_to_nop),
(addr64_t)ml_static_vtop((vm_offset_t)&wfi_inst), sizeof(unsigned));
if (wfi == 2)
wfi_fast = 0;
LowExceptionVectorsAddr = (void *)ml_io_map(ml_vtophys((vm_offset_t)gPhysBase), PAGE_SIZE);
/* Copy Exception Vectors low, but don't touch the sleep token */
bcopy((void *)&ExceptionLowVectorsBase, (void *)LowExceptionVectorsAddr, 0x90);
bcopy(((void *)(((vm_offset_t)&ExceptionLowVectorsBase) + 0xA0)), ((void *)(((vm_offset_t)LowExceptionVectorsAddr) + 0xA0)), ARM_PGBYTES - 0xA0);
start_cpu_paddr = ml_static_vtop((vm_offset_t)&start_cpu);
BootArgs_paddr = (unsigned int *)ml_static_vtop((vm_offset_t)BootArgs);
bcopy_phys((addr64_t)ml_static_vtop((vm_offset_t)&BootArgs_paddr),
(addr64_t)((unsigned int)(gPhysBase) +
((unsigned int)&(ResetHandlerData.boot_args) - (unsigned int)&ExceptionLowVectorsBase)),
4);
CpuDataEntries_paddr = (unsigned int *)ml_static_vtop((vm_offset_t)CpuDataEntries);
bcopy_phys((addr64_t)ml_static_vtop((vm_offset_t)&CpuDataEntries_paddr),
(addr64_t)((unsigned int)(gPhysBase) +
((unsigned int)&(ResetHandlerData.cpu_data_entries) - (unsigned int)&ExceptionLowVectorsBase)),
4);
CleanPoC_DcacheRegion((vm_offset_t) phystokv(gPhysBase), PAGE_SIZE);
resume_idle_cpu_paddr = (unsigned int)ml_static_vtop((vm_offset_t)&resume_idle_cpu);
}
if (cpu_data_ptr == &BootCpuData) {
bcopy(((const void *)running_signature), (void *)(IOS_STATE), IOS_STATE_SIZE);
};
cpu_data_ptr->cpu_reset_handler = resume_idle_cpu_paddr;
clean_dcache((vm_offset_t)cpu_data_ptr, sizeof(cpu_data_t), FALSE);
}
