static void spin_kick(void *data) { SpinKick *kick = data; CPUState *cpu = CPU(kick->cpu); CPUPPCState *env = &kick->cpu->env; SpinInfo *curspin = kick->spin; hwaddr map_size = 64 * 1024 * 1024; hwaddr map_start; cpu_synchronize_state(cpu); stl_p(&curspin->pir, env->spr[SPR_PIR]); env->nip = ldq_p(&curspin->addr) & (map_size - 1); env->gpr[3] = ldq_p(&curspin->r3); env->gpr[4] = 0; env->gpr[5] = 0; env->gpr[6] = 0; env->gpr[7] = map_size; env->gpr[8] = 0; env->gpr[9] = 0; map_start = ldq_p(&curspin->addr) & ~(map_size - 1); mmubooke_create_initial_mapping(env, 0, map_start, map_size); cpu->halted = 0; env->exception_index = -1; cpu->stopped = false; qemu_cpu_kick(cpu); }
static void main_cpu_reset(void *opaque) { PowerPCCPU *cpu = opaque; CPUPPCState *env = &cpu->env; struct boot_info *bi = env->load_info; cpu_reset(CPU(cpu)); /* Linux Kernel Parameters (passing device tree): * r3: pointer to the fdt * r4: 0 * r5: 0 * r6: epapr magic * r7: size of IMA in bytes * r8: 0 * r9: 0 */ env->gpr[1] = (16<<20) - 8; /* Provide a device-tree. */ env->gpr[3] = bi->fdt; env->nip = bi->bootstrap_pc; /* Create a mapping for the kernel. */ mmubooke_create_initial_mapping(env, 0, 0); env->gpr[6] = tswap32(EPAPR_MAGIC); env->gpr[7] = bi->ima_size; }
static void main_cpu_reset(void *opaque) { CPUState *env = opaque; cpu_reset(env); env->gpr[1] = (16<<20) - 8; env->gpr[3] = FDT_ADDR; env->nip = entry; /* Create a mapping for the kernel. */ mmubooke_create_initial_mapping(env, 0, 0); }
static void main_cpu_reset(void *opaque) { PowerPCCPU *cpu = opaque; CPUPPCState *env = &cpu->env; cpu_reset(CPU(cpu)); env->gpr[1] = (16<<20) - 8; env->gpr[3] = FDT_ADDR; env->nip = entry; /* Create a mapping for the kernel. */ mmubooke_create_initial_mapping(env, 0, 0); }
static void mpc8544ds_cpu_reset(void *opaque) { CPUPPCState *env = opaque; struct boot_info *bi = env->load_info; cpu_state_reset(env); /* Set initial guest state. */ env->halted = 0; env->gpr[1] = (16<<20) - 8; env->gpr[3] = bi->dt_base; env->nip = bi->entry; mmubooke_create_initial_mapping(env, 0, 0); }
static void ppce500_cpu_reset(void *opaque) { PowerPCCPU *cpu = opaque; CPUPPCState *env = &cpu->env; struct boot_info *bi = env->load_info; cpu_reset(CPU(cpu)); /* Set initial guest state. */ env->halted = 0; env->gpr[1] = (16<<20) - 8; env->gpr[3] = bi->dt_base; env->nip = bi->entry; mmubooke_create_initial_mapping(env); }
static void ppce500_cpu_reset(void *opaque) { PowerPCCPU *cpu = opaque; CPUState *cs = CPU(cpu); CPUPPCState *env = &cpu->env; struct boot_info *bi = env->load_info; cpu_reset(cs); /* Set initial guest state. */ cs->halted = 0; env->gpr[1] = (16<<20) - 8; env->gpr[3] = bi->dt_base; env->gpr[4] = 0; env->gpr[5] = 0; env->gpr[6] = EPAPR_MAGIC; env->gpr[7] = mmubooke_initial_mapsize(env); env->gpr[8] = 0; env->gpr[9] = 0; env->nip = bi->entry; mmubooke_create_initial_mapping(env); }