/*******************************************************************************
* mvSysTdmInit - Initialize the TDM subsystem
*
* DESCRIPTION:
*
* INPUT:
* None
* OUTPUT:
* None
* RETURN:
* None
*
*******************************************************************************/
MV_STATUS mvSysTdmInit(MV_TDM_PARAMS* tdmParams)
{
MV_TDM_HAL_DATA halData;
MV_UNIT_WIN_INFO addrWinMap[MAX_TARGETS + 1];
MV_STATUS status;
status = mvCtrlAddrWinMapBuild(addrWinMap, MAX_TARGETS + 1);
if(status == MV_OK)
#ifdef MV_TDM_SUPPORT
status = mvTdmWinInit(addrWinMap);
#else
status = mvCommUnitWinInit(addrWinMap);
#endif
if(status == MV_OK) {
halData.spiMode = mvBoardTdmSpiModeGet();
halData.model = mvCtrlModelGet();
#ifdef MV_TDM_SUPPORT
status = mvTdmHalInit (tdmParams, &halData);
#else
halData.maxCs = mvBoardTdmDevicesCountGet();
status = mvCommUnitHalInit (tdmParams, &halData);
/* Issue SLIC reset */
mvGppValueSet(0, BIT25, 0);
mvOsDelay(1);
mvGppValueSet(0, BIT25, BIT25);
#endif
}
return status;
}
MV_STATUS mvTdmInit(mv_tdm_params_t* tdmParams)
{
MV_U8 ch, sample;
MV_U32 pcmCtrlReg;
MV_TRC_REC("->%s\n",__FUNCTION__);
mvTdmShowProperties();
/* Init TDM windows address decoding */
if (mvTdmWinInit() != MV_OK)
{
return MV_ERROR;
}
/* Init globals */
rxInt = txInt = 0;
tdmEnable = 0;
spiMode = mvBoardTdmSpiModeGet();
tdmBandMode = tdmParams->bandMode;
pcmFormat = tdmParams->pcmFormat;
if((tdmParams->samplePeriod < MV_TDM_BASE_SAMPLE_PERIOD) ||
(tdmParams->samplePeriod > MV_TDM_MAX_SAMPLE_PERIOD))
{
factor = 1; /* use base sample period(10ms) */
}
else
{
factor = (tdmParams->samplePeriod / MV_TDM_BASE_SAMPLE_PERIOD);
}
/* Set sample size for further TDM configuration */
sample = (pcmFormat == MV_PCM_FORMAT_LINEAR ? 2 : 1);
/* Allocate aggregated buffers for data transport */
MV_TRC_REC("allocate %d bytes for aggregated buffer\n", MV_TDM_AGGR_BUFF_SIZE(pcmFormat, tdmBandMode, factor));
rxAggrBuffVirt = (MV_U8*)mvOsIoCachedMalloc(NULL, MV_TDM_AGGR_BUFF_SIZE(pcmFormat, tdmBandMode, factor),
&rxAggrBuffPhys,NULL);
txAggrBuffVirt = (MV_U8*)mvOsIoCachedMalloc(NULL, MV_TDM_AGGR_BUFF_SIZE(pcmFormat, tdmBandMode, factor),
&txAggrBuffPhys,NULL);
if(!rxAggrBuffVirt || !txAggrBuffVirt)
{
mvOsPrintf("%s: error malloc failed\n",__FUNCTION__);
return MV_NO_RESOURCE;
}
/* Config TDM */
MV_REG_BIT_RESET(TDM_SPI_MUX_REG, 1); /* enable TDM/SPI interface */
MV_REG_BIT_SET(TDM_MISC_REG, BIT0); /* sw reset to TDM for 5181L-A1 & up */
MV_REG_WRITE(INT_RESET_SELECT_REG,CLEAR_ON_ZERO); /* int cause is not clear on read */
MV_REG_WRITE(INT_EVENT_MASK_REG,0x3ffff); /* all interrupt bits latched in status */
MV_REG_WRITE(INT_STATUS_MASK_REG,0); /* disable interrupts */
MV_REG_WRITE(INT_STATUS_REG,0); /* clear int status register */
MV_REG_WRITE(PCM_CLK_RATE_DIV_REG, PCM_8192KHZ); /* PCM PCLK freq */
MV_REG_WRITE(DUMMY_RX_WRITE_DATA_REG,0); /* Padding on Rx completion */
MV_REG_BYTE_WRITE(SPI_GLOBAL_CTRL_REG, MV_REG_READ(SPI_GLOBAL_CTRL_REG) | SPI_GLOBAL_ENABLE);
MV_REG_BYTE_WRITE(SPI_CLK_PRESCALAR_REG, SPI_CLK_8MHZ); /* SPI SCLK freq */
MV_REG_WRITE(FRAME_TIMESLOT_REG, TIMESLOTS128_8192KHZ); /* Number of timeslots (PCLK) */
if(tdmBandMode == MV_NARROW_BAND)
{
pcmCtrlReg = (CONFIG_PCM_CRTL | ((sample-1)<<PCM_SAMPLE_SIZE_OFFS));
MV_REG_WRITE(PCM_CTRL_REG, pcmCtrlReg); /* PCM configuration */
MV_REG_WRITE(TIMESLOT_CTRL_REG, CONFIG_TIMESLOT_CTRL); /* channels rx/tx timeslots */
}
else /* MV_WIDE_BAND */
{
pcmCtrlReg = (CONFIG_WB_PCM_CRTL | ((sample-1)<<PCM_SAMPLE_SIZE_OFFS));
MV_REG_WRITE(PCM_CTRL_REG, pcmCtrlReg); /* PCM configuration - WB support */
MV_REG_WRITE(CH_DELAY_CTRL_REG(0), CONFIG_CH0_DELAY_CTRL_CONFIG); /* CH0 delay control register */
MV_REG_WRITE(CH_DELAY_CTRL_REG(1), CONFIG_CH1_DELAY_CTRL_CONFIG); /* CH1 delay control register */
MV_REG_WRITE(CH_WB_DELAY_CTRL_REG(0), CONFIG_CH0_WB_DELAY_CTRL_CONFIG); /* CH0 WB delay control register */
MV_REG_WRITE(CH_WB_DELAY_CTRL_REG(1), CONFIG_CH1_WB_DELAY_CTRL_CONFIG); /* CH1 WB delay control register */
}
/* Issue reset to codec(s) */
MV_TRC_REC("reseting voice unit(s)\n");
MV_REG_WRITE(MISC_CTRL_REG,0);
mvOsDelay(1);
MV_REG_WRITE(MISC_CTRL_REG,1);
if(spiMode)
{
/* Configure TDM to work in daisy chain mode */
mvTdmDaisyChainModeSet();
}
/* Initialize all HW units */
for(ch = 0 ; ch < MV_TDM_TOTAL_CHANNELS; ch++)
{
if(mvTdmChInit(ch) != MV_OK)
{
mvOsPrintf("mvTdmChInit(%d) failed !\n", ch);
return MV_ERROR;
}
}
/* Enable SLIC/DAA interrupt detection(before pcm is active) */
MV_REG_WRITE(INT_STATUS_MASK_REG, (MV_REG_READ(INT_STATUS_MASK_REG) | TDM_INT_SLIC));
MV_TRC_REC("<-%s\n",__FUNCTION__);
return MV_OK;
}
