/******** Transceiver_Receive **********************************************
// Hardware trigger on IRQ occurred, change the state for transceiver state
// machine in order to read message into microcontroller
// Input: none
// Output: none
// ------------------------------------------------------------------------*/
void Transceiver_Receive ( void )
{
portBASE_TYPE xHigherPriorityTaskWoken;
unsigned char rx[TRANSCEIVER_MAX_PAYLOAD];
if ( !( nrf24l01_irq_pin_active() && nrf24l01_irq_rx_dr_active() ) )
{
// ERROR: we got interupt but the interupt is not packet received
Debug_Printf ( "Transceiver_Receive: Error 0x%x\n", nrf24l01_get_status()&nrf24l01_STATUS_INTERRUPT );
goto exit;
}
//get the payload into data
nrf24l01_read_rx_payload ( rx, TRANSCEIVER_MAX_PAYLOAD );
Debug_NetworkTransceiver_PrintPayload(rx);
if ( pdTRUE != xQueueSendFromISR(Transceiver_RX_Queue, rx, &xHigherPriorityTaskWoken) )
{
// ERROR: Queue is full
Debug_Printf ("Transceiver_Receive: Error 0x%x\n", ERROR_QUEUE_FULL);
if ( FullQueueCallBack != NULL )
xTaskCreate( Transceiver_FullQueueCallBack, ( signed portCHAR * ) "Transceiver_FullQueueCallBack",
DEFAULT_STACK_SIZE, NULL, DEFAULT_PRIORITY, NULL );
goto exit;
}
exit:
nrf24l01_irq_clear_all();
Delay_US(130);
}
void rf24test()
{
uint8_t test_pipe = 0;
byte* payload = "qwerasd1qwerasd2qwerasd3qwerasd4";
byte* rx_pld = "11111111111111111111111111111111";
uint8_t payload_len = strlen(payload);
memset(rx_pld, '\0', payload_len);
nrf24l01_conf_t writer;
nrf24l01_init_config(&writer);
writer.ce_port= &PORTD;
writer.ce_pin = PD6;
writer.ss_port = &PORTC;
writer.ss_pin = PC4;
writer.pipe_addr_len = 0;
usart_write_string_line("Initializing..");
DBG_VALUE("Writer: Init: ", nrf24l01_init(&writer, &DDRD, &DDRC));
DBG_VALUE("Writer: Speed: ", nrf24l01_get_speed(&writer));
DBG_VALUE("Writer: Channel: ", nrf24l01_get_channel(&writer));
DBG_VALUE("Writer: Status: ", nrf24l01_get_status(&writer));
nrf24l01_set_retries(&writer, 4, 2);
nrf24l01_set_power_amplifier(&writer, NRF24L01_PA_MAX);
nrf24l01_enable_dynamic_payload_on_pipe(&writer, test_pipe, NRF24L01_ENABLE);
nrf24l01_print_addresses(&writer);
usart_write_string_line("Preparing for write:");
nrf24l01_prepare_for_write_to_addr(&writer, (byte*) "2Node", payload_len,NRF24L01_DISABLE);
nrf24l01_print_status(&writer);
while(1)
{
nrf24l01_set_retries(&writer, 1, 1);
usart_write_string_line("Writing:");
nrf24l01_write(&writer, payload, payload_len - 5);
nrf24l01_print_status(&writer);
usart_write_string_line("Ending writing:");
nrf24l01_end_writing_keep_irq(&writer);
nrf24l01_print_status(&writer);
usart_read_byte();
}
}
//returns the current pipe in the 24L01's STATUS register
unsigned char nrf24l01_get_rx_pipe()
{
return nrf24l01_get_rx_pipe_from_status(nrf24l01_get_status());
}
//returns true if MAX_RT interrupt is active, false otherwise
bool nrf24l01_irq_max_rt_active()
{
return (nrf24l01_get_status() & nrf24l01_STATUS_MAX_RT);
}
//returns true if TX_DS interrupt is active, false otherwise
bool nrf24l01_irq_tx_ds_active()
{
return (nrf24l01_get_status() & nrf24l01_STATUS_TX_DS);
}
//returns true if RX_DR interrupt is active, false otherwise
bool nrf24l01_irq_rx_dr_active()
{
return (nrf24l01_get_status() & nrf24l01_STATUS_RX_DR);
}
