void tim2_isr() {
// No signal
if(TIM2_SR & TIM_SR_UIF) { // update interrupt
TIM2_SR = 0;
overcapture = 1;
nvic_disable_irq(NVIC_TIM2_IRQ);
TIM2_DIER = 0;
US_mode = US_MODE_READY;
//DBG("overcaptured\n");
}
// end of Trig pulse or start of measurements
if(TIM2_SR & TIM_SR_CC3IF) { // CCR ch3 interrupt
if(US_mode == US_MODE_TRIG) { // triggered - run measurement
run_measrmnt();
} else if(US_mode == US_MODE_WAIT) {
US_mode = US_MODE_MEASUREMENT;
}
TIM2_SR &= ~TIM_SR_CC3IF;
}
if(TIM2_SR & TIM_SR_CC4IF) {
if(US_mode == US_MODE_MEASUREMENT) {
US_mode = US_MODE_READY;
nvic_disable_irq(NVIC_TIM2_IRQ);
TIM2_DIER = 0;
TIM2_CR1 = 0; // turn off timer - we don't need it more
}
TIM2_SR &= ~TIM_SR_CC3IF;
}
}
void imu_aspirin_arch_int_disable(void) {
#ifdef ASPIRIN_USE_GYRO_INT
nvic_disable_irq(NVIC_EXTI15_10_IRQ);
#endif
nvic_disable_irq(NVIC_EXTI2_IRQ);
// should not be needed anymore, handled by the spi driver
#if 0
/* Enable DMA1 channel4 IRQ Channel ( SPI RX) */
nvic_disable_irq(NVIC_DMA1_CHANNEL4_IRQ);
#endif
}
void init_m3_state_machine(void)
{
int i = 0;
/* Flush out NVIC interrupts */
for (i=0; i<AM335X_NUM_EXT_INTERRUPTS; i++)
{
nvic_disable_irq(i);
nvic_clear_irq(i);
}
msg_init();
trace_init();
pm_init();
/* Enable only the MBX IRQ */
nvic_enable_irq(AM335X_IRQ_MBINT0);
/*
* In the remote case where we disabled the MPU CLOCK
* enable it again, no harm in writing to the reg
* even if this was not needed
*/
mpu_enable();
a8_notify(CMD_STAT_PASS);
}
void PPMin_Stop()
{
nvic_disable_irq(NVIC_EXTI9_5_IRQ);
exti_disable_request(_PWM_EXTI);
timer_disable_counter(TIM1);
ppmSync = 0;
}
void baseband_streaming_disable() {
sgpio_cpld_stream_disable();
nvic_disable_irq(NVIC_SGPIO_IRQ);
usb_endpoint_disable(&usb_endpoint_bulk_in);
usb_endpoint_disable(&usb_endpoint_bulk_out);
}
int am335_init(void)
{
int i;
/*
* Each interrupt has a priority register associated with it
* 8 bits... only 7:6:5:4 are available for SA
* out of the 16 levels here... using a priority grouping
* these 4 bits can be further split into preempt priority
* and subpriority fields
*/
scr_enable_sleepdeep();
scr_enable_sleeponexit();
/* Disable all the external interrupts */
for (i=0; i < CM3_NUM_EXT_INTERRUPTS; i++)
nvic_disable_irq(i);
/* Disable Tamper swakeup, a new addition for AM43XX SOCs */
if (soc_id == AM43XX_SOC_ID)
nvic_disable_irq(CM3_IRQ_TPM_WAKE);
/* Clean the IPC registers */
m3_param_reset();
trace_init();
pm_reset();
setup_soc();
/* Enable only the MBX IRQ */
nvic_enable_irq(CM3_IRQ_MBINT0);
nvic_enable_irq(53);
m3_firmware_version();
/* TODO: Enable PRCM_INT2 with a dummy handler */
/* Notify A8 of init completion */
a8_notify(CMD_STAT_PASS);
/* Ok we are done here */
return 0;
}
void tim7_isr(void)
{
timer_clear_flag(TIM7, TIM_SR_UIF);
state.rht_timeout = true;
nvic_disable_irq(NVIC_TIM7_IRQ);
timer_disable_irq(TIM7, TIM_DIER_UIE);
timer_disable_counter(TIM7);
}
void cc3k_global_irq_enable(char val) {
if (val) {
nvic_enable_irq(NVIC_EXTI0_1_IRQ);
systick_interrupt_enable();
} else {
nvic_disable_irq(NVIC_EXTI0_1_IRQ);
systick_interrupt_disable();
}
}
void UART_Stop()
{
UART_StopReceive();
nvic_disable_irq(get_nvic_dma_irq(USART_DMA));
usart_set_mode(UART_CFG.uart, 0);
usart_disable(UART_CFG.uart);
rcc_periph_clock_disable(get_rcc_from_port(UART_CFG.uart));
GPIO_setup_input(UART_CFG.tx, ITYPE_FLOAT);
}
/** @brief Disable the wakeup timer interrupt
@warning You must unlock the registers before using this function
*/
void rtc_disable_wakeup_timer_interrupt(void) {
// 1. Disable EXTI Line 22
exti_disable_request(EXTI22);
// 2. Disable RTC_WKUP IRQ channel in the NVIC.
nvic_disable_irq(NVIC_RTC_WKUP_IRQ);
// 3. Disable RTC wakeup timer event.
RTC_CR &= ~RTC_CR_WUTIE;
}
void acq_pause()
{
gpio_clear(BANK_LED, GPIO_LED);
spi_disable(SPI_C1);
spi_disable_rx_dma(SPI_C1);
dma_disable_transfer_complete_interrupt(DMA1, DMA_CHANNEL2);
dma_disable_half_transfer_interrupt(DMA1, DMA_CHANNEL2);
dma_disable_channel(DMA1, DMA_CHANNEL2);
nvic_disable_irq(NVIC_DMA1_CHANNEL2_IRQ);
}
//# MENU spectrum
void spectrum_menu()
{
lcdClear();
lcdDisplay();
getInputWaitRelease();
// RF initialization from ppack.c:
dac_init(false);
cpu_clock_set(204); // WARP SPEED! :-)
hackrf_clock_init();
rf_path_pin_setup();
/* Configure external clock in */
scu_pinmux(SCU_PINMUX_GP_CLKIN, SCU_CLK_IN | SCU_CONF_FUNCTION1);
sgpio_configure_pin_functions();
ON(EN_VDD);
ON(EN_1V8);
OFF(MIC_AMP_DIS);
delayms(500); // doesn't work without
cpu_clock_set(204); // WARP SPEED! :-)
si5351_init();
portapack_init();
while(1)
{
switch(getInput())
{
case BTN_UP:
displayMode=MODE_WATERFALL;
break;
case BTN_DOWN:
displayMode=MODE_SPECTRUM;
break;
case BTN_LEFT:
freq -= 2000000;
ssp1_set_mode_max2837();
set_freq(freq);
break;
case BTN_RIGHT:
freq += 2000000;
ssp1_set_mode_max2837();
set_freq(freq);
break;
case BTN_ENTER:
//FIXME: unset the callback, reset the clockspeed, tidy up
nvic_disable_irq(NVIC_DMA_IRQ);
OFF(EN_VDD);
OFF(EN_1V8);
ON(MIC_AMP_DIS);
systick_set_clocksource(0);
systick_set_reload(12e6/SYSTICKSPEED/1000);
return;
}
}
}
void
usart_uninit(int usart, int irq) {
/* Disable the IRQ. */
nvic_disable_irq(irq);
/* Disable the USART. */
usart_disable(usart);
/* Disable usart Receive interrupt. */
USART_CR1(usart) &= ~USART_CR1_RXNEIE;
}
void panic(void) {
int i;
nvic_disable_irq(NVIC_EXTI0_1_IRQ);
systick_interrupt_disable();
while(1) {
led(0, 0); led(1, 0);
for (i=0;i<100000;i++) asm volatile("nop");
led(0, 1); led(1, 1);
for (i=0;i<100000;i++) asm volatile("nop");
}
}
/* Enable serial data reception by providing a callback function
to accept received character and status. Disable by calling with argument NULL.
Callback executes in interrupt context and must be short.
*/
void UART_StartReceive(usart_callback_t *isr_callback)
{
rx_callback = isr_callback;
if (isr_callback) {
nvic_enable_irq(get_nvic_irq(UART_CFG.uart));
usart_enable_rx_interrupt(UART_CFG.uart);
} else {
usart_disable_rx_interrupt(UART_CFG.uart);
nvic_disable_irq(get_nvic_irq(UART_CFG.uart));
}
}
void hal_uart_dma_set_csr_irq_handler( void (*the_irq_handler)(void)){
if (the_irq_handler){
/* Configure the EXTI13 interrupt (USART3_CTS is on PB13) */
nvic_enable_irq(NVIC_EXTI15_10_IRQ);
exti_select_source(EXTI13, GPIOB);
exti_set_trigger(EXTI13, EXTI_TRIGGER_RISING);
exti_enable_request(EXTI13);
} else {
exti_disable_request(EXTI13);
nvic_disable_irq(NVIC_EXTI15_10_IRQ);
}
cts_irq_handler = the_irq_handler;
}
void platform_request_boot(void)
{
/* Disconnect USB cable */
usbd_disconnect(usbdev, 1);
nvic_disable_irq(USB_IRQ);
/* Assert blue LED as indicator we are in the bootloader */
rcc_peripheral_enable_clock(&RCC_AHB1ENR, RCC_AHB1ENR_IOPDEN);
gpio_mode_setup(LED_PORT, GPIO_MODE_OUTPUT,
GPIO_PUPD_NONE, LED_BOOTLOADER);
gpio_set(LED_PORT, LED_BOOTLOADER);
/* Jump to the built in bootloader by mapping System flash */
rcc_peripheral_enable_clock(&RCC_APB2ENR, RCC_APB2ENR_SYSCFGEN);
SYSCFG_MEMRM &= ~3;
SYSCFG_MEMRM |= 1;
}
void
usart_init(int usart, int irq, int baudrate, int over8) {
/* Setup USART parameters. */
nvic_disable_irq(irq);
usart_disable_rx_interrupt(usart);
usart_disable_tx_interrupt(usart);
usart_disable(usart);
USART_CR1(usart) |= over8; /* This doubles the listed baudrate. */
usart_set_baudrate(usart, baudrate);
usart_set_databits(usart, 8);
usart_set_stopbits(usart, USART_STOPBITS_1);
usart_set_mode(usart, USART_MODE_TX_RX);
usart_set_parity(usart, USART_PARITY_NONE);
usart_set_flow_control(usart, USART_FLOWCONTROL_NONE);
/* Finally enable the USART. */
usart_enable(usart);
usart_enable_rx_interrupt(usart);
usart_enable_tx_interrupt(usart);
nvic_enable_irq(irq);
}
/* USB (high priority) interrupt */
void usb_hp_isr(void)
{
u16 status;
u16 mask;
int ep_id;
u16 trans;
int n;
int i;
u32 *p;
u32 tmp;
static int count;
/* Interrupt mask */
mask = usbdevfs_get_interrupt_mask(USBDEVFS_CORRECT_TRANSFER);
if (!mask)
return;
/* Interrupt status */
status = usbdevfs_get_interrupt_status(USBDEVFS_CORRECT_TRANSFER |
USBDEVFS_EP_ID);
if (!(status & USBDEVFS_CORRECT_TRANSFER))
return;
/* Correct transfer */
ep_id = status & USBDEVFS_EP_ID;
trans = usbdevfs_get_ep_status(ep_id, USBDEVFS_RX | USBDEVFS_RX_DATA1);
/* Isochronous endpoint Rx (OUT transaction) */
if (ep_id != 1 || !(trans & USBDEVFS_RX))
return;
/* Read data from packet buffer. */
if (trans & USBDEVFS_RX_DATA1)
n = usbdevfs_read0(ep_id, (u16 *)queue[tail], AS_SIZE);
else
n = usbdevfs_read1(ep_id, (u16 *)queue[tail], AS_SIZE);
/* too short packet (data error ?) */
if (n < AS_SIZE)
short_packet++;
if (n >= (int)sizeof(u32)) {
/* -32768, 32767 => 0, 0xfff0 */
p = queue[tail];
for (i = 0; i < n; i += 4) {
tmp = *p;
*p++ = (tmp & 0xfff0fff0) ^ 0x80008000;
}
/* Data length (word count) */
data_len[tail] = n / sizeof(u32);
/* Disable DMA1 channel3 interrupt. */
nvic_disable_irq(DMA_TIM7_UP_IRQ);
/* Enqueue. */
if ((tail + 1) % QUEUESIZE != head) {
tail = (tail + 1) % QUEUESIZE;
/* LED ON/OFF */
if (++count == 100) {
gpio_toggle(GPIO_PE11);
count = 0;
}
}
/* Enable DMA1 channel3 interrupt. */
nvic_enable_irq(DMA_TIM7_UP_IRQ);
}
/* Clear interrupt. */
usbdevfs_clear_endpoint_interrupt(1);
}
void platform_mrf_interrupt_disable(void)
{
exti_disable_request(MRF_INTERRUPT_EXTI);
nvic_disable_irq(MRF_INTERRUPT_NVIC);
}
/// Disable DMA channel interrupts
static void spi_arch_int_disable(struct spi_periph *spi) {
nvic_disable_irq( ((struct spi_periph_dma *)spi->init_struct)->rx_nvic_irq );
nvic_disable_irq( ((struct spi_periph_dma *)spi->init_struct)->tx_nvic_irq );
}
void MSCdisable(void){
USBD_API->hw->Connect(g_hUsb, 0);
nvic_disable_irq(NVIC_USB0_IRQ);
}
void exti3_isr(void) {
int i, j;
uint16_t endFillByte;
gpio_set(GREEN_LED_PORT, GREEN_LED_PIN);
// gpio_set(RED_LED_PORT, RED_LED_PIN);
// iprintf("fill bytes\r\n");
exti_reset_request(EXTI3);
iprintf("exti3_isr\r\n");
if(media_file.buffer_ready[media_file.active_buffer] == 0) {
iprintf("Buffer %d was ready...\r\n", media_file.active_buffer);
while(gpio_get(CODEC_DREQ_PORT, CODEC_DREQ)) {
// iprintf("loop\r\n");
gpio_set(CODEC_PORT, CODEC_CS);
if(!media_file.near_end) {
for(i=0;i<32;i++) {
spi_xfer(CODEC_SPI, media_file.buffer[media_file.active_buffer][current_track.byte_count++]);
}
if((current_track.byte_count % 512) == 0) {
gpio_clear(CODEC_PORT, CODEC_CS);
}
if(current_track.byte_count == MEDIA_BUFFER_SIZE) {
// iprintf("reading\r\n");
sdfat_read_media();
current_track.byte_count = 0;
gpio_clear(CODEC_PORT, CODEC_CS);
// iprintf("swapping...\r\n");
/* fetch the value of current decode position */
vs1053_SCI_write(SCI_WRAMADDR, PARAM_POSITION_LO);
for(i=0;i<150;i++) {__asm__("nop\n\t");}
current_track.pos = vs1053_SCI_read(SCI_WRAM);
for(i=0;i<150;i++) {__asm__("nop\n\t");}
vs1053_SCI_write(SCI_WRAMADDR, PARAM_POSITION_HI);
for(i=0;i<150;i++) {__asm__("nop\n\t");}
current_track.pos += vs1053_SCI_read(SCI_WRAM) << 16;
// iprintf("swap\r\n");
gpio_set(CODEC_PORT, CODEC_CS);
while(media_file.buffer_ready[media_file.active_buffer]) {__asm__("nop\n\t");}
// iprintf("Breaking out\r\n");
// break;
// }
}
} else {
for(i=0;i<32;i++) {
if(current_track.byte_count > media_file.file_end) {
iprintf("ending\r\n");
// Ought to do this next bit by issuing a player_stop job so that the cleanup code
// is all in one place and we can power down everything automatically for power saving
/* now need to clean up the fifos and stop the player */
gpio_clear(CODEC_PORT, CODEC_CS);
/* fetch the value of endFillByte */
vs1053_SCI_write(SCI_WRAMADDR, PARAM_END_FILL_BYTE);
while(!gpio_get(CODEC_DREQ_PORT, CODEC_DREQ)) {__asm__("nop\n\t");}
endFillByte = vs1053_SCI_read(SCI_WRAM) & 0xFF;
iprintf("End Fill Byte %02X\r\n", endFillByte);
gpio_set(CODEC_PORT, CODEC_CS);
for(i=0;i<65;i++) {
while(!gpio_get(CODEC_DREQ_PORT, CODEC_DREQ)) {__asm__("nop\n\t");}
for(j=0;j<32;j++) {
spi_xfer(CODEC_SPI, endFillByte);
}
}
gpio_clear(CODEC_PORT, CODEC_CS);
i = vs1053_SCI_read(SCI_MODE);
i |= SM_CANCEL;
vs1053_SCI_write(SCI_MODE, i);
gpio_set(CODEC_PORT, CODEC_CS);
j = 0;
while(j < 2048) {
while(!gpio_get(CODEC_DREQ_PORT, CODEC_DREQ)) {__asm__("nop\n\t");}
for(i=0;i<32;i++) {
spi_xfer(CODEC_SPI, endFillByte);
}
j += 32;
if(!(vs1053_SCI_read(SCI_MODE) & SM_CANCEL)) {
break;
}
}
gpio_clear(CODEC_PORT, CODEC_CS);
if(j >= 2048) {
/* need to do a software reset */
vs1053_SCI_write(SCI_MODE, SM_RESET);
}
iprintf("End Fill Byte %02X\r\n", endFillByte);
current_track_playing = 0;
exti_reset_request(EXTI3);
exti_disable_request(EXTI3);
nvic_disable_irq(NVIC_EXTI3_IRQ);
return;
} else {
spi_xfer(CODEC_SPI, media_file.buffer[media_file.active_buffer][current_track.byte_count++]);
}
}
}
}
}
gpio_clear(GREEN_LED_PORT, GREEN_LED_PIN);
}
/* ----------------------- Close Serial Port ----------------------------------*/
void
vMBPortSerialClose(void)
{
nvic_disable_irq(MB_USART_VECTOR);
usart_disable (MB_USART);
}
