static int malidp_platform_probe(struct platform_device *pdev)
{
struct device_node *port, *ep;
struct component_match *match = NULL;
if (!pdev->dev.of_node)
return -ENODEV;
/* there is only one output port inside each device, find it */
ep = of_graph_get_next_endpoint(pdev->dev.of_node, NULL);
if (!ep)
return -ENODEV;
if (!of_device_is_available(ep)) {
of_node_put(ep);
return -ENODEV;
}
/* add the remote encoder port as component */
port = of_graph_get_remote_port_parent(ep);
of_node_put(ep);
if (!port || !of_device_is_available(port)) {
of_node_put(port);
return -EAGAIN;
}
component_match_add(&pdev->dev, &match, malidp_compare_dev, port);
return component_master_add_with_match(&pdev->dev, &malidp_master_ops,
match);
}
struct device_node *tegra_panel_get_dt_node(
struct tegra_dc_platform_data *pdata)
{
struct tegra_dc_out *dc_out = pdata->default_out;
struct device_node *np_panel = NULL;
struct board_info display_board;
tegra_get_display_board_info(&display_board);
switch (display_board.board_id) {
case BOARD_E1627:
tegra_panel_register_ops(dc_out, &dsi_p_wuxga_10_1_ops);
np_panel = of_find_compatible_node(NULL, NULL, "p,wuxga-10-1");
break;
case BOARD_E1549:
tegra_panel_register_ops(dc_out, &dsi_lgd_wxga_7_0_ops);
np_panel = of_find_compatible_node(NULL, NULL, "lg,wxga-7");
break;
case BOARD_E1639:
case BOARD_E1813:
tegra_panel_register_ops(dc_out, &dsi_s_wqxga_10_1_ops);
np_panel = of_find_compatible_node(NULL, NULL, "s,wqxga-10-1");
break;
default:
WARN(1, "Display panel not supported\n");
};
return of_device_is_available(np_panel) ? np_panel : NULL;
}
static void __init exynos5_dt_machine_init(void)
{
struct device_node *i2c_np;
const char *i2c_compat = "samsung,s3c2440-i2c";
unsigned int tmp;
/*
* Exynos5's legacy i2c controller and new high speed i2c
* controller have muxed interrupt sources. By default the
* interrupts for 4-channel HS-I2C controller are enabled.
* If node for first four channels of legacy i2c controller
* are available then re-configure the interrupts via the
* system register.
*/
for_each_compatible_node(i2c_np, NULL, i2c_compat) {
if (of_device_is_available(i2c_np)) {
if (of_alias_get_id(i2c_np, "i2c") < 4) {
tmp = readl(EXYNOS5_SYS_I2C_CFG);
writel(tmp & ~(0x1 << of_alias_get_id(i2c_np, "i2c")),
EXYNOS5_SYS_I2C_CFG);
}
}
}
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}
static int __init norrin_cl_dvfs_init(void)
{
struct board_info board_info;
struct device_node *dn = of_find_matching_node(NULL, dfll_of_match);
/*
* Norrin platforms maybe used with different DT variants. Some of them
* include DFLL data in DT, some - not. Check DT here, and continue with
* platform device registration only if DT DFLL node is not present.
*/
if (dn) {
bool available = of_device_is_available(dn);
of_node_put(dn);
if (available)
return 0;
}
tegra_get_board_info(&board_info);
fill_reg_map(&board_info);
norrin_cl_dvfs_data.flags = TEGRA_CL_DVFS_DYN_OUTPUT_CFG;
if (board_info.board_id == BOARD_PM374)
norrin_cl_dvfs_data.flags |= TEGRA_CL_DVFS_DATA_NEW_NO_USE;
tegra_cl_dvfs_device.dev.platform_data = &norrin_cl_dvfs_data;
platform_device_register(&tegra_cl_dvfs_device);
return 0;
}
void sdhci_get_of_property(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
struct sdhci_host *host = platform_get_drvdata(pdev);
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
const __be32 *clk;
int size;
if (of_device_is_available(np)) {
if (of_get_property(np, "sdhci,auto-cmd12", NULL))
host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12;
if (of_get_property(np, "sdhci,1-bit-only", NULL))
host->quirks |= SDHCI_QUIRK_FORCE_1_BIT_DATA;
if (sdhci_of_wp_inverted(np))
host->quirks |= SDHCI_QUIRK_INVERTED_WRITE_PROTECT;
if (of_device_is_compatible(np, "fsl,p2020-rev1-esdhc"))
host->quirks |= SDHCI_QUIRK_BROKEN_DMA;
if (of_device_is_compatible(np, "fsl,p2020-esdhc") ||
of_device_is_compatible(np, "fsl,p1010-esdhc") ||
of_device_is_compatible(np, "fsl,mpc8536-esdhc"))
host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL;
clk = of_get_property(np, "clock-frequency", &size);
if (clk && size == sizeof(*clk) && *clk)
pltfm_host->clock = be32_to_cpup(clk);
}
}
/*
* Returns the hart ID of the given device tree node, or -ENODEV if the node
* isn't an enabled and valid RISC-V hart node.
*/
int riscv_of_processor_hartid(struct device_node *node)
{
const char *isa;
u32 hart;
if (!of_device_is_compatible(node, "riscv")) {
pr_warn("Found incompatible CPU\n");
return -ENODEV;
}
if (of_property_read_u32(node, "reg", &hart)) {
pr_warn("Found CPU without hart ID\n");
return -ENODEV;
}
if (!of_device_is_available(node)) {
pr_info("CPU with hartid=%d is not available\n", hart);
return -ENODEV;
}
if (of_property_read_string(node, "riscv,isa", &isa)) {
pr_warn("CPU with hartid=%d has no \"riscv,isa\" property\n", hart);
return -ENODEV;
}
if (isa[0] != 'r' || isa[1] != 'v') {
pr_warn("CPU with hartid=%d has an invalid ISA of \"%s\"\n", hart, isa);
return -ENODEV;
}
return hart;
}
/**
* thermal_zone_of_sensor_register - registers a sensor to a DT thermal zone
* @dev: a valid struct device pointer of a sensor device. Must contain
* a valid .of_node, for the sensor node.
* @sensor_id: a sensor identifier, in case the sensor IP has more
* than one sensors
* @data: a private pointer (owned by the caller) that will be passed
* back, when a temperature reading is needed.
* @ops: struct thermal_zone_of_device_ops *. Must contain at least .get_temp.
*
* This function will search the list of thermal zones described in device
* tree and look for the zone that refer to the sensor device pointed by
* @dev->of_node as temperature providers. For the zone pointing to the
* sensor node, the sensor will be added to the DT thermal zone device.
*
* The thermal zone temperature is provided by the @get_temp function
* pointer. When called, it will have the private pointer @data back.
*
* The thermal zone temperature trend is provided by the @get_trend function
* pointer. When called, it will have the private pointer @data back.
*
* TODO:
* 01 - This function must enqueue the new sensor instead of using
* it as the only source of temperature values.
*
* 02 - There must be a way to match the sensor with all thermal zones
* that refer to it.
*
* Return: On success returns a valid struct thermal_zone_device,
* otherwise, it returns a corresponding ERR_PTR(). Caller must
* check the return value with help of IS_ERR() helper.
*/
struct thermal_zone_device *
thermal_zone_of_sensor_register(struct device *dev, int sensor_id, void *data,
const struct thermal_zone_of_device_ops *ops)
{
struct device_node *np, *child, *sensor_np;
struct thermal_zone_device *tzd = ERR_PTR(-ENODEV);
np = of_find_node_by_name(NULL, "thermal-zones");
if (!np)
return ERR_PTR(-ENODEV);
if (!dev || !dev->of_node) {
of_node_put(np);
return ERR_PTR(-EINVAL);
}
sensor_np = of_node_get(dev->of_node);
for_each_child_of_node(np, child) {
struct of_phandle_args sensor_specs;
int ret, id;
/* Check whether child is enabled or not */
if (!of_device_is_available(child))
continue;
/* For now, thermal framework supports only 1 sensor per zone */
ret = of_parse_phandle_with_args(child, "thermal-sensors",
"#thermal-sensor-cells",
0, &sensor_specs);
if (ret)
continue;
if (sensor_specs.args_count >= 1) {
id = sensor_specs.args[0];
WARN(sensor_specs.args_count > 1,
"%s: too many cells in sensor specifier %d\n",
sensor_specs.np->name, sensor_specs.args_count);
} else {
id = 0;
}
if (sensor_specs.np == sensor_np && id == sensor_id) {
tzd = thermal_zone_of_add_sensor(child, sensor_np,
data, ops);
if (!IS_ERR(tzd))
tzd->ops->set_mode(tzd, THERMAL_DEVICE_ENABLED);
of_node_put(sensor_specs.np);
of_node_put(child);
goto exit;
}
of_node_put(sensor_specs.np);
}
exit:
of_node_put(sensor_np);
of_node_put(np);
return tzd;
}
static int __init test_power_init(void)
{
int i;
int ret;
struct device_node *dev_node;
dev_node = of_find_node_by_name(NULL, "test-power");
if (IS_ERR_OR_NULL(dev_node)) {
pr_info("not find %s dev node\n", __func__);
return 0;
}
if (!of_device_is_available(dev_node)) {
pr_info("test power disabled\n");
return 0;
}
for (i = 0; i < ARRAY_SIZE(test_power_supplies); i++) {
ret = power_supply_register(NULL, &test_power_supplies[i]);
if (ret) {
pr_err("%s: failed to register %s\n", __func__,
test_power_supplies[i].name);
goto failed;
}
}
module_initialized = true;
return 0;
failed:
while (--i >= 0)
power_supply_unregister(&test_power_supplies[i]);
return ret;
}
static int __init its_fsl_mc_msi_init(void)
{
struct device_node *np;
struct irq_domain *parent;
struct irq_domain *mc_msi_domain;
for (np = of_find_matching_node(NULL, its_device_id); np;
np = of_find_matching_node(np, its_device_id)) {
if (!of_device_is_available(np))
continue;
if (!of_property_read_bool(np, "msi-controller"))
continue;
parent = irq_find_matching_host(np, DOMAIN_BUS_NEXUS);
if (!parent || !msi_get_domain_info(parent)) {
pr_err("%pOF: unable to locate ITS domain\n", np);
continue;
}
mc_msi_domain = fsl_mc_msi_create_irq_domain(
of_node_to_fwnode(np),
&its_fsl_mc_msi_domain_info,
parent);
if (!mc_msi_domain) {
pr_err("%pOF: unable to create fsl-mc domain\n", np);
continue;
}
pr_info("fsl-mc MSI: %pOF domain created\n", np);
}
return 0;
}
static int ath9k_of_init(struct ath_softc *sc)
{
struct device_node *np = sc->dev->of_node;
struct ath_hw *ah = sc->sc_ah;
struct ath_common *common = ath9k_hw_common(ah);
enum ath_bus_type bus_type = common->bus_ops->ath_bus_type;
const char *mac;
char eeprom_name[100];
int ret;
if (!of_device_is_available(np))
return 0;
ath_dbg(common, CONFIG, "parsing configuration from OF node\n");
if (of_property_read_bool(np, "qca,no-eeprom")) {
/* ath9k-eeprom-<bus>-<id>.bin */
scnprintf(eeprom_name, sizeof(eeprom_name),
"ath9k-eeprom-%s-%s.bin",
ath_bus_type_to_string(bus_type), dev_name(ah->dev));
ret = ath9k_eeprom_request(sc, eeprom_name);
if (ret)
return ret;
ah->ah_flags &= ~AH_USE_EEPROM;
ah->ah_flags |= AH_NO_EEP_SWAP;
}
mac = of_get_mac_address(np);
if (!IS_ERR(mac))
ether_addr_copy(common->macaddr, mac);
return 0;
}
static struct device_node *kirin_get_remote_node(struct device_node *np)
{
struct device_node *endpoint, *remote;
/* get the first endpoint, in our case only one remote node
* is connected to display controller.
*/
endpoint = of_graph_get_next_endpoint(np, NULL);
if (!endpoint) {
DRM_ERROR("no valid endpoint node\n");
return ERR_PTR(-ENODEV);
}
remote = of_graph_get_remote_port_parent(endpoint);
of_node_put(endpoint);
if (!remote) {
DRM_ERROR("no valid remote node\n");
return ERR_PTR(-ENODEV);
}
if (!of_device_is_available(remote)) {
DRM_ERROR("not available for remote node\n");
return ERR_PTR(-ENODEV);
}
return remote;
}
/**
* of_platform_device_create_pdata - Alloc, initialize and register an of_device
* @np: pointer to node to create device for
* @bus_id: name to assign device
* @platform_data: pointer to populate platform_data pointer with
* @parent: Linux device model parent device.
*
* Returns pointer to created platform device, or NULL if a device was not
* registered. Unavailable devices will not get registered.
*/
struct platform_device *of_platform_device_create_pdata(
struct device_node *np,
const char *bus_id,
void *platform_data,
struct device *parent)
{
struct platform_device *dev;
if (!of_device_is_available(np))
return NULL;
dev = of_device_alloc(np, bus_id, parent);
if (!dev)
return NULL;
#if defined(CONFIG_MICROBLAZE)
dev->archdata.dma_mask = 0xffffffffUL;
#endif
dev->dev.coherent_dma_mask = DMA_BIT_MASK(32);
dev->dev.bus = &platform_bus_type;
dev->dev.platform_data = platform_data;
/* We do not fill the DMA ops for platform devices by default.
* This is currently the responsibility of the platform code
* to do such, possibly using a device notifier
*/
if (of_device_add(dev) != 0) {
platform_device_put(dev);
return NULL;
}
return dev;
}
struct platform_device *of_platform_device_create_pdata(
struct device_node *np,
const char *bus_id,
void *platform_data,
struct device *parent)
{
struct platform_device *dev;
if (!of_device_is_available(np))
return NULL;
dev = of_device_alloc(np, bus_id, parent);
if (!dev)
return NULL;
#if defined(CONFIG_MICROBLAZE)
dev->archdata.dma_mask = 0xffffffffUL;
#endif
dev->dev.coherent_dma_mask = DMA_BIT_MASK(sizeof(dma_addr_t) * 8);
dev->dev.bus = &platform_bus_type;
dev->dev.platform_data = platform_data;
if (of_device_add(dev) != 0) {
platform_device_put(dev);
return NULL;
}
return dev;
}
static struct amba_device *of_amba_device_create(struct device_node *node,
const char *bus_id,
void *platform_data,
struct device *parent)
{
struct amba_device *dev;
const void *prop;
int i, ret;
pr_debug("Creating amba device %s\n", node->full_name);
if (!of_device_is_available(node))
return NULL;
dev = amba_device_alloc(NULL, 0, 0);
if (!dev) {
pr_err("%s(): amba_device_alloc() failed for %s\n",
__func__, node->full_name);
return NULL;
}
/* setup generic device info */
dev->dev.coherent_dma_mask = ~0;
dev->dev.of_node = of_node_get(node);
dev->dev.parent = parent;
dev->dev.platform_data = platform_data;
if (bus_id)
dev_set_name(&dev->dev, "%s", bus_id);
else
of_device_make_bus_id(&dev->dev);
/* Allow the HW Peripheral ID to be overridden */
prop = of_get_property(node, "arm,primecell-periphid", NULL);
if (prop)
dev->periphid = of_read_ulong(prop, 1);
/* Decode the IRQs and address ranges */
for (i = 0; i < AMBA_NR_IRQS; i++)
dev->irq[i] = irq_of_parse_and_map(node, i);
ret = of_address_to_resource(node, 0, &dev->res);
if (ret) {
pr_err("%s(): of_address_to_resource() failed (%d) for %s\n",
__func__, ret, node->full_name);
goto err_free;
}
ret = amba_device_add(dev, &iomem_resource);
if (ret) {
pr_err("%s(): amba_device_add() failed (%d) for %s\n",
__func__, ret, node->full_name);
goto err_free;
}
return dev;
err_free:
amba_device_put(dev);
return NULL;
}
static int am33xx_pm_rtc_setup(void)
{
struct device_node *np;
np = of_find_node_by_name(NULL, "rtc");
if (of_device_is_available(np)) {
omap_rtc = rtc_class_open("rtc0");
if (!omap_rtc) {
pr_warn("PM: rtc0 not available");
return -EPROBE_DEFER;
}
rtc_read_scratch(omap_rtc, RTC_SCRATCH_MAGIC_REG,
&rtc_magic_val);
if ((rtc_magic_val & 0xffff) != RTC_REG_BOOT_MAGIC)
pr_warn("PM: bootloader does not support rtc-only!\n");
pm_sram->rtc_base_virt = pm_ops->get_rtc_base_addr();
rtc_write_scratch(omap_rtc, RTC_SCRATCH_MAGIC_REG, 0);
rtc_write_scratch(omap_rtc, RTC_SCRATCH_RESUME_REG,
pm_sram->rtc_resume_phys_addr);
} else {
pr_warn("PM: no-rtc available, rtc-only mode disabled.\n");
}
return 0;
}
static int
dbmd2_init_dai_link(struct snd_soc_card *card)
{
int nCnt;
struct snd_soc_dai_link *dai_link;
struct device_node *codec_node, *platform_node;
codec_node = of_find_node_by_name(0, CODEC_NAME);
if (!of_device_is_available(codec_node)) {
codec_node = of_find_node_by_name(codec_node, CODEC_NAME);
}
if (!codec_node) {
printk(KERN_ERR "Codec node not found\n");
return -1;
}
platform_node = of_find_node_by_name(0, PLATFORM_DEV_NAME);
if (!platform_node) {
printk(KERN_ERR "Platform node not found\n");
return -1;
}
for (nCnt = 0; nCnt < card->num_links; nCnt++) {
dai_link = &card->dai_link[nCnt];
dai_link->codec_of_node = codec_node;
dai_link->platform_of_node = platform_node;
}
return 0;
}
/**
* of_platform_device_create_pdata - Alloc, initialize and register an of_device
* @np: pointer to node to create device for
* @bus_id: name to assign device
* @platform_data: pointer to populate platform_data pointer with
* @parent: Linux device model parent device.
*
* Returns pointer to created platform device, or NULL if a device was not
* registered. Unavailable devices will not get registered.
*/
static struct platform_device *of_platform_device_create_pdata(
struct device_node *np,
const char *bus_id,
void *platform_data,
struct device *parent)
{
struct platform_device *dev;
if (!of_device_is_available(np) ||
of_node_test_and_set_flag(np, OF_POPULATED))
return NULL;
dev = of_device_alloc(np, bus_id, parent);
if (!dev)
goto err_clear_flag;
dev->dev.bus = &platform_bus_type;
dev->dev.platform_data = platform_data;
of_dma_configure(&dev->dev, dev->dev.of_node);
of_msi_configure(&dev->dev, dev->dev.of_node);
if (of_device_add(dev) != 0) {
of_dma_deconfigure(&dev->dev);
platform_device_put(dev);
goto err_clear_flag;
}
return dev;
err_clear_flag:
of_node_clear_flag(np, OF_POPULATED);
return NULL;
}
/**
* tegra_init_hdmi - initialize and add HDMI device if not disabled by DT
*/
int tegra_init_hdmi(struct platform_device *pdev,
struct platform_device *phost1x)
{
struct resource __maybe_unused *res;
bool enabled = true;
int err;
#ifdef CONFIG_OF
struct device_node *hdmi_node = NULL;
hdmi_node = of_find_node_by_path("/host1x/hdmi");
/* disable HDMI if explicitly set that way in the device tree */
enabled = !hdmi_node || of_device_is_available(hdmi_node);
#endif
if (enabled) {
#ifndef CONFIG_TEGRA_HDMI_PRIMARY
res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
"fbmem");
res->start = tegra_fb2_start;
res->end = tegra_fb2_start + tegra_fb2_size - 1;
#endif
pdev->dev.parent = &phost1x->dev;
err = platform_device_register(pdev);
if (err) {
dev_err(&pdev->dev, "device registration failed\n");
return err;
}
}
return 0;
}
static void __init mpc85xx_mds_qe_init(void)
{
struct device_node *np;
np = of_find_compatible_node(NULL, NULL, "fsl,qe");
if (!np) {
np = of_find_node_by_name(NULL, "qe");
if (!np)
return;
}
if (!of_device_is_available(np)) {
of_node_put(np);
return;
}
qe_reset();
of_node_put(np);
np = of_find_node_by_name(NULL, "par_io");
if (np) {
struct device_node *ucc;
par_io_init(np);
of_node_put(np);
for_each_node_by_name(ucc, "ucc")
par_io_of_config(ucc);
}
mpc85xx_mds_reset_ucc_phys();
if (machine_is(p1021_mds)) {
struct ccsr_guts __iomem *guts;
np = of_find_node_by_name(NULL, "global-utilities");
if (np) {
guts = of_iomap(np, 0);
if (!guts)
pr_err("mpc85xx-rdb: could not map global utilities register\n");
else{
/* P1021 has pins muxed for QE and other functions. To
* enable QE UEC mode, we need to set bit QE0 for UCC1
* in Eth mode, QE0 and QE3 for UCC5 in Eth mode, QE9
* and QE12 for QE MII management signals in PMUXCR
* register.
*/
setbits32(&guts->pmuxcr, MPC85xx_PMUXCR_QE(0) |
MPC85xx_PMUXCR_QE(3) |
MPC85xx_PMUXCR_QE(9) |
MPC85xx_PMUXCR_QE(12));
iounmap(guts);
}
of_node_put(np);
}
}
}
for_each_matching_node(pctrl_np, exynos_pinctrl_ids) {
if (of_device_is_available(pctrl_np)) {
wkup_np = of_find_compatible_node(pctrl_np,
NULL, wkup_compat);
if (wkup_np)
return -ENODEV;
}
}
static int __devinit sdhci_of_probe(struct of_device *ofdev,
const struct of_device_id *match)
{
struct device_node *np = ofdev->node;
struct sdhci_of_data *sdhci_of_data = match->data;
struct sdhci_host *host;
struct sdhci_of_host *of_host;
const u32 *clk;
int size;
int ret;
if (!of_device_is_available(np))
return -ENODEV;
host = sdhci_alloc_host(&ofdev->dev, sizeof(*of_host));
if (!host)
return -ENOMEM;
of_host = sdhci_priv(host);
dev_set_drvdata(&ofdev->dev, host);
host->ioaddr = of_iomap(np, 0);
if (!host->ioaddr) {
ret = -ENOMEM;
goto err_addr_map;
}
host->irq = irq_of_parse_and_map(np, 0);
if (!host->irq) {
ret = -EINVAL;
goto err_no_irq;
}
host->hw_name = dev_name(&ofdev->dev);
if (sdhci_of_data) {
host->quirks = sdhci_of_data->quirks;
host->ops = &sdhci_of_data->ops;
}
clk = of_get_property(np, "clock-frequency", &size);
if (clk && size == sizeof(*clk) && *clk)
of_host->clock = *clk;
ret = sdhci_add_host(host);
if (ret)
goto err_add_host;
return 0;
err_add_host:
irq_dispose_mapping(host->irq);
err_no_irq:
iounmap(host->ioaddr);
err_addr_map:
sdhci_free_host(host);
return ret;
}
static void __init cns3xxx_init(void)
{
struct device_node *dn;
cns3xxx_l2x0_init();
dn = of_find_compatible_node(NULL, NULL, "cavium,cns3420-ahci");
if (of_device_is_available(dn)) {
u32 tmp;
tmp = __raw_readl(MISC_SATA_POWER_MODE);
tmp |= 0x1 << 16; /* Disable SATA PHY 0 from SLUMBER Mode */
tmp |= 0x1 << 17; /* Disable SATA PHY 1 from SLUMBER Mode */
__raw_writel(tmp, MISC_SATA_POWER_MODE);
/* Enable SATA PHY */
cns3xxx_pwr_power_up(0x1 << PM_PLL_HM_PD_CTRL_REG_OFFSET_SATA_PHY0);
cns3xxx_pwr_power_up(0x1 << PM_PLL_HM_PD_CTRL_REG_OFFSET_SATA_PHY1);
/* Enable SATA Clock */
cns3xxx_pwr_clk_en(0x1 << PM_CLK_GATE_REG_OFFSET_SATA);
/* De-Asscer SATA Reset */
cns3xxx_pwr_soft_rst(CNS3XXX_PWR_SOFTWARE_RST(SATA));
}
dn = of_find_compatible_node(NULL, NULL, "cavium,cns3420-sdhci");
if (of_device_is_available(dn)) {
u32 __iomem *gpioa = IOMEM(CNS3XXX_MISC_BASE_VIRT + 0x0014);
u32 gpioa_pins = __raw_readl(gpioa);
/* MMC/SD pins share with GPIOA */
gpioa_pins |= 0x1fff0004;
__raw_writel(gpioa_pins, gpioa);
cns3xxx_pwr_clk_en(CNS3XXX_PWR_CLK_EN(SDIO));
cns3xxx_pwr_soft_rst(CNS3XXX_PWR_SOFTWARE_RST(SDIO));
}
pm_power_off = cns3xxx_power_off;
of_platform_populate(NULL, of_default_bus_match_table,
cns3xxx_auxdata, NULL);
}
static void __init bcm2708_init_uart1(void)
{
struct device_node *np;
np = of_find_compatible_node(NULL, NULL, "brcm,bcm2835-aux-uart");
if (of_device_is_available(np)) {
pr_info("bcm2708: Mini UART enabled\n");
writel(1, __io_address(UART1_BASE + 0x4));
}
}
/**
* dwc_otg_uart_enabled - check if a usb-uart bypass func is enabled in DT
*
* Returns true if the status property of node "usb_uart" is set to "okay"
* or "ok", if this property is absent it will use the default status "ok"
* 0 otherwise
*/
static bool dwc_otg_uart_enabled(void)
{
struct device_node *np;
np = of_find_node_by_name(NULL, "usb_uart");
if (np && of_device_is_available(np))
return true;
return false;
}
int dev_read_enabled(struct udevice *dev)
{
ofnode node = dev_ofnode(dev);
if (ofnode_is_np(node))
return of_device_is_available(ofnode_to_np(node));
else
return fdtdec_get_is_enabled(gd->fdt_blob,
ofnode_to_offset(node));
}
static void armada_add_endpoints(struct device *dev,
struct component_match **match, struct device_node *port)
{
struct device_node *ep, *remote;
for_each_child_of_node(port, ep) {
remote = of_graph_get_remote_port_parent(ep);
if (!remote || !of_device_is_available(remote)) {
of_node_put(remote);
continue;
} else if (!of_device_is_available(remote->parent)) {
dev_warn(dev, "parent device of %s is not available\n",
remote->full_name);
of_node_put(remote);
continue;
}
component_match_add(dev, match, compare_of, remote);
of_node_put(remote);
}
static struct amba_device *of_amba_device_create(struct device_node *node,
const char *bus_id,
void *platform_data,
struct device *parent)
{
struct amba_device *dev;
const void *prop;
int i, ret;
pr_debug("Creating amba device %s\n", node->full_name);
if (!of_device_is_available(node))
return NULL;
dev = amba_device_alloc(NULL, 0, 0);
if (!dev)
return NULL;
dev->dev.coherent_dma_mask = ~0;
dev->dev.of_node = of_node_get(node);
dev->dev.parent = parent;
dev->dev.platform_data = platform_data;
if (bus_id)
dev_set_name(&dev->dev, "%s", bus_id);
else
of_device_make_bus_id(&dev->dev);
dev->dma_mask = ~0;
prop = of_get_property(node, "arm,primecell-periphid", NULL);
if (prop)
dev->periphid = of_read_ulong(prop, 1);
for (i = 0; i < AMBA_NR_IRQS; i++)
dev->irq[i] = irq_of_parse_and_map(node, i);
ret = of_address_to_resource(node, 0, &dev->res);
if (ret)
goto err_free;
ret = amba_device_add(dev, &iomem_resource);
if (ret)
goto err_free;
return dev;
err_free:
amba_device_put(dev);
return NULL;
}
static void __init sp804_of_init(struct device_node *np)
{
static bool initialized = false;
void __iomem *base;
int irq;
u32 irq_num = 0;
struct clk *clk1, *clk2;
const char *name = of_get_property(np, "compatible", NULL);
base = of_iomap(np, 0);
if (WARN_ON(!base))
return;
/* Ensure timers are disabled */
writel(0, base + TIMER_CTRL);
writel(0, base + TIMER_2_BASE + TIMER_CTRL);
if (initialized || !of_device_is_available(np))
goto err;
clk1 = of_clk_get(np, 0);
if (IS_ERR(clk1))
clk1 = NULL;
/* Get the 2nd clock if the timer has 3 timer clocks */
if (of_count_phandle_with_args(np, "clocks", "#clock-cells") == 3) {
clk2 = of_clk_get(np, 1);
if (IS_ERR(clk2)) {
pr_err("sp804: %s clock not found: %d\n", np->name,
(int)PTR_ERR(clk2));
clk2 = NULL;
}
} else
clk2 = clk1;
irq = irq_of_parse_and_map(np, 0);
if (irq <= 0)
goto err;
of_property_read_u32(np, "arm,sp804-has-irq", &irq_num);
if (irq_num == 2) {
__sp804_clockevents_init(base + TIMER_2_BASE, irq, clk2, name);
__sp804_clocksource_and_sched_clock_init(base, name, clk1, 1);
} else {
__sp804_clockevents_init(base, irq, clk1 , name);
__sp804_clocksource_and_sched_clock_init(base + TIMER_2_BASE,
name, clk2, 1);
}
initialized = true;
return;
err:
iounmap(base);
}
int slice_init(void){
struct device_node *node = NULL;
void *iomap_node = NULL;
u32 remap_flag=0;
s32 ret = 0;
/*p532 fpga 与p532 asic读取同一套dts，所以通过版本号区分slice来源;
* porting timer slice also source timer*/
if(BSP_BOARD_TYPE_SOC == bsp_get_version_info()->board_type|| \
BSP_BOARD_TYPE_SFT == bsp_get_version_info()->board_type)
{
node = of_find_compatible_node(NULL, NULL, "hisilicon,timer_stamp_mdm");
}
else
{
node = of_find_compatible_node(NULL, NULL, "hisilicon,timer_slice_mdm");
}
if(!node)
{
hardtimer_print_error("timer slice/stamp of_find_compatible_node failed.\r\n");
return BSP_ERROR;
}
if(!of_device_is_available(node)){
hardtimer_print_error("timer slice dts status is not ok.\n");
return BSP_ERROR;
}
ret = of_property_read_u32(node, "increase_count_flag", ×lice_ctrl.slice_is_increase);
ret |= of_property_read_u32_array(node, "offset", timeslice_ctrl.slice_offset, 2);
ret |= of_property_read_u32(node, "clock-frequency", ×lice_ctrl.slice_clock_freq);
ret |= of_property_read_u32(node, "reg", (u32*)×lice_ctrl.timerslice_base_addr_phy);
if(ret)
{
hardtimer_print_error("timer slice property get failed.\r\n");
return BSP_ERROR;
}
if(of_property_read_u32(node, "need_map", &remap_flag))
{
hardtimer_print_error("timer slice need_map get failed.\n");
return BSP_ERROR;
}
if(remap_flag){
iomap_node = of_iomap(node, 0);
if (NULL == iomap_node)
{
hardtimer_print_error("timer slice of_iomap failed.\n");
return BSP_ERROR;
}
timeslice_ctrl.timerslice_base_addr=(u32)iomap_node;
}
else
timeslice_ctrl.timerslice_base_addr=timeslice_ctrl.timerslice_base_addr_phy;
return BSP_OK;
}
const void *get_bt_fm_device_type(void)
{
int chip_type_len;
struct device_node *dp = NULL;
dp = of_find_node_by_path("/huawei_bt_info");
if (!of_device_is_available(dp))
{
FMDERR("device is not available!\n");
return NULL;
}
return of_get_property(dp,"bt,chiptype", &chip_type_len);
}