int bcm2076_bluetooth_suspend(struct platform_device *pdev, pm_message_t state)
{
#if BT_HOST_WAKE_INT_ENABLED
int irq = gpio_to_irq(BT_HOST_WAKE_GPIO);
int host_wake;
disable_irq(irq);
host_wake = gpio_get_value(BT_HOST_WAKE_GPIO);
if (host_wake) {
enable_irq(irq);
return -EBUSY;
}
//Mux RTS pin into GPIO PULL UP pin (this flows off the 2076)
pr_debug("** suspend ** changing RTS pin to GPIO pulled up\n");
omap_rts_mux_write(MUX_PULL_UP, UART2);
#else
pr_debug( "%s: BT_HOST_WAKE disabled\n",__FUNCTION__);
#endif //BT_HOST_WAKE_INT_ENABLED
if( idme_query_board_type( IDME_BOARD_TYPE_TATE_EVT2 ) )
omap_serial_ext_uart_disable(UART2);
return 0;
}
static void update_host_wake_locked(int host_wake)
{
pr_debug( "%s TOP, host_wake=%d\n",__FUNCTION__,host_wake);
if (host_wake == bt_lpm.host_wake)
{
pr_debug( "%s (host_wake==bt_lpm.host_wake), returning early\n",__FUNCTION__);
return;
}
bt_lpm.host_wake = host_wake;
if (host_wake) {
wake_lock(&bt_lpm.wake_lock);
if (!host_wake_uart_enabled)
{
omap_serial_ext_uart_enable(UART2);
pr_debug( "%s !host_wake_uart_enabled, called omap_serial_ext_uart_enable\n",__FUNCTION__);
//Mux back GPIO PULL UP pin in RTS pin
pr_debug("** update_host_wake_locked ** changing RTS pin from GPIO back to RTS\n");
omap_rts_mux_write(0, UART2);
}
} else {
if (host_wake_uart_enabled)
{
//Mux RTS pin into GPIO PULL UP pin (this flows off the 2076)
pr_debug("** update_host_wake_locked ** changing RTS pin to GPIO pulled up\n");
omap_rts_mux_write(MUX_PULL_UP, UART2);
omap_serial_ext_uart_disable(UART2);
pr_debug( "%s host_wake_uart_enabled, called omap_serial_ext_uart_disable\n",__FUNCTION__);
}
// Take a timed wakelock, so that upper layers can take it.
// The chipset deasserts the hostwake lock, when there is no
// more data to send.
wake_lock_timeout(&bt_lpm.wake_lock, HZ/2);
}
host_wake_uart_enabled = host_wake;
pr_debug( "%s host_wake_uart_enabled = host_wake = %d\n",__FUNCTION__,host_wake);
}
/*
* The UART1 is for GPS, and CSR GPS chip should control uart1 rts level
* for gps firmware download.
*/
static int uart1_rts_ctrl_write(struct file *file, const char __user *buffer,
size_t count, loff_t *offs)
{
char buf[10] = {0,};
if (omap4_tuna_get_revision() < TUNA_REV_SAMPLE_4)
return -ENXIO;
if (count > sizeof(buf) - 1)
return -EINVAL;
if (copy_from_user(buf, buffer, count))
return -EFAULT;
if (!strncmp(buf, "1", 1)) {
omap_rts_mux_write(OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE7,
UART_NUM_FOR_GPS);
} else if (!strncmp(buf, "0", 1)) {
omap_rts_mux_write(OMAP_PIN_OUTPUT | OMAP_MUX_MODE1,
UART_NUM_FOR_GPS);
}
return count;
}
static void set_wake_locked(int wake)
{
//pr_debug( "bbbluetooth.c:%s wake=%d TOP\n",__FUNCTION__,wake);
bt_lpm.wake = wake;
if (!wake)
wake_unlock(&bt_lpm.wake_lock);
if (!wake_uart_enabled && wake)
{
pr_debug( "%s !wake_uart_enabled && wake, calling omap_serial_ext_uart_enable\n",__FUNCTION__);
omap_serial_ext_uart_enable(UART2);
//Mux back GPIO PULL UP pin in RTS pin
pr_debug("** set_wake_locked ** changing RTS pin from GPIO back to RTS\n");
omap_rts_mux_write(0, UART2);
}
// DOWN_STREAM_BT_WAKE_AND_UART_CONTROL_FIX ++
// Control BT_WAKE assertion/de-assertion in down-stream path only
#if 0
pr_debug( "bbbluetooth.c:%s setting BT_WAKE(%s)\n",__FUNCTION__,wake ? "high":"low");
gpio_set_value(BT_WAKE_GPIO, wake);
#endif
// DOWN_STREAM_BT_WAKE_AND_UART_CONTROL_FIX --
if (wake_uart_enabled && !wake)
{
//Mux RTS pin into GPIO PULL UP pin (this flows off the 2076)
pr_debug("** set_wake_locked ** changing RTS pin to GPIO pulled up\n");
omap_rts_mux_write(MUX_PULL_UP, UART2);
pr_debug( "%s wake_uart_enabled && !wake, calling omap_serial_ext_uart_disable\n",__FUNCTION__);
omap_serial_ext_uart_disable(UART2);
}
wake_uart_enabled = wake;
//pr_debug( "bbbluetooth.c:%s wake_uart_enabled=%d END\n",__FUNCTION__,wake_uart_enabled);
}
static int serial_omap_suspend(struct device *dev)
{
struct uart_omap_port *up = dev_get_drvdata(dev);
if (up) {
if (up->rts_mux_driver_control) {
up->rts_pullup_in_suspend = 1;
omap_rts_mux_write(MUX_PULL_UP, up->port.line);
}
up->suspended = true;
uart_suspend_port(&serial_omap_reg, &up->port);
serial_omap_pm(&up->port, 3, 0);
}
return 0;
}
static int omap_serial_runtime_suspend(struct device *dev)
{
struct uart_omap_port *up = dev_get_drvdata(dev);
if (!up)
goto done;
if (up->rts_mux_driver_control)
omap_rts_mux_write(MUX_PULL_UP, up->port.line);
if (device_may_wakeup(dev))
up->enable_wakeup(up->pdev, true);
else
up->enable_wakeup(up->pdev, false);
done:
return 0;
}
static int serial_omap_resume(struct device *dev)
{
struct uart_omap_port *up = dev_get_drvdata(dev);
if (up) {
uart_resume_port(&serial_omap_reg, &up->port);
up->suspended = false;
serial_omap_port_enable(up);//add enable and disable to make sure RTS state right after resume
if (up->rts_mux_driver_control && up->rts_pullup_in_suspend) {
omap_rts_mux_write(0, up->port.line);
up->rts_pullup_in_suspend = 0;
}
serial_omap_port_disable(up);
}
return 0;
}
int bcm2076_bluetooth_resume(struct platform_device *pdev)
{
#if BT_HOST_WAKE_INT_ENABLED
int irq = gpio_to_irq(BT_HOST_WAKE_GPIO);
enable_irq(irq);
#else
pr_debug( "%s: BT_HOST_WAKE disabled\n",__FUNCTION__);
#endif //BT_HOST_WAKE_INT_ENABLED
//Mux back GPIO PULL UP pin in RTS pin
pr_debug("** resume ** changing RTS pin from GPIO back to RTS\n");
omap_rts_mux_write(0, UART2);
if( idme_query_board_type( IDME_BOARD_TYPE_TATE_EVT2 ) )
omap_serial_ext_uart_enable(UART2);
return 0;
}
static int omap_serial_runtime_suspend(struct device *dev)
{
struct uart_omap_port *up = dev_get_drvdata(dev);
if (!up)
goto done;
if (up->rts_mux_driver_control) {
omap_rts_mux_write(MUX_PULL_UP, up->port.line);
/* wait a few bytes to allow current transmission to complete */
udelay(300);
}
if (device_may_wakeup(dev))
up->enable_wakeup(up->pdev, true);
else
up->enable_wakeup(up->pdev, false);
done:
return 0;
}
static int omap_serial_runtime_resume(struct device *dev)
{
struct uart_omap_port *up = dev_get_drvdata(dev);
struct omap_device *od;
if (up) {
if (omap_pm_was_context_lost(dev))
omap_uart_restore_context(up);
if (up->use_dma) {
/* NO TX_DMA WAKEUP SO KEEP IN NO IDLE MODE */
od = to_omap_device(up->pdev);
omap_hwmod_set_slave_idlemode(od->hwmods[0],
HWMOD_IDLEMODE_NO);
}
if (up->rts_mux_driver_control && (!up->rts_pullup_in_suspend))
omap_rts_mux_write(0, up->port.line);
}
return 0;
}
static void
serial_omap_set_termios(struct uart_port *port, struct ktermios *termios,
struct ktermios *old)
{
struct uart_omap_port *up = (struct uart_omap_port *)port;
unsigned char cval = 0;
unsigned long flags = 0;
unsigned int baud, quot;
switch (termios->c_cflag & CSIZE) {
case CS5:
cval = UART_LCR_WLEN5;
break;
case CS6:
cval = UART_LCR_WLEN6;
break;
case CS7:
cval = UART_LCR_WLEN7;
break;
default:
case CS8:
cval = UART_LCR_WLEN8;
break;
}
if (termios->c_cflag & CSTOPB)
cval |= UART_LCR_STOP;
if (termios->c_cflag & PARENB)
cval |= UART_LCR_PARITY;
if (!(termios->c_cflag & PARODD))
cval |= UART_LCR_EPAR;
/*
* Ask the core to calculate the divisor for us.
*/
baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/13);
quot = serial_omap_get_divisor(port, baud);
up->dll = quot & 0xff;
up->dlh = quot >> 8;
up->mdr1 = UART_OMAP_MDR1_DISABLE;
up->fcr = UART_FCR_R_TRIG_01 | UART_FCR_T_TRIG_01 |
UART_FCR_ENABLE_FIFO;
if (up->use_dma)
up->fcr |= UART_FCR_DMA_SELECT;
/*
* Ok, we're now changing the port state. Do it with
* interrupts disabled.
*/
serial_omap_port_enable(up);
spin_lock_irqsave(&up->port.lock, flags);
/*
* Update the per-port timeout.
*/
uart_update_timeout(port, termios->c_cflag, baud);
up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
if (termios->c_iflag & INPCK)
up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
if (termios->c_iflag & (BRKINT | PARMRK))
up->port.read_status_mask |= UART_LSR_BI;
/*
* Characters to ignore
*/
up->port.ignore_status_mask = 0;
if (termios->c_iflag & IGNPAR)
up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
if (termios->c_iflag & IGNBRK) {
up->port.ignore_status_mask |= UART_LSR_BI;
/*
* If we're ignoring parity and break indicators,
* ignore overruns too (for real raw support).
*/
if (termios->c_iflag & IGNPAR)
up->port.ignore_status_mask |= UART_LSR_OE;
}
/*
* ignore all characters if CREAD is not set
*/
if ((termios->c_cflag & CREAD) == 0)
up->port.ignore_status_mask |= UART_LSR_DR;
/*
* Modem status interrupts
*/
up->ier &= ~UART_IER_MSI;
if (UART_ENABLE_MS(&up->port, termios->c_cflag))
up->ier |= UART_IER_MSI;
serial_out(up, UART_IER, up->ier);
serial_out(up, UART_LCR, cval); /* reset DLAB */
up->lcr = cval;
up->scr = OMAP_UART_SCR_TX_EMPTY;
/* FIFOs and DMA Settings */
/* FCR can be changed only when the
* baud clock is not running
* DLL_REG and DLH_REG set to 0.
*/
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
serial_out(up, UART_DLL, 0);
serial_out(up, UART_DLM, 0);
serial_out(up, UART_LCR, 0);
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
up->efr = serial_in(up, UART_EFR);
serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
up->mcr = serial_in(up, UART_MCR);
serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR);
/* FIFO ENABLE, DMA MODE */
serial_out(up, UART_FCR, up->fcr);
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
if (up->use_dma) {
if (up->errata & OMAP4_UART_ERRATA_i659_TX_THR) {
serial_out(up, UART_MDR3, SET_DMA_TX_THRESHOLD);
serial_out(up, UART_TX_DMA_THRESHOLD, TX_FIFO_THR_LVL);
}
serial_out(up, UART_TI752_TLR, 0);
up->scr |= (UART_FCR_TRIGGER_4 | UART_FCR_TRIGGER_8);
}
serial_out(up, UART_OMAP_SCR, up->scr);
serial_out(up, UART_EFR, up->efr);
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
serial_out(up, UART_MCR, up->mcr);
/* Protocol, Baud Rate, and Interrupt Settings */
if (up->errata & UART_ERRATA_i202_MDR1_ACCESS)
omap_uart_mdr1_errataset(up, up->mdr1);
else
serial_out(up, UART_OMAP_MDR1, up->mdr1);
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
up->efr = serial_in(up, UART_EFR);
serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
serial_out(up, UART_LCR, 0);
serial_out(up, UART_IER, 0);
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
serial_out(up, UART_DLL, up->dll); /* LS of divisor */
serial_out(up, UART_DLM, up->dlh); /* MS of divisor */
serial_out(up, UART_LCR, 0);
serial_out(up, UART_IER, up->ier);
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
serial_out(up, UART_EFR, up->efr);
serial_out(up, UART_LCR, cval);
if (baud > 230400 && baud != 3000000)
up->mdr1 = UART_OMAP_MDR1_13X_MODE;
else
up->mdr1 = UART_OMAP_MDR1_16X_MODE;
if (up->errata & UART_ERRATA_i202_MDR1_ACCESS)
omap_uart_mdr1_errataset(up, up->mdr1);
else
serial_out(up, UART_OMAP_MDR1, up->mdr1);
/* Hardware Flow Control Configuration */
if (termios->c_cflag & CRTSCTS) {
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
up->mcr = serial_in(up, UART_MCR);
serial_out(up, UART_MCR, up->mcr | UART_MCR_TCRTLR);
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
up->efr = serial_in(up, UART_EFR);
serial_out(up, UART_EFR, up->efr | UART_EFR_ECB);
serial_out(up, UART_TI752_TCR, OMAP_UART_TCR_TRIG);
up->efr |= (UART_EFR_CTS | UART_EFR_RTS);
serial_out(up, UART_EFR, up->efr); /* Enable AUTORTS and AUTOCTS */
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
up->mcr |= UART_MCR_RTS;
serial_out(up, UART_MCR, up->mcr);
serial_out(up, UART_LCR, cval);
} else {
serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
up->efr = serial_in(up, UART_EFR);
up->efr &= ~(UART_EFR_CTS | UART_EFR_RTS);
serial_out(up, UART_EFR, up->efr); /* Disable AUTORTS and AUTOCTS */
serial_out(up, UART_LCR, cval);
}
serial_omap_set_mctrl(&up->port, up->port.mctrl);
/* Software Flow Control Configuration */
serial_omap_configure_xonxoff(up, termios);
/* Now we are ready for RX data: enable rts line */
#if 0
if (up->rts_mux_driver_control && up->rts_pullup_in_suspend) {
omap_rts_mux_write(0, up->port.line);
up->rts_pullup_in_suspend = 0;
}
#endif
spin_unlock_irqrestore(&up->port.lock, flags);
serial_omap_port_disable(up);
dev_dbg(up->port.dev, "serial_omap_set_termios+%d\n", up->pdev->id);
}
