void Irq_EnableVector( int16_t vector, int priority, int core ) {
if (vector < INTC_NUMBER_OF_INTERRUPTS) {
Irq_SetPriority((Cpu_t)core, (IrqType)(vector + IRQ_INTERRUPT_OFFSET), osPrioToCpuPio(priority));
} else if ((vector >= CRITICAL_INPUT_EXCEPTION)
&& (vector<= DEBUG_EXCEPTION)) {
} else {
/* Invalid vector! */
assert(0);
}
}
void Irq_SetPriority( CoreIDType cpu, IrqType vector, uint8_t prio ) {
/* TODO: CPU HW prio is 8-bit, bit LSB is always 0 */
/* 4 interrupts for each register */
uint8_t shift = (vector % 4)*8;
uint8_t reg = vector / 4;
uint32_t mask = (0xffu<<shift);
prio = osPrioToCpuPio(prio);
/* + 3 here because the only the 5 most MSB bits are used in Secure view */
ICD.ICDIPR[reg] = (( (prio<<(shift+3)) & mask ) | ( ICD.ICDIPR[reg] & ~mask ));
}
