Exemplo n.º 1
0
int efuse_init(void)
{
    int ret;
    u32 chan_id = ICC_CHN_IFC << 16 | IFC_RECV_FUNC_EFUSE;

    if(1 == is_efuse_init)
    {
        return EFUSE_OK;
    }

    osl_sem_init(0, &efuse_sem_id);
    osl_sem_init(1, &efuse_queue_sem_id);

    ret = bsp_icc_event_register(chan_id, (read_cb_func)bsp_efuse_data_receive, NULL, NULL, NULL);/* [false alarm]:屏蔽Fortify错误 */
    if(ICC_OK != ret)
    {
        efuse_print_error("register is error.\n");
        return EFUSE_ERROR;
    }

    is_efuse_init = 1;/* [false alarm]:屏蔽Fortify错误 */

    efuse_print_info("efuse init ok.\n");

    return EFUSE_OK;
}
Exemplo n.º 2
0
/*
* Function   : bsp_sc_init
* Discription: c core nv init,this phase build upon the a core kernel init,
*              this phase after icc init,this phase ensure to use all nv api normal
*              start at this phase ,ops global ddr need spinlock
* Parameter  : none
* Output     : result
* History    : 
*/
s32 bsp_sc_init(void)
{
    u32 ret = 0;

    memset(&g_sc_stat,0,sizeof(sc_status_stru));
    
    /* sem create */
    osl_sem_init(0,&g_sc_stat.sc_api_sem);
    osl_sem_init(0,&g_sc_stat.sc_tsk_sem);

    /* task create */
#ifdef __OS_VXWORKS__
    ret = (u32)osl_task_init("sc_ccore_task",128,4096,(OSL_TASK_FUNC)sc_icc_task,NULL,(void*)&g_sc_stat.sc_taskid);
#elif defined(__OS_RTOSCK__)
    ret = (u32)osl_task_init("sc_ccore_task",57,4096,(OSL_TASK_FUNC)sc_icc_task,NULL,(void*)&g_sc_stat.sc_taskid);
#endif
    if(ret)
    {
        sc_error_printf("init task failed!\n");
        return BSP_ERR_SC_TASK_INIT_FAIL;
    }
    
    /* register icc event */
    if(ICC_OK!=bsp_icc_event_register(SC_ICC_CHAN_ID, sc_icc_msg_proc,NULL,NULL,NULL))
    {
        sc_error_printf("register icc channel failed!\n");
        return BSP_ERR_SC_SEM_INIT_FAIL;
    }

    sc_printf("[SC]: init success.\n");
    
    return SC_OK;
}
Exemplo n.º 3
0
u32 bsp_nvm_init(void)
{
    u32 ret = NV_ERROR;
    struct nv_global_ddr_info_stru* ddr_info = (struct nv_global_ddr_info_stru*)NV_GLOBAL_INFO_ADDR;

#ifdef BSP_CONFIG_HI3630
    nv_printf("waiting for ap modem nv init ok .......\n");
    BSP_SYNC_Wait(SYNC_MODULE_NV,0);
#endif

    nv_debug(NV_FUN_NVM_INIT,0,0,0,0);
    if(ddr_info->ccore_init_state < NV_BOOT_INIT_OK)
    {
        nv_printf("[%s]:pre init fail,break here!\n",__FUNCTION__);
        nv_debug(NV_FUN_NVM_INIT,1,0,0,0);
        /*lint -save -e801*/
        goto nv_init_fail;
        /*lint -restore*/
    }
    g_nv_ctrl.shared_addr = (u32)NV_GLOBAL_INFO_ADDR;
    spin_lock_init(&g_nv_ctrl.spinlock);

    ret = nv_icc_chan_init();
    if(ret)
    {
        nv_debug(NV_FUN_NVM_INIT,2,ret,0,0);
        /*lint -save -e801*/
        goto nv_init_fail;
        /*lint -restore*/
    }
    osl_sem_init(1,&g_nv_ctrl.rw_sem);
    osl_sem_init(0,&g_nv_ctrl.cc_sem);

    ret = bsp_nvm_read(NV_ID_MSP_FLASH_LESS_MID_THRED,(u8*)&g_nv_ctrl.mid_prio,sizeof(u32));
    if(ret)
    {
        g_nv_ctrl.mid_prio = 20;
        nv_printf("read 0x%x error : 0x%x,use default count\n",NV_ID_MSP_FLASH_LESS_MID_THRED,ret);
    }

    ret = (u32)bsp_ipc_sem_create(IPC_SEM_NV_CRC);
    if(ret)
    {
        nv_debug(NV_FUN_KERNEL_INIT,3 ,ret ,0,0);
        /*lint -save -e801*/
        goto nv_init_fail;
        /*lint -restore*/
    }
    ddr_info->ccore_init_state = NV_INIT_OK;
    nv_printf("nv init ok !\n");

    INIT_LIST_HEAD(&g_nv_ctrl.stList);
    return NV_OK;
nv_init_fail:
    ddr_info->ccore_init_state = NV_INIT_FAIL;
    nv_printf("\n[%s]\n",__FUNCTION__);
    nv_help(NV_FUN_NVM_INIT);
    return ret;
}
static int bsp_hkadc_acore_init(void)
{
    int ret = 0;
    u32 icc_channel_id = ICC_CHN_MCORE_ACORE << 16 | MCORE_CCORE_FUNC_HKADC;

    osl_sem_init(1, &g_hkadc_icc_sem_id);
    osl_sem_init(0, &g_hkadc_value_sem_id);

    ret |= bsp_icc_event_register(icc_channel_id,
        (read_cb_func)bsp_hkadc_icc_callback, NULL, NULL, NULL);
    if (ret)
    {
        bsp_trace(BSP_LOG_LEVEL_ERROR, BSP_MODU_HKADC, "hkadc init error, error code: 0x%x\r\n", ret);
    }
    return ret;
}
/*lint -save -e64*/
MAILBOX_EXTERN int mailbox_init_platform(void)
{
    struct mb_vx_proc   *process    = &g_mailbox_vx_proc_tbl[0];
    unsigned int        count      =  sizeof(g_mailbox_vx_proc_tbl) /
                                       sizeof(struct mb_vx_proc);
    unsigned int        proc_id;

    /*创建平台任务中断信号量部分*/
    while (count) {
        /*为任务处理方式的邮箱通道创建任务*/
        proc_id = process->id;
        if ((proc_id > MAILBOX_VXWORKS_PROC_STYLE_TASK_RESERVED) && (proc_id < MAILBOX_VXWORKS_PROC_STYLE_TASK_BUTT)) {
            /* 创建邮箱接收任务等待信号量*/
            osl_sem_init(0, &process->sema);

            /* 创建邮箱收数据处理任务*/
            if (ERROR == (int)taskSpawn((char *)process->name, (int)process->priority, (int)0,
                            (int)process->stack,
                            (void*)mailbox_receive_task,
                            (int)(&process->sema),
                            (int)(&process->vxqueue),
                            (int)0, (int)0, (int)0, (int)0, (int)0, (int)0, (int)0, (int)0)) /*lint !e119 !e64*/
            {
                return mailbox_logerro_p1(MAILBOX_ERR_VXWORKS_TASK_CREATE, proc_id);
            }
        }
        count--;
        process++;
    }

    mailbox_usr_init();

    return MAILBOX_OK;
}
/*测试函数接口操作timer0*/
s32 hardtimer_test_case01(void)
{
   u32 i=0; 
   s32 ret = 0;
   my_timer.func =(timer_func) for_timer_test;
   my_timer.mode = TIMER_PERIOD_COUNT;
   my_timer.timeout = 32768;
   my_timer.timerId = i;
   my_timer.para = i;
   osl_sem_init(SEM_EMPTY,&sem);
   ret = bsp_hardtimer_alloc(&my_timer);
   if (OK != ret)
   	return ERROR;
   ret = bsp_hardtimer_enable(my_timer.timerId);
   if (OK != ret)
   	return ERROR;
   osl_sem_down(&sem);
   ret = bsp_hardtimer_free(i);
   if (OK != ret)
   {
	osl_sem_up(&sem);
	osl_sema_delete(&sem);
	return ERROR;
    }
   osl_sem_up(&sem);
   osl_sema_delete(&sem);
   return OK;
}
/*测试非唤醒源软timer申请和加入链表,在回调函数外删除软timer
   超时时间较长*/
s32 st_softtimer_test_case13(void)
{
	s32 ret= 0;
	
	my_softtimer.func = for_softtimer_test_1;
	my_softtimer.para = 123;
	my_softtimer.timeout = 100;
	my_softtimer.wake_type=SOFTTIMER_NOWAKE;
	osl_sem_init(0,&sem1);
	
	 if (bsp_softtimer_create(&my_softtimer))
	   {
		bsp_trace(BSP_LOG_LEVEL_ERROR,BSP_MODU_SOFTTIMER,"create error \n");
	    }
	 bsp_softtimer_add(&my_softtimer);
	ret = bsp_softtimer_delete(&my_softtimer);
	if (ret ==OK)
	{
	   ret = bsp_softtimer_free(&my_softtimer);
	   if (ret !=OK)
	   {
	   	bsp_trace(BSP_LOG_LEVEL_ERROR,BSP_MODU_SOFTTIMER,"softtimer_test_6  free error\n");
		return ERROR;
	   }  
	   
	}
	else if(NOT_ACTIVE == ret)
	{
		osl_sem_down(&sem1);
		osl_sema_delete(&sem1);
	}
	return ret;	
}
s32 adp_test_case02(void)
{
	s32 ret = 0;
	unsigned int restTime;
	osl_sem_init(SEM_EMPTY,&sem);
	ret = DRV_TIMER_START(TIMER_ACPU_CPUVIEW_ID ,func,0,10000,0,TIMER_UNIT_NONE);
	if(ret!=0)
	{
		bsp_trace(BSP_LOG_LEVEL_ERROR,BSP_MODU_HARDTIMER,"DRV_TIMER_START fail\n");
		return ERROR;
	}
	ret = DRV_TIMER_GET_REST_TIME(TIMER_ACPU_CPUVIEW_ID,TIMER_UNIT_NONE,&restTime);
	if(ret!=0)
	{
		bsp_trace(BSP_LOG_LEVEL_ERROR,BSP_MODU_HARDTIMER,"DRV_TIMER_GET_REST_TIME fail\n");
		return ERROR;
	}
	bsp_trace(BSP_LOG_LEVEL_ERROR,BSP_MODU_HARDTIMER,"rest time = %d \n",restTime);
	osl_sem_down(&sem);
	ret = DRV_TIMER_STOP(TIMER_ACPU_CPUVIEW_ID);
	if(ret!=0)
	{
		bsp_trace(BSP_LOG_LEVEL_ERROR,BSP_MODU_HARDTIMER,"DRV_TIMER_START fail\n");
		return ERROR;
	}
	osl_sema_delete(&sem);
	return OK;
}
u32 bsp_om_socp_chan_init(void)
{
    SOCP_CODER_SRC_CHAN_STRU               channle_stu = {0};

    /*编码源通道buf初始化*/
    /* 申请BD空间 */
    g_bsp_om_socp_chan_info.bd_buf = bsp_om_alloc(BSP_OM_CODER_SRC_BDSIZE,&(g_bsp_om_socp_chan_info.bd_buf_phy));

    if(( 0== g_bsp_om_socp_chan_info.bd_buf)||(0 == g_bsp_om_socp_chan_info.bd_buf_phy ))
    {
        bsp_om_debug(BSP_LOG_LEVEL_ERROR," alloc BD fail\n");
        return BSP_ERR_OMS_MALLOC_FAIL;
    }

    /* 申请RD空间 */
    g_bsp_om_socp_chan_info.rd_buf = bsp_om_alloc(BSP_OM_CODER_SRC_RDSIZE,&(g_bsp_om_socp_chan_info.rd_buf_phy));

    if(( 0== g_bsp_om_socp_chan_info.rd_buf)||(0 == g_bsp_om_socp_chan_info.rd_buf_phy ))
    {
        bsp_om_debug(BSP_LOG_LEVEL_ERROR," alloc RD fail\n");
        return BSP_ERR_OMS_MALLOC_FAIL;
    }


    channle_stu.u32DestChanID = (u32)g_bsp_om_socp_chan_info.en_dst_chan_id;    /*  目标通道ID */
    channle_stu.eDataType     = g_bsp_om_socp_chan_info.en_data_type;               /*  数据类型,指明数据封装协议,用于复用多平台 */
    channle_stu.eMode         = g_bsp_om_socp_chan_info.en_chan_mode;               /*  通道数据模式 */
    channle_stu.ePriority     = g_bsp_om_socp_chan_info.en_chan_level;              /*  通道优先级 */
    channle_stu.u32BypassEn   = SOCP_HDLC_ENABLE;             /*  通道bypass使能 */
    channle_stu.eDataTypeEn   = SOCP_DATA_TYPE_EN;            /*  数据类型使能位 */
    channle_stu.eDebugEn      = SOCP_ENC_DEBUG_DIS;           /*  调试位使能 */

    channle_stu.sCoderSetSrcBuf.u32InputStart  = (u32)g_bsp_om_socp_chan_info.bd_buf_phy;           /*  输入通道起始地址 */
    channle_stu.sCoderSetSrcBuf.u32InputEnd    = (u32)((g_bsp_om_socp_chan_info.bd_buf_phy
                                                                + g_bsp_om_socp_chan_info.bd_buf_len)-1);   /*  输入通道结束地址 */
    channle_stu.sCoderSetSrcBuf.u32RDStart     = (u32)(g_bsp_om_socp_chan_info.rd_buf_phy);                              /* RD buffer起始地址 */
    channle_stu.sCoderSetSrcBuf.u32RDEnd       = (u32)((g_bsp_om_socp_chan_info.rd_buf_phy
                                                                + g_bsp_om_socp_chan_info.rd_buf_len)-1);    /*  RD buffer结束地址 */
    channle_stu.sCoderSetSrcBuf.u32RDThreshold = 0;                                                                  /* RD buffer数据上报阈值 */

    if (BSP_OK != bsp_socp_coder_set_src_chan(g_bsp_om_socp_chan_info.en_src_chan_id, &channle_stu))
    {
        bsp_om_debug(BSP_LOG_LEVEL_ERROR,"DRV_SOCP_CORDER_SET_SRC_CHAN  fail\n");
        return BSP_ERR_OMS_SOCP_INIT_ERR;
    }

     /*初始化SOCP通道操作的信号量 */
    osl_sem_init(SEM_FULL,&socp_opt_sem);

    /*通道使能操作在目的通道初始化完成之后进行*/

    g_bsp_om_socp_chan_info.init_state= BSP_OM_SOCP_CHAN_INIT_SUCC;

    return BSP_OK;

}
/*测试非唤醒源软timer申请和加入链表*/
s32 st_softtimer_test_case11(void)
{
	
	my_softtimer.func = for_softtimer_test_1;	
	my_softtimer.wake_type=SOFTTIMER_NOWAKE;
	my_softtimer.para = 1;
	my_softtimer.timeout = 100;
	osl_sem_init(0,&sem1);
	osl_sem_init(0,&sem5);
	osl_sem_init(0,&sem6);
	if (bsp_softtimer_create(&my_softtimer))
	{
		bsp_trace(BSP_LOG_LEVEL_ERROR,BSP_MODU_SOFTTIMER,"create error \n");
		return ERROR;
	}
	bsp_softtimer_add(&my_softtimer);
	my_sec_softtimer.func = for_softtimer_test_5;
	my_sec_softtimer.para = 2;
	my_sec_softtimer.timeout = 200;
	if (bsp_softtimer_create(&my_sec_softtimer))
	{
		bsp_trace(BSP_LOG_LEVEL_ERROR,BSP_MODU_SOFTTIMER,"create error \n");
		return ERROR;
	}
	bsp_softtimer_add(&my_sec_softtimer);
	my_thir_softtimer.func = for_softtimer_test_6;
	my_thir_softtimer.para = 3;
	my_thir_softtimer.timeout = 300;
	if (bsp_softtimer_create(&my_thir_softtimer))
	{
		bsp_trace(BSP_LOG_LEVEL_ERROR,BSP_MODU_SOFTTIMER,"create error \n");
		return ERROR;
	}
	bsp_softtimer_add(&my_thir_softtimer);
	osl_sem_down(&sem1);
	osl_sem_down(&sem5);
	osl_sem_down(&sem6);
	osl_sema_delete(&sem1);
	osl_sema_delete(&sem5);
	osl_sema_delete(&sem6);
	return OK;
}
Exemplo n.º 11
0
/*****************************************************************************
 函 数 名  : bsp_on_off_init
 功能描述  : C核开关机初始化
 输入参数  :
 输出参数  : 无
 返 回 值  :
 调用函数  :
 被调函数  :
*****************************************************************************/
int bsp_on_off_init( void )
{
    int ret = 0;
    u32 icc_channel_id = ICC_CHN_IFC << 16 | IFC_RECV_FUNC_ONOFF;

    memset((void*)&g_pwrctrl,0,sizeof(g_pwrctrl));
    osl_sem_init(1, &(g_pwrctrl.pwr_sem));

    osl_sem_init(0, &g_sem_mode);

    ret |= bsp_icc_event_register(icc_channel_id,
        (read_cb_func)bsp_on_off_icc_callback, NULL, NULL, NULL);
    if (ret)
    {
        bsp_trace(BSP_LOG_LEVEL_ERROR, BSP_MODU_ONOFF, "onoff init error, error code: 0x%x\r\n", ret);
    }

    g_pwrctrl.is_init = 1;

    return ret;
}
/*****************************************************************************
 函 数 名  : bsp_loadps_ccore_init
 功能描述  : loadps的C核的初始化函数
 输入参数  : 无
 输出参数  : 成功返回0,失败返回非0
*****************************************************************************/
s32 bsp_loadps_ccore_init(void)
{
    s32 ret = 0;
    struct ovly_addr_info *pOvly_addr_info;
    /*设置一下loadps模块的打印级别函数*/
    bsp_mod_level_set(BSP_MODU_LOADPS,BSP_LOADPS_LOG_LEVEL);
    loadps_trace(BSP_LOG_LEVEL_INFO ,"bsp_loadps_ccore_init start\n");
    osl_sem_init ( 1, &loadps_mutex);
    osl_sem_init ( 0, &loadps_wait_complete_mutex);
    pOvly_addr_info = _ovly_table;
    (void)memset_s((void *)pOvly_addr_info->addr, pOvly_addr_info->size, 0x0, pOvly_addr_info->size);
    (void)memset_s((void *)&g_loadps_debuginfo, sizeof (loadps_debuginfo), 0x0, sizeof (loadps_debuginfo));
    ret = bsp_icc_event_register (LOADPS_ICC_IFC_ID, bsp_loadps_ccore_callback, NULL, NULL, NULL );
    if ( ret )
    {
        loadps_trace(BSP_LOG_LEVEL_ERROR ,"bsp_icc_event_register error, ret = 0x%x\n", ret);
        return ret;
    }
    loadps_trace(BSP_LOG_LEVEL_INFO ,"bsp_loadps_ccore_init complete\n");
    return ret;
}
u32 nv_flash_init(void)
{
    u32 ret = NV_ERROR;
    u32 i = 0;

    nv_file_debug(NV_FILE_INIT_API,0,0,0,0);

    /*first init every file sem*/
    for(i = 0;i<NV_FILE_BUTT;i++)
    {
        osl_sem_init(1,&g_nv_file[i].file_sem);
    }

    memset(&g_flash_info,0,sizeof(struct nv_flash_global_ctrl_stru));
    memset(&g_sec_info,0xff,sizeof(struct nv_sec_file_block_info));

    /*get dload info*/
    ret = nv_dload_file_info_init();
    if(ret)
    {
        nv_file_debug(NV_FILE_INIT_API,1,ret,0,0);
        goto nv_flash_init_err;
    }
    /*get sys nv file info*/
    ret = nv_sec_file_info_init(g_nv_file[NV_FILE_SYS_NV].name,&g_flash_info.sys_nv,g_sec_info.sys_nv);
    if(ret)
    {
        nv_file_debug(NV_FILE_INIT_API,2,ret,0,0);
        goto nv_flash_init_err;
    }
    /*get backup info*/
    ret = nv_sec_file_info_init(g_nv_file[NV_FILE_BACKUP].name,&g_flash_info.bak_sec,g_sec_info.nv_bak);
    if(ret)
    {
        nv_file_debug(NV_FILE_INIT_API,3,ret,0,0);
        goto nv_flash_init_err;
    }

    /*get default info*/
    ret = nv_sec_file_info_init(g_nv_file[NV_FILE_DEFAULT].name,&g_flash_info.def_sec,g_sec_info.nv_default);
    if(ret)
    {
        nv_file_debug(NV_FILE_INIT_API,4,ret,0,0);
        goto nv_flash_init_err;
    }
    return NV_OK;
nv_flash_init_err:
    nv_mntn_record("\n[%s]\n",__func__);
    nv_flash_help(NV_FILE_INIT_API);
    return NV_ERROR;
}
u32 bsp_om_buf_init(void)
{
    u32 i;

    /* LOG BUG 不在此初始化*/
    i = BSP_OM_SOCP_BUF_TYPE;

    g_bsp_om_socp_buf_info[i].start_ptr = bsp_om_alloc(g_bsp_om_socp_buf_info[i].buf_len,(u32*)(&(g_bsp_om_socp_buf_info[i].start_phy_ptr)));

    if(g_bsp_om_socp_buf_info[i].start_ptr == 0)
    {
        return BSP_ERR_OMS_MALLOC_FAIL;
    }
    //g_bsp_om_socp_buf_info.buf_len = BSP_OM_BUF_SIZE;
    g_bsp_om_socp_buf_info[i].read_ptr = g_bsp_om_socp_buf_info[i].start_ptr;    /*  */
    g_bsp_om_socp_buf_info[i].write_ptr = g_bsp_om_socp_buf_info[i].start_ptr;
    g_bsp_om_socp_buf_info[i].send_ptr = g_bsp_om_socp_buf_info[i].start_ptr;
    g_bsp_om_socp_buf_info[i].init_state = BSP_OM_BUF_INIT_SUCC;

    memset((void *)(g_bsp_om_socp_buf_info[i].start_ptr),0,g_bsp_om_socp_buf_info[i].buf_len);

    osl_sem_init(SEM_FULL,&om_buf_sem);

    /* LOG BUG 单独初始化*/
    g_bsp_log_buf_info.start_ptr = bsp_om_alloc(BSP_OM_LOG_BUF_SIZE,(u32*)(&(g_bsp_log_buf_info.start_phy_ptr)));

    if(g_bsp_log_buf_info.start_ptr == 0)
    {
        return BSP_ERR_OMS_MALLOC_FAIL;
    }

    for(i= 0;i<(BSP_OM_LOG_BUF_SIZE/BSP_PRINT_BUF_LEN) ;i++)
    {
        g_bsp_log_buf_info.stnode[i].addr = g_bsp_log_buf_info.start_ptr + ( i* BSP_PRINT_BUF_LEN);
        g_bsp_log_buf_info.stnode[i].is_edle = TRUE;
        g_bsp_log_buf_info.stnode[i].is_valible = FALSE;
    }

    g_bsp_log_buf_info.buys_node_num = 0;
    g_bsp_log_buf_info.valible_node_num = 0;
    g_bsp_log_buf_info.node_num = (BSP_OM_LOG_BUF_SIZE/BSP_PRINT_BUF_LEN);
    g_bsp_log_buf_info.init_state = BSP_OM_BUF_INIT_SUCC;

    g_bsp_om_socp_buf_info[BSP_OM_LOG_BUF_TYPE].start_ptr =g_bsp_log_buf_info.start_ptr;
    g_bsp_om_socp_buf_info[BSP_OM_LOG_BUF_TYPE].start_phy_ptr = g_bsp_log_buf_info.start_phy_ptr;
    g_bsp_om_socp_buf_info[BSP_OM_LOG_BUF_TYPE].buf_len = BSP_OM_LOG_BUF_SIZE;

    return BSP_OK;


}
Exemplo n.º 15
0
static s32 icc_test_multi_send_wait_ack_init(u32 flag)
{
	icc_print_debug("************entry");
#if defined(__KERNEL__) || defined(__VXWORKS__)
	osl_sem_init(ICC_SEM_EMPTY, &(g_icc_test.multi_send_confirm_sem)); /*lint !e40 */
	if(ICC_ERR == osl_task_init("icc_wait", ICC_TEST_TASK_PRI+1, ICC_TASK_STK_SIZE,
			(task_entry)icc_test_wait, (void*)(flag), &g_icc_test.task_id))
    {
        icc_print_error("create icc_wait task error\n");
        return ICC_ERR;
    }
#elif defined(__CMSIS_RTOS)
	g_icc_test.multi_send_confirm_sem = osl_sem_init(1, multi_send_confirm_sem);
	g_icc_test.task_id = osThreadCreate(osThread(icc_test_wait), (void*)flag);
	if(NULL == g_icc_test.task_id)
	{
        icc_print_error("create icc_wait task error\n");
        return ICC_ERR;
    }
#endif

	return ICC_OK;
}
Exemplo n.º 16
0
u32 nv_emmc_init(void)
{
    u32 ret = NV_ERROR;
    u32 i = 0;

    nv_file_debug(NV_FILE_INIT_API,0,0,0,0);

    /*first init every file sem*/
    for(i = 0;i<NV_FILE_BUTT;i++)
    {
        osl_sem_init(1,&g_nv_file[i].file_sem);
    }

    memset(&g_emmc_info,0,sizeof(struct nv_emmc_global_ctrl_stru));

    /*get sys nv info*/
    ret = nv_sec_file_info_init(g_nv_file[NV_FILE_SYS_NV].name,&g_emmc_info.sys_nv);
    if(ret)
    {
        nv_file_debug(NV_FILE_INIT_API,1,ret,(u32)(unsigned long)g_nv_file[NV_FILE_SYS_NV].mtd,NV_FILE_SYS_NV);
        goto nv_emmc_init_err;
    }
    /*get dload info*/
    ret = nv_dload_file_info_init();
    if(ret)
    {
        nv_file_debug(NV_FILE_INIT_API,2,ret,0,NV_FILE_DLOAD);
        goto nv_emmc_init_err;
    }
    /*get backup info*/
    ret = nv_sec_file_info_init(g_nv_file[NV_FILE_BACKUP].name,&g_emmc_info.bak_sec);
    if(ret)
    {
        nv_file_debug(NV_FILE_INIT_API,3,ret,0,NV_FILE_BACKUP);
        goto nv_emmc_init_err;
    }

    /*get default info*/
    ret = nv_sec_file_info_init(g_nv_file[NV_FILE_DEFAULT].name,&g_emmc_info.def_sec);
    if(ret)
    {
        nv_file_debug(NV_FILE_INIT_API,4,ret,0,NV_FILE_DEFAULT);
        goto nv_emmc_init_err;
    }
    return NV_OK;
nv_emmc_init_err:
    printf("\n[%s]\n",__func__);
    nv_emmc_help(NV_FILE_INIT_API);
    return NV_ERROR;
}
 s32 bsp_ipc_sem_create(u32 u32SignalNum)
 {
	IPC_CHECK_PARA(u32SignalNum,IPC_SEM_BUTTOM);
	if(true != ipc_ctrl.sem_exist[u32SignalNum])/*避免同一个信号量在没有删除的情况下创建多次*/
	{
		osl_sem_init(SEM_EMPTY,&(ipc_ctrl.sem_ipc_task[u32SignalNum]));
		ipc_ctrl.sem_exist[u32SignalNum] = true;
		return MDRV_OK;
	}
	else
	{
		return MDRV_OK;
	}

 }
/*todo :改名字*/
int bsp_rffe_init(void)
{
    int ret = 0;
    int i   = 0;

    for(i = 0; i < SEM_NUM; i++){
        osl_sem_init(1, &rf_pwr_sem[i]);
    }

    /*供电初始化*/
    ret  = balong_rf_power_init();
    if(ret){
        rf_print_error("rf power init fail,ret = %d\n",ret);
    }

    udelay(200);

    /*MIPI配置初始化*/
    ret = balong_rf_config_by_mipi_init();
    if(ret){
        rf_print_error("rf power init fail,ret = %d\n",ret);
    }

    /*射频线控配置初始化*/
    ret = balong_rf_config_anten_init();
    if(ret){
        rf_print_error("rf ant(gpio) init fail,ret = %d\n",ret);
    }
#ifdef CONFIG_CCORE_PM

    /*注册dpm 回调*/
    if(bsp_rsracc_support())
    {
        ret = bsp_rsracc_register((rsr_acc_description *)&rf_rsracc_device,1);
    }
    else
    {
        ret = bsp_device_pm_add(&g_rf_dpm_device);
        if(ret){
            rf_print_error("rffe add dpm device fail,ret = %d\n",ret);
        }
    }
#endif

    rf_print_error("bsp rf init end,ret is %d\n",ret);
    return ret;
}
/*lint -save -e745*/
int socp_debug_init(void)
{
    u32 channel_id = ICC_CHN_ACORE_CCORE_MIN <<16 | IFC_RECV_FUNC_SOCP_DEBUG;

    osl_sem_init(0, &g_stSocpDebugCtrl.task_sem);
#if defined(__KERNEL__)
    if(NULL == proc_create("socpProc", 0660, NULL, &g_strSocpProc))
    {
        return -1;
    }
#endif
    (void)osl_task_init("socpProc",30, 1024, (OSL_TASK_FUNC)socp_debug_icc_task,NULL, &g_stSocpDebugCtrl.task_id);

    (void)bsp_icc_event_register(channel_id, (read_cb_func)socp_debug_icc_msg_callback,NULL,NULL,NULL);

    return 0;
}
Exemplo n.º 20
0
u32 nv_test_sem_func(void)
{
    u32 start = 0;
    u32 end = 0;
    if(0 == nv_sem_ctrl)
    {
        osl_sem_init(0,&nv_test_sem);
        nv_sem_ctrl = 1;
    }

    start = bsp_get_slice_value();
    if(osl_sem_downtimeout(&nv_test_sem, 10))
    {
        end = bsp_get_slice_value();
    }
    nv_printf("slice: 0x%x\n", end - start);
    return 0;
}
/*测试唤醒源软timer申请和加入链表重复10次,每次都在回调函数修改超时时间*/
s32 st_softtimer_test_case03(void)
{
	
	my_softtimer.func = for_softtimer_test_3;	
	my_softtimer.para = 2;
	my_softtimer.timeout = 10;
	my_softtimer.wake_type=SOFTTIMER_WAKE;
	osl_sem_init(0,&sem3);
	if (bsp_softtimer_create(&my_softtimer))
	{
		bsp_trace(BSP_LOG_LEVEL_ERROR,BSP_MODU_SOFTTIMER,"create error\n");
		return ERROR;
	}
	bsp_softtimer_add(&my_softtimer);
	osl_sem_down(&sem3);
	osl_sema_delete(&sem3);
	return OK;
}
u32 bsp_int_lock_set(u32 set_swt,u32 period)
{
    u32 ret =BSP_OK;

    if(BSP_SYSVIEW_SWT_ON == set_swt)
    {
        if(int_lock_stru.task_id  != 0 )
        {
            ret = BSP_OK;
        }
        else
        {
            osl_sem_init(SEM_EMPTY,&int_lock_sem);

            int_lock_stru.task_id = kthread_run(int_lock_view_task, NULL, "int_lock_task");

            if(int_lock_stru.task_id != 0)
            {
                ret = BSP_OK;
            }
            else
            {
                ret = (u32)BSP_ERROR;
            }
        }
        /*lint -save -e64*/
        bsp_dump_register_sysview_hook(DUMP_SYSVIEW_INTLOCK,(dump_save_hook)int_lock_read_cb_done);
        /*lint -restore +e64*/
    }
    else
    {
        bsp_dump_register_sysview_hook(DUMP_SYSVIEW_INTLOCK,NULL);
    }

    if(BSP_OK != ret)
    {
        return ret;
    }

    int_lock_stru.report_swt  = set_swt;
    int_lock_stru.report_timer_len = BSP_TASK_INT_REPORT_PERIOD;

    return BSP_OK;
}
u32 bsp_task_swt_set(u32 set_swt,u32 period)
{
    u32 ret = BSP_OK;

    if(BSP_SYSVIEW_SWT_ON == set_swt)
    {

        if(task_info_stru.task_id  != 0 )
        {
            ret = BSP_OK;
        }
        else
        {
            osl_sem_init( SEM_EMPTY,&task_swt_sem);

            task_info_stru.task_id = kthread_run(task_view_task, NULL, "task_view_task");
            if(task_info_stru.task_id != 0)
            {

                ret = BSP_OK;
            }
            else
            {
                ret = (u32)BSP_ERROR;
            }
        }
        /*lint -save -e64*/
        bsp_dump_register_sysview_hook(DUMP_SYSVIEW_TASKSWITCH,(dump_save_hook)task_swt_read_cb_done);
         /*lint -restore +e64*/
    }
    else
    {
        bsp_dump_register_sysview_hook(DUMP_SYSVIEW_TASKSWITCH,NULL);
    }

    if(BSP_OK != ret)
    {
        return ret;
    }

    task_info_stru.report_swt  = set_swt;

    return BSP_OK;
}
Exemplo n.º 24
0
/* 子通道初始化 */
static s32 icc_test_sub_chn_init(u32 channel_idx, u32 test_sub_chn_size, u32 start)
{
	u32 i = 0;
	u8 *buf = NULL;
	read_cb_func read_cb = NULL;
	u32 sub_chn_idx = 0;
	struct icc_test_sub_channel *sub_channel = NULL;

	/* 读写buffer一起分配 */
	buf = (u8 *)osl_malloc(ICC_TEST_FIFO_SIZE * test_sub_chn_size * 2); /*lint !e516 */
	if(NULL == buf)
	{
		icc_print_error("buf=0x%x, \n", buf);
		return ICC_MALLOC_MEM_FAIL;
	}
	memset(buf, 0x00,  ICC_TEST_FIFO_SIZE * test_sub_chn_size * 2); /*lint !e665 */

	for(i = 0; i < test_sub_chn_size; i++)
	{
		/* 32-64为测试用子通道 */
		sub_chn_idx = i + start;
		sub_channel = &(g_icc_test.channels[channel_idx].sub_channels[sub_chn_idx]);
		sub_channel->wr_buf = buf + i * ICC_TEST_FIFO_SIZE;
		sub_channel->rd_buf = buf + i * (ICC_TEST_FIFO_SIZE + test_sub_chn_size);
#if defined(__KERNEL__) || defined(__VXWORKS__)
		osl_sem_init(ICC_SEM_EMPTY, &(sub_channel->confirm_sem)); /*lint !e40 */
#endif
		/* 子通道交替注册cb0和cb1 */
		read_cb = ((i & 0x01)? icc_send_test_001_cb1: icc_send_test_001_cb0);
		g_icc_ctrl.channels[channel_idx]->rector[sub_chn_idx].read_cb = read_cb;
		g_icc_ctrl.channels[channel_idx]->rector[sub_chn_idx].read_context = (void *)sub_chn_idx;

#ifdef ICC_HAS_DEBUG_FEATURE		
		icc_print_debug("i:0x%x, read_cb: 0x%x", i, read_cb);
		if(g_icc_dbg.msg_print_sw)
		{
			icc_channel_vector_dump(channel_idx,sub_chn_idx);
		}
#endif

	}

	return ICC_OK;
}
s32 k3_adp_test_case02(void)
{
    s32 ret = 0;
    osl_sem_init(SEM_EMPTY,&sem);
    ret = DRV_TIMER_START(TIMER_ACPU_OSA_ID,func,0,1000,0,TIMER_UNIT_MS);
    if(ret!=0)
    {
        bsp_trace(BSP_LOG_LEVEL_ERROR,BSP_MODU_HARDTIMER,"DRV_TIMER_START fail\n");
        return ERROR;
    }
    osl_sem_down(&sem);
    ret = DRV_TIMER_STOP(TIMER_ACPU_OSA_ID);
    if(ret!=0)
    {
        bsp_trace(BSP_LOG_LEVEL_ERROR,BSP_MODU_HARDTIMER,"DRV_TIMER_START fail\n");
        return ERROR;
    }
    osl_sema_delete(&sem);
    return OK;
}
int bsp_om_send_task(void * para)
{
    void* send_addr = 0;
    u32 buf_len = 0;
    u32 ret;

    osl_sem_init(SEM_EMPTY,&send_task_sem);
    /* coverity[no_escape] */
    for(;;)
    {
        /* 清理RD*/
        bsp_om_clean_rd();
        /* coverity[check_return] */
        osl_sem_down(&send_task_sem);

        bsp_om_send_log_buf(BSP_OM_LOG_BUF_TYPE,BSP_PRINT_BUF_LEN);

        do
        {
            bsp_om_get_head_from_list(&send_addr,&buf_len);

            if((send_addr != 0)&&(buf_len != 0))
            {
                ret =  bsp_om_send_coder_src(send_addr,buf_len);

                if(ret == BSP_OK)
                {
                    bsp_om_del_head_froms_list();
                }
                else
                {
                    break;
                }
            }

        }while((send_addr != 0)&&(buf_len != 0));
    }
    /*lint -save -e527 */
    return 0;
    /*lint -restore +e527 */
}
void bsp_om_send_task(void)
{
    u32 send_addr = 0;
    u32 buf_len = 0;
    u32 ret;

    osl_sem_init(SEM_EMPTY,&send_task_sem);

    /* coverity[no_escape] */
    for(;;)
    {
        /* 清理RD*/
        bsp_om_clean_rd();

        //osl_sem_downtimeout(&send_task_sem,3000);
        osl_sem_down(&send_task_sem);

        bsp_om_send_log_buf(BSP_OM_LOG_BUF_TYPE,BSP_PRINT_BUF_LEN);

        do
        {
            bsp_om_get_head_from_list(&send_addr,&buf_len);

            if((send_addr != 0)&&(buf_len != 0))
            {
                ret =  bsp_om_send_coder_src((u8*)send_addr,buf_len);

                if(ret == BSP_OK)
                {
                    bsp_om_del_head_froms_list();
                }
                else
                {
                    break;
                }
            }

        }while((send_addr != 0)&&(buf_len != 0));
    }
}
Exemplo n.º 28
0
/*
* Function   : bsp_sc_kernel_init
* Discription: c core nv init,this phase build upon the a core kernel init,
*              this phase after icc init,this phase ensure to use all nv api normal
*              start at this phase ,ops global ddr need spinlock
* Parameter  : none
* Output     : result
* History    : 
*/
s32 bsp_sc_kernel_init(void)
{
    s32 ret = SC_ERROR;

    osl_sem_init(0,&g_sc_stat.sc_tsk_sem);

    ret = osl_task_init("sc_acore_task",15,1024,sc_icc_task,NULL,(void*)&g_sc_stat.sc_taskid);
    if(ret)
    {
        sc_error_printf("init task failed!\n");
        return BSP_ERR_SC_TASK_INIT_FAIL;
    }
    
    if(ICC_OK != bsp_icc_event_register(SC_ICC_CHAN_ID, sc_icc_msg_proc,NULL,NULL,NULL))
    {
        sc_error_printf("register icc channel failed!\n");
        return BSP_ERR_SC_SEM_INIT_FAIL ;
    }

    sc_printf("[SC]: init success.\n");

    return SC_OK;
}
int __init bsp_reset_init(void)
{
	s32 ret = RESET_ERROR;
	struct device_node *np = NULL;

	memset(&(g_modem_reset_ctrl), 0, sizeof(g_modem_reset_ctrl));
	memset(&g_reset_debug, 0, sizeof(g_reset_debug));
	g_reset_debug.print_sw = 1;

	/* NV控制是否打开单独复位功能以及与RIL的对接 */
	if(BSP_OK != bsp_nvm_read(NV_ID_DRV_CCORE_RESET, (u8*)&(g_modem_reset_ctrl.nv_config), sizeof(DRV_CCORE_RESET_STRU)))
	{
		reset_print_err("nv read fail, use default value\n");
	}

	np = of_find_compatible_node(NULL, NULL, "hisilicon,crgctrl");
	g_modem_reset_ctrl.crg_base =  of_iomap(np, 0);
	if (!g_modem_reset_ctrl.crg_base)
	{
		reset_print_err("get crg_base fail!\n");
		return RESET_ERROR;
	}

	bsp_reset_bootflag_set(CCORE_BOOT_NORMAL);

	/* 置上acore与ccore之间通信状态可用标识 */
	g_modem_reset_ctrl.multicore_msg_switch = 1;
	g_modem_reset_ctrl.modem_action = MODEM_NORMAL;

	osl_sem_init(0, &g_modem_reset_ctrl.task_sem);
	osl_sem_init(0, &g_modem_reset_ctrl.wait_mcore_reply_sem);
	osl_sem_init(0, &g_modem_reset_ctrl.wait_mcore_reply_reseting_sem);
	osl_sem_init(0, &g_modem_reset_ctrl.wait_hifi_reply_sem);
	osl_sem_init(0, &g_modem_reset_ctrl.wait_ccore_reset_ok_sem);
	osl_sem_init(0, &g_modem_reset_ctrl.wait_modem_master_in_idle_sem);

	wake_lock_init(&g_modem_reset_ctrl.wake_lock, WAKE_LOCK_SUSPEND, "modem_reset wake");
	spin_lock_init(&g_modem_reset_ctrl.action_lock);

    g_modem_reset_ctrl.task = kthread_run(modem_reset_task,  NULL, "modem_reset");
	if(!g_modem_reset_ctrl.task)
	{
		reset_print_err("create modem_reset thread fail!\n");
		return RESET_ERROR;
	}

	ret = bsp_reset_cb_func_register("drv", drv_reset_cb, 0, DRV_RESET_CB_PIOR_ALL);
	if(ret !=  RESET_OK)
	{
		reset_print_err("register drv reset callback fail!\n");
		return RESET_ERROR;
	}

	ret = DRV_MAILBOX_REGISTERRECVFUNC(MAILBOX_MAILCODE_HIFI_TO_ACPU_CCORE_RESET_ID, (mb_msg_cb)from_hifi_mailbox_readcb, NULL);/*lint !e713 */
	if(MAILBOX_OK != ret)
	{
		reset_print_err("register mailbox callback fail");
		return RESET_ERROR;
	}

	init_completion(&(g_modem_reset_ctrl.suspend_completion));
	g_modem_reset_ctrl.pm_notify.notifier_call = reset_pm_notify;
	register_pm_notifier(&g_modem_reset_ctrl.pm_notify);

	g_modem_reset_ctrl.reset_wq = create_singlethread_workqueue("reset_wq");
    BUG_ON(!g_modem_reset_ctrl.reset_wq); /*lint !e548 */
	INIT_WORK(&(g_modem_reset_ctrl.work_reset), modem_reset_do_work);
	INIT_WORK(&(g_modem_reset_ctrl.work_power_off), modem_power_off_do_work);
	INIT_WORK(&(g_modem_reset_ctrl.work_power_on), modem_power_on_do_work);

	g_modem_reset_ctrl.ipc_recv_irq_idle = IPC_ACPU_INT_SRC_CCPU_RESET_IDLE;
	g_modem_reset_ctrl.ipc_recv_irq_reboot = IPC_ACPU_INT_SRC_CCPU_RESET_SUCC;
	g_modem_reset_ctrl.ipc_send_irq_wakeup_ccore = IPC_CCPU_INT_SRC_ACPU_RESET;
	if (bsp_ipc_int_connect(g_modem_reset_ctrl.ipc_recv_irq_idle, (voidfuncptr)reset_ipc_isr_idle, 0))
	{
		reset_print_err("connect idle ipc fail!\n");
		return RESET_ERROR;
	}
	if (bsp_ipc_int_enable(g_modem_reset_ctrl.ipc_recv_irq_idle))
	{
		reset_print_err("enable idle ipc fail!\n");
		return RESET_ERROR;
	}

	if (bsp_ipc_int_connect(g_modem_reset_ctrl.ipc_recv_irq_reboot, (voidfuncptr)reset_ipc_isr_reboot, 0))
	{
		reset_print_err("connect reboot ipc fail!\n");
		return RESET_ERROR;
	}
	if (bsp_ipc_int_enable(g_modem_reset_ctrl.ipc_recv_irq_reboot))
	{
		reset_print_err("enable reboot ipc fail!\n");
		return RESET_ERROR;
	}

	g_modem_reset_ctrl.state = 1;

	reset_print_err("ok\n");

	return 0;
}
Exemplo n.º 30
0
 /*******************************************************************************
 * FUNC NAME:
 * nandc_mtd_probe() - linux MTD layer initialization function.
 *
 * PARAMETER:
 * @dev - [input]through it to get the platform_device structure.
 *
 * DESCRIPTION:
 * This function mallocs ram space for the main structure corelative with MTD layer.
 *
 * CALL FUNC:
 * driver_register() -
 *
 ********************************************************************************/
static int nandc_mtd_probe(struct platform_device* dev)
{
    struct nandc_host *host = NULL;
    struct nand_chip  *chip = NULL;
    struct mtd_info   *mtd  = NULL;
    struct platform_device *pltdev = dev; /* nandc_mtd_pltdev */
    struct mtd_partition *parts = NULL;
    struct mtd_partition *temt_parts = NULL ;
    unsigned int nr_parts = 0;
    int result = 0;
    unsigned int i;

    int size = sizeof(struct nand_chip) + sizeof(struct mtd_info);

    /* set ebi normal mode to avoid fault when sharing ebi with emi, only for nandc v600 */
    hi_syssc_ebi_mode_normal();
    
	/*begin lint-Info 732: (Info -- Loss of sign (arg. no. 1) (int to unsigned int))*/
    chip = (struct nand_chip*)kmalloc((size_t)size, GFP_KERNEL);
    /*end*/
    if (!chip)
    {
        dev_err(&pltdev->dev, "nandc_mtd_probe failed to allocate device structure.\n");
        return -ENOMEM;
    }
    memset((void *)chip, 0, (unsigned int)size); /*clean the pclint e516*/
    mtd  = (struct mtd_info *)&chip[1]; /*lint !e740*/
    mtd->priv  = chip;
    mtd->owner = THIS_MODULE;
    mtd->name  = (char*)(pltdev->name);

    /*get virtual address for nand controller buffer from physical address*/
    chip->IO_ADDR_R = chip->IO_ADDR_W = ioremap_nocache(
                                    pltdev->resource[1].start,
                                    pltdev->resource[1].end - pltdev->resource[1].start + 1);

    if (!chip->IO_ADDR_R)
    {
        dev_err(&pltdev->dev, "ioremap failed\n");
        kfree(chip);
        return -EIO;
    }

    if (nandc_mtd_host_init(mtd, pltdev, &host))
    {
        dev_err(&pltdev->dev, "failed to nandc_mtd_host_init.\n");
        result = -ENOMEM;
        goto err;
    }
    dev->dev.platform_data = host;

    mtd->name  = NANDC_NULL;
    /*get partition table from C-core bootloader flash partition table*/
    /* coverity[alloc_arg] */
    if(ptable_parse_mtd_partitions(&parts, &nr_parts))/*lint !e64*/
    {
        dev_err(&pltdev->dev, "failed to ptable_parse_mtd_partitions.\n");
        result = -ENOMEM;
        goto err;
    }
    mtd->name  = (char*)(pltdev->name);

    /* get clock and enable */
    host->clk = clk_get(NULL,"nandc_clk");/*[false alarm]:屏蔽fortify错误 */
    if(IS_ERR(host->clk)){
		dev_err(&pltdev->dev, "cannot get nandc clk!\n");
		goto err;
	}

#ifdef NANDC_USE_V600
#ifdef FEATURE_NANDC_DMA_USE_INTERRUPT

    /* get nandc irq  */
	host->irq_id =  platform_get_irq(dev, 0);
	if (host->irq_id <= 0) 
    {
		dev_err(&dev->dev, "cannot get IRQ\n");
		goto err;
	}

    /* combined interupt id with ISR */
	result = request_irq(host->irq_id, nandc_ctrl_interrupt, IRQF_DISABLED, dev_name(&dev->dev), host);
	if (result != 0) 
    {
		dev_err(&dev->dev, "cannot claim IRQ %d\n", host->irq_id);
		goto err;
	}

    /* sem init */
    osl_sem_init(0, &(host->sem));
    
#endif 
#endif 
    if (nr_parts > 0)
    {
        temt_parts = parts;
        for (i = 0; i < nr_parts; i++)
        {
#if defined(NANDC_DEBUG)
            NANDC_TRACE(NFCDBGLVL(NORMAL), ("partitions[%d] = "
            "{.name = %s, .offset = 0x%.8llx, "".size = 0x%.8llx (%lluKiB) }\n",
            i,
            temt_parts->name,
            temt_parts->offset,
            temt_parts->size,
            (temt_parts->size)/1024));/*lint !e778*/
#endif
            temt_parts++;
        }
		/*begin lint-Info 732: (Info -- Loss of sign (arg. no.3) (int to unsigned int))*/
        if (nandc_mtd_nand_init(mtd, parts, (u32)nr_parts))
		/*end*/
        {
            printk("ERROR ! nandc_mtd_nand_init!!!\n");
            result = -ENODEV;
            goto err;
        }
#if(FEATURE_ON == MBB_DLOAD)
        dload_set_mtd_info(mtd);
#endif
        return add_mtd_partitions(mtd, parts, (int)nr_parts);
    }
    else
    {
        NANDC_TRACE(NFCDBGLVL(ERRO), ("ERROR !No Partition !!!!\n"));/*lint !e778*/
        result = -ENODEV;
        goto err;
    }
    
err:
    if(host)
    {
        if (host->databuf != host->chip->IO_ADDR_R)
        {
			#ifdef NANDC_USE_V600
            dma_free_coherent(NANDC_NULL,NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE,host->databuf,host->dma_addr);
			#else
			kfree(host->databuf);
			#endif
			
        }
			
        iounmap(host->regbase);
        kfree(host);
    }
    if(chip)
    {
        iounmap(chip->IO_ADDR_W);
    }
    dev->dev.platform_data = NULL;

    /* coverity[leaked_storage] */
    return result;
}/*lint !e550 !e529*/