static int8_t
ow_write_bit(uint8_t bit)
{
ow_release();
/* Min. 1 usec recovery between slots. */
_delay_us(1);
if (bit)
{
/* Write 1: release bus within 1 usec <= T <= 15 usec. */
/* Let's make that 2 usec just to be a bit on the safe side. */
cli();
ow_low();
_delay_us(2);
ow_release();
sei();
/* Total write pulse >= 60 usec. */
ow_delay_us(60 - 2);
}
else
{
/* Write 0: pull low for 60 usec <= T <= 120 usec. */
ow_low();
ow_delay_us(60);
}
return 0;
}
uint8_t ow_bit_io( uint8_t b )
{
OW_DIR_OUT_LOW(); // drive bus low
ow_delay_us(1); // Recovery-Time
if ( b ) {
OW_DIR_IN(); // if bit is 1 set bus high (by ext. pull-up)
}
// wuffwuff delay was 15uS-1 see comment above
ow_delay_us(7);
b=ow_input_pin_state();
ow_delay_us(50);
OW_DIR_IN();
return b;
}
static int8_t
ow_read_bit(uint8_t i)
{
uint8_t bit;
/* >= 1usec recovery time. */
ow_release();
_delay_us(1);
/* >= 1 usec pull low to start read slot. */
/* The read slot is time critical to a few usec, so disable interrupts. */
cli();
ow_low();
_delay_us(1);
ow_release();
/*
We must read the bus within at most 15 usec from pulling the bus low.
The later we read, the more margin. But let's keep a couple usec to account
for delays outside of _delay_us().
*/
_delay_us(12);
bit= ow_read();
sei();
if ((i % 8) == 0)
ow_read_buf[i / 8] = 0;
if (bit)
ow_read_buf[i / 8] |= (1 << (i % 8));
/* Total read slot >= 60 usec. */
ow_delay_us(60-1-12);
return 0;
}
static int8_t
ow_init(uint8_t i)
{
if (i == 0)
{
/* Reset pulse: low for >= 480 usec. */
ow_low();
ow_delay_us(480);
}
else if (i == 1)
{
/* Presence detect 60 usec <= T <= 240 usec. */
ow_release();
ow_delay_us(60);
}
else
{
/* Total presence pulse 480 usec. */
ow_presence= !ow_read();
ow_delay_us(480-60);
}
return 0;
}
// see http://www.maxim-ic.com/app-notes/index.mvp/id/162
uint8_t ow_reset(void)
{
uint8_t err;
OW_DIR_OUT_LOW(); // pull OW-Pin low for 480us
ow_delay_us(233); // min 480us in total
ow_delay_us(233);
// set Pin as input - wait for clients to pull low
OW_DIR_IN(); // input and pull up
ow_delay_us(53); // 60 us
err = ow_input_pin_state(); // devices should now pull low
// nobody pulled to low, still high-> error
// after a delay the clients should release the line
// and input-pin gets back to high due to pull-up-resistor
ow_delay_us(233); // max 240us in total
if (err==1){
return(1); // no presence puls
}
if( ow_input_pin_state() == 0 ) // short circuit
return(1);
return(0);
}
/* Timing issue when using runtime-bus-selection (!OW_ONE_BUS):
The master should sample at the end of the 15-slot after initiating
the read-time-slot. The variable bus-settings need more
cycles than the constant ones so the delays had to be shortened
to achive a 15uS overall delay
Setting/clearing a bit in I/O Register needs 1 cyle in OW_ONE_BUS
but around 14 cyles in configureable bus (us-Delay is 4 cyles per uS) */
uint8_t ow_bit_io1( uint8_t b )
{
OW_DIR_OUT_LOW(); // drive bus low
ow_delay_us(1); // Recovery-Time 1us
if ( b ) {
OW_DIR_OUT_HIGH();
}else{
OW_DIR_OUT_LOW();
}
ow_delay_us(38);
OW_DIR_IN();
ow_delay_us(2); // Recovery-Time 1us
// wuffwuff delay was 15uS-1 see comment above
OW_DIR_OUT_LOW(); // drive bus low
ow_delay_us(1); // Recovery-Time 1us
OW_DIR_IN();
ow_delay_us(7);
b=ow_input_pin_state();
ow_delay_us(38);
return b;
}
