static void LCD_panel_init(u32 sel)
{
sunxi_lcd_pin_cfg(sel, 1);
sunxi_lcd_delay_ms(10);
panel_rst(0);
sunxi_lcd_delay_ms(20);
panel_rst(1);
sunxi_lcd_delay_ms(10);
sunxi_lcd_dsi_write(sel,DSI_DCS_EXIT_SLEEP_MODE, 0, 0);
sunxi_lcd_delay_ms(200);
sunxi_lcd_dsi_clk_enable(sel);
sunxi_lcd_dsi_write(sel,DSI_DCS_SET_DISPLAY_ON, 0, 0);
sunxi_lcd_delay_ms(200);
return;
}
static void LCD_panel_init(__u32 sel)
{
sunxi_lcd_pin_cfg(sel, 1);
sunxi_lcd_delay_ms(10);
panel_rst(0);
sunxi_lcd_delay_ms(20);
panel_rst(1);
sunxi_lcd_delay_ms(10);
dsi_dcs_wr_0para(sel,DSI_DCS_EXIT_SLEEP_MODE);
sunxi_lcd_delay_ms(200);
sunxi_lcd_dsi_clk_enable(sel);
dsi_dcs_wr_0para(sel,DSI_DCS_SET_DISPLAY_ON);
sunxi_lcd_delay_ms(200);
return;
}
void lp079x01_exit(void)
{
spi_24bit_3wire(0x7000B7); //enter LP mode
spi_24bit_3wire(0x720342);
LCD_delay_ms(50);
spi_24bit_3wire(0x700028); //display off
LCD_delay_ms(10);
spi_24bit_3wire(0x700010); //sleep in cmd
LCD_delay_ms(20);
ssd2828_rst(0);
panel_rst(0);
}
void lp079x01_exit(__panel_para_t * info)
{
spi_24bit_3wire(0x7000B7); //enter LP mode
spi_24bit_3wire(0x720342);
sunxi_lcd_delay_ms(50);
spi_24bit_3wire(0x700028); //display off
sunxi_lcd_delay_ms(10);
spi_24bit_3wire(0x700010); //sleep in cmd
sunxi_lcd_delay_ms(20);
ssd2828_rst(0);
panel_rst(0);
}
static void LCD_panel_exit(u32 sel)
{
sunxi_lcd_dsi_clk_disable(sel);
panel_rst(0);
return ;
}
void lp079x01_init(__panel_para_t * info)
{
__u32 pll_config = 0;
if(info->lcd_xtal_freq == 12)
{
/* 12M xtal freq */
pll_config = 0xc02D;
} else if(info->lcd_xtal_freq == 27)
{
pll_config = 0xc014;
} else if(info->lcd_xtal_freq == 24)
{
pll_config = 0xc22d;
} else
{
/* default 12Mhz */
pll_config = 0xc02D;
}
spi_24bit_3wire(0x7000B7); //enter LP mode
spi_24bit_3wire(0x720340);
ssd2828_rst(0);
panel_rst(0);
LCD_delay_ms(10);
ssd2828_rst(1);
panel_rst(1);
LCD_delay_ms(10);
spi_24bit_3wire(0x7000B1); //VSA=50, HAS=64
spi_24bit_3wire(0x723240);
spi_24bit_3wire(0x7000B2); //VBP=30+50, HBP=56+64
spi_24bit_3wire(0x725078);
spi_24bit_3wire(0x7000B3); //VFP=36, HFP=60
spi_24bit_3wire(0x72243C);
spi_24bit_3wire(0x7000B4); //HACT=768
spi_24bit_3wire(0x720300);
spi_24bit_3wire(0x7000B5); //VACT=1240
spi_24bit_3wire(0x720400);
spi_24bit_3wire(0x7000B6);
if(info->lcd_ext_dsi_colordepth == 1) {
spi_24bit_3wire(0x720009); //0x720009:burst mode, 18bpp packed
} else {
spi_24bit_3wire(0x72000B); //0x72000B:burst mode, 24bpp
}
//0x72000A:burst mode, 18bpp loosely packed
spi_24bit_3wire(0x7000DE); //no of lane=4
spi_24bit_3wire(0x720003);
spi_24bit_3wire(0x7000D6); //RGB order and packet number in blanking period
spi_24bit_3wire(0x720005);
spi_24bit_3wire(0x7000B9); //disable PLL
spi_24bit_3wire(0x720000);
pll_config |= 0x720000;
pr_warn("[MINI]pll_config=0x%x\n", pll_config);
spi_24bit_3wire(0x7000BA); //lane speed=560
spi_24bit_3wire(pll_config); //may modify according to requirement, 500Mbps to 560Mbps, clk_in / (bit12-8) * (bit7-0)
spi_24bit_3wire(0x7000BB); //LP clock
spi_24bit_3wire(0x720008);
spi_24bit_3wire(0x7000B9); //enable PPL
spi_24bit_3wire(0x720001);
spi_24bit_3wire(0x7000c4); //enable BTA
spi_24bit_3wire(0x720001);
spi_24bit_3wire(0x7000B7); //enter LP mode
spi_24bit_3wire(0x720342);
spi_24bit_3wire(0x7000B8); //VC
spi_24bit_3wire(0x720000);
spi_24bit_3wire(0x7000BC); //set packet size
spi_24bit_3wire(0x720000);
spi_24bit_3wire(0x700011); //sleep out cmd
LCD_delay_ms(100);
spi_24bit_3wire(0x700029); //display on
LCD_delay_ms(200);
spi_24bit_3wire(0x7000B7); //video mode on
spi_24bit_3wire(0x72030b);
}
static void LCD_panel_init(__u32 sel)
{
__u32 i;
__u32 rx_num ;
__u8 rx_bf0,rx_bf1,rx_bf2;
__u32 hx8394d_used=0;
sunxi_lcd_pin_cfg(sel, 1);
sunxi_lcd_delay_ms(10);
panel_rst(1); //add by lyp@20140423
sunxi_lcd_delay_ms(50);//add by lyp@20140423
panel_rst(0);
sunxi_lcd_delay_ms(20);
panel_rst(1);
sunxi_lcd_delay_ms(200);
for(i=0;;i++)
{
if(hx8394d_test_config_para[i].cmd == 0x02)
break;
else if (hx8394d_test_config_para[i].cmd == 0x01)
sunxi_lcd_delay_ms(hx8394d_test_config_para[i].count);
else
dsi_dcs_wr(0,hx8394d_test_config_para[i].cmd,hx8394d_test_config_para[i].para_list,hx8394d_test_config_para[i].count);
}
dsi_dcs_rd(0,0xDA,&rx_bf0,&rx_num);
dsi_dcs_rd(0,0xDB,&rx_bf1,&rx_num);
dsi_dcs_rd(0,0xDC,&rx_bf2,&rx_num);
if((rx_bf0 == 0x83) && (rx_bf1 == 0x94) && (rx_bf2 == 0xd) ){
hx8394d_used = 1;
if(hx8394d_used)
for(i=0;;i++)
{
if(hx8394d_initialization_setting[i].cmd == 0x02)
break;
else if (hx8394d_initialization_setting[i].cmd == 0x01)
sunxi_lcd_delay_ms(hx8394d_initialization_setting[i].count);
else
dsi_dcs_wr(0,hx8394d_initialization_setting[i].cmd,hx8394d_initialization_setting[i].para_list,hx8394d_initialization_setting[i].count);
}
} else {//used otm1283
for(i=0;;i++)
{
if(otm1283_initialization_setting[i].cmd == 0x02)
break;
else if (otm1283_initialization_setting[i].cmd == 0x01)
sunxi_lcd_delay_ms(otm1283_initialization_setting[i].count);
else
dsi_dcs_wr(0,otm1283_initialization_setting[i].cmd,otm1283_initialization_setting[i].para_list,otm1283_initialization_setting[i].count);
}
}
//sunxi_lcd_dsi_write(sel,DSI_DCS_EXIT_SLEEP_MODE, 0, 0);
//sunxi_lcd_delay_ms(200);
sunxi_lcd_dsi_clk_enable(sel);
//sunxi_lcd_dsi_write(sel,DSI_DCS_SET_DISPLAY_ON, 0, 0);
//sunxi_lcd_delay_ms(200);
return;
}
