int __init panel_cpt_wvga_48_init(struct omap_dss_platform_data *disp_data)
{
const struct archos_display_config *disp_cfg;
int ret = -ENODEV;
disp_cfg = omap_get_config( ARCHOS_TAG_DISPLAY, struct archos_display_config );
if (disp_cfg == NULL)
return ret;
if ( hardware_rev >= disp_cfg->nrev ) {
printk(KERN_DEBUG "archos_display_init: hardware_rev (%i) >= nrev (%i)\n",
hardware_rev, disp_cfg->nrev);
return ret;
}
display_gpio = disp_cfg->rev[hardware_rev];
/*
* Backlight configuration,
* TODO: retrieve GPT id and mux through omap_get_config()
*/
GPIO_INIT_OUTPUT(display_gpio.bkl_pwon);
bkl_pwm = omap_dm_timer_request_specific(display_gpio.bkl_pwm.timer);
if (bkl_pwm) {
omap_dm_timer_set_source(bkl_pwm, OMAP_TIMER_SRC_SYS_CLK);
omap_cfg_reg(display_gpio.bkl_pwm.mux_cfg);
} else
pr_err("panel_cpt_wvga_48_init: no backlight PWM\n");
/*
* Vcom configuration,
*/
vcom_pwm = omap_dm_timer_request_specific(display_gpio.vcom_pwm.timer);
if (vcom_pwm) {
omap_dm_timer_set_source(vcom_pwm, OMAP_TIMER_SRC_SYS_CLK);
omap_cfg_reg(display_gpio.vcom_pwm.mux_cfg);
} else
pr_err("panel_cpt_wvga_48_init: no vcom PWM\n");
panel_init(&cpt_wvga_48_panel);
#if defined(CONFIG_FB_OMAP_BOOTLOADER_INIT)
panel_set_backlight_level(NULL, 255);
#endif
disp_data->displays[disp_data->num_displays] = &cpt_wvga_48_panel;
disp_data->num_displays++;
return 0;
}
static void panel_disable(struct omap_display *disp)
{
pr_debug("panel_disable [%s]\n", disp->panel->name);
if (GPIO_EXISTS(display_gpio.lcd_rst))
omap_set_gpio_dataout( GPIO_PIN(display_gpio.lcd_rst), 0 );
if (GPIO_EXISTS(display_gpio.lcd_pci))
omap_set_gpio_dataout( GPIO_PIN(display_gpio.lcd_pci), 0 );
if (GPIO_EXISTS(display_gpio.lcd_pwon))
omap_set_gpio_dataout( GPIO_PIN(display_gpio.lcd_pwon), 0 );
saved_bkl_level = bkl_level;
panel_set_backlight_level(disp, 0);
panel_state = 0;
}
int __init panel_wqvga_32_init(struct omap_dss_device *disp_data)
{
const struct archos_display_config *disp_cfg;
int ret = -ENODEV;
pr_debug("panel_wqvga_32_init\n");
disp_cfg = omap_get_config( ARCHOS_TAG_DISPLAY, struct archos_display_config );
if (disp_cfg == NULL)
return ret;
if ( hardware_rev >= disp_cfg->nrev ) {
printk(KERN_DEBUG "archos_display_init: hardware_rev (%i) >= nrev (%i)\n",
hardware_rev, disp_cfg->nrev);
return ret;
}
display_gpio = disp_cfg->rev[hardware_rev];
/* init spi, bus line is used as mcspi */
omap_cfg_reg(display_gpio.spi.spi_clk.mux_cfg);
omap_cfg_reg(display_gpio.spi.spi_cs.mux_cfg);
omap_cfg_reg(display_gpio.spi.spi_data.mux_cfg);
spi_register_board_info(lcd_spi_board_info, 1);
panel_init(&byd_wqvga_32_panel);
#if defined(CONFIG_FB_OMAP_BOOTLOADER_INIT)
panel_set_backlight_level(NULL, 255);
#endif
if ( machine_is_archos_a32() && ( hardware_rev < 3 ) ) {
byd_wqvga_32_panel.phy.dpi.data_lines = 24;
byd_wqvga_32_panel.phy.dpi.dither = OMAP_DSS_DITHER_NONE;
}
*disp_data = byd_wqvga_32_panel;
return 0;
}
static int panel_enable(struct omap_display *disp)
{
pr_info("panel_enable [%s]\n", disp->panel->name);
if (GPIO_EXISTS(display_gpio.disp_select))
omap_set_gpio_dataout( GPIO_PIN(display_gpio.disp_select), 1);
if (GPIO_EXISTS(display_gpio.lcd_pwon)) {
omap_set_gpio_dataout( GPIO_PIN(display_gpio.lcd_pwon), 1 );
msleep(50);
}
if (GPIO_EXISTS(display_gpio.lcd_rst)) {
omap_set_gpio_dataout( GPIO_PIN(display_gpio.lcd_rst), 1 );
msleep(100);
}
if (GPIO_EXISTS(display_gpio.lcd_pci))
omap_set_gpio_dataout( GPIO_PIN(display_gpio.lcd_pci), 1 );
panel_state = 1;
panel_set_backlight_level(disp, saved_bkl_level);
return 0;
}
