static int set_debug_status_param(const char *val, struct kernel_param *kp)
{
int ret;
ret = param_set_int(val, kp);
if (ret) {
pr_err("error setting value %d\n", ret);
return ret;
}
pr_info("Set debug param to %d\n", bq2022_debug);
if (bq2022_debug) {
int i, j;
w1_bq2022_read();
for (i = 0; i < 4; i++) {
printk("Page %d ", i);
for (j = 0; j < 32; j++) {
printk("%02x ", *(batt_crypt_info + (i * 32 + j)));
}
printk("\n");
}
}
return 0;
}
static int hotplug_state_set(const char *arg, const struct kernel_param *kp)
{
int ret = 0;
if (!tegra3_cpu_lock)
return ret;
//mutex_lock(tegra3_cpu_lock);
ret = param_set_int(arg, kp);
if (ret == 0) {
if(hotplug_num> nr_cpu_ids)
hotplug_num=nr_cpu_ids;
else if (hotplug_num <=0)
hotplug_num=1;
printk("hotplug_state_set hotplug_state_set=%u num_online_cpus=%u\n",hotplug_num,num_online_cpus());
/*if(num_online_cpus() > hotplug_num ){
printk("hotplug_state_set count=%u\n",num_online_cpus()-hotplug_num);
queue_delayed_work(hotplug_wq, &cpu_down_work, 3*HZ);
}*/
}
//mutex_unlock(tegra3_cpu_lock);
return ret;
}
static int hcismd_set_enable(const char *val, struct kernel_param *kp)
{
int ret = 0;
pr_err("hcismd_set_enable %d", hcismd_set);
down(&hci_smd_enable);
ret = param_set_int(val, kp);
if (ret)
goto done;
switch (hcismd_set) {
case 1:
if (hs.hdev == NULL)
hci_smd_register_smd(&hs);
break;
case 0:
hci_smd_deregister_dev(&hs);
break;
default:
ret = -EFAULT;
}
done:
up(&hci_smd_enable);
return ret;
}
static int bq24192_therm_set_input_i_limit(const char *val,
const struct kernel_param *kp)
{
int ret;
if (!the_chip)
return -ENODEV;
ret = param_set_int(val, kp);
if (ret) {
pr_err("failed to set input_limit_idx\n");
return ret;
}
if (input_limit_idx >= ARRAY_SIZE(mitigate_tbl))
input_limit_idx = ARRAY_SIZE(mitigate_tbl) - 1;
if (!power_supply_is_system_supplied())
return 0;
schedule_delayed_work(&the_chip->therm_work,
msecs_to_jiffies(2000));
return 0;
}
static int set_h2w_path(const char *val, struct kernel_param *kp)
{
int ret = -EINVAL;
int enable;
ret = param_set_int(val, kp);
if (ret)
return ret;
switch (hero_h2w_path) {
case H2W_GPIO:
enable = 1;
cnf_driver_event("H2W_enable_irq", &enable);
break;
case H2W_UART3:
enable = 0;
cnf_driver_event("H2W_enable_irq", &enable);
break;
default:
hero_h2w_path = -1;
return -EINVAL;
}
h2w_configure(hero_h2w_path);
return ret;
}
static int set_test_mode(const char *val, const struct kernel_param *kp)
{
int rv = param_set_int(val, kp);
if (rv)
return rv;
if (test_mode > EARLYSUSPEND) {
test_mode = NONE;
return 0;
}
switch (test_mode) {
case EARLYSUSPEND:
if (!wake_lock_active(&test_wake_lock))
wake_lock(&test_wake_lock);
break;
case SUSPEND:
case NONE:
if (wake_lock_active(&test_wake_lock))
wake_unlock(&test_wake_lock);
}
pr_info("%s: suspend autotest mode is %d\n", __func__, test_mode);
return 0;
}
static int set_h2w_path(const char *val, struct kernel_param *kp)
{
int ret = -EINVAL;
int enable;
int current_h2w_path = bahamas_h2w_path;
ret = param_set_int(val, kp);
if (ret)
return ret;
if (bahamas_h2w_path == current_h2w_path) {
printk(KERN_INFO "%s: H2W path has been set to %s\n", __func__,
(bahamas_h2w_path == H2W_UART3) ? "UART3" : "GPIO");
return ret;
}
switch (bahamas_h2w_path) {
case H2W_GPIO:
enable = 1;
cnf_driver_event("H2W_enable_irq", &enable);
break;
case H2W_UART3:
enable = 0;
cnf_driver_event("H2W_enable_irq", &enable);
break;
default:
bahamas_h2w_path = -1;
return -EINVAL;
}
h2w_configure(bahamas_h2w_path);
return ret;
}
static int bluesleep_lpm_btwrite(const char *val, const struct kernel_param *kp)
{
int ret;
ret = param_set_int(val, kp);
if (ret) {
BT_ERR("HCIATH3K: lpm btwrite parameter set failed");
return ret;
}
BT_DBG("btwrite : %d", lpm_btwrite);
if (is_lpm_enabled) {
if (lpm_btwrite == 0) {
/*Setting TXEXPIRED bit to make it
compatible with current solution*/
set_bit(BT_TXEXPIRED, &flags);
hsuart_serial_clock_off(bsi->uport);
} else if (lpm_btwrite == 1) {
ath_wakeup_ar3k();
clear_bit(BT_TXEXPIRED, &flags);
} else {
BT_ERR("HCIATH3K invalid btwrite value");
return -EINVAL;
}
}
return 0;
}
static int mp_policy_set(const char *arg, const struct kernel_param *kp)
{
int ret = 0;
if (!tegra3_cpu_lock)
return ret;
mutex_lock(tegra3_cpu_lock);
ret = param_set_int(arg, kp);
if (ret == 0) {
if (mp_policy > 0) {
memcpy(NwNs_Threshold, NwNs, sizeof(unsigned int)*8);
memcpy(TwTs_Threshold, TwTs, sizeof(unsigned int)*8);
set_rq_poll_ms(9);
} else {
mp_policy = 0;
pr_info(CPU_HOTPLUG_TAG" mp_policy is off\n");
}
} else
pr_warn(CPU_HOTPLUG_TAG" %s: unable to set tegra mp_policy %s\n",
__func__, arg);
mutex_unlock(tegra3_cpu_lock);
return ret;
}
static int bluesleep_lpm_set(const char *val, const struct kernel_param *kp)
{
int ret;
ret = param_set_int(val, kp);
if (ret) {
BT_ERR("HCIATH3K: lpm enable parameter set failed");
return ret;
}
BT_DBG("lpm : %d", lpm_enabled);
if ((lpm_enabled == 0) && is_lpm_enabled) {
ath_lpm_stop();
clear_bit(BT_SLEEPENABLE, &flags);
is_lpm_enabled = false;
} else if ((lpm_enabled == 1) && !is_lpm_enabled) {
if (ath_lpm_start() < 0) {
BT_ERR("HCIATH3K LPM mode failed");
return -EIO;
}
set_bit(BT_SLEEPENABLE, &flags);
is_lpm_enabled = true;
} else {
BT_ERR("HCIATH3K invalid lpm value");
return -EINVAL;
}
return 0;
}
static int restart_level_set(const char *val, struct kernel_param *kp)
{
int ret;
int old_val = restart_level;
ret = param_set_int(val, kp);
if (ret)
return ret;
switch (restart_level) {
case RESET_SOC:
case RESET_SUBSYS_COUPLED:
case RESET_SUBSYS_INDEPENDENT:
pr_info("Subsystem Restart: Phase %d behavior activated.\n",
restart_level);
break;
case RESET_SUBSYS_MIXED:
pr_info("Subsystem Restart: Phase 2+ behavior activated.\n");
break;
default:
restart_level = old_val;
return -EINVAL;
break;
}
if (restart_level != old_val)
restart_level_changed();
return 0;
}
static int hcismd_set_enable(const char *val, struct kernel_param *kp)
{
int ret = 0;
mutex_lock(&hci_smd_enable);
ret = param_set_int(val, kp);
if (ret)
goto done;
switch (hcismd_set) {
case 1:
hci_smd_register_dev(&hs);
break;
case 0:
hci_smd_deregister_dev(&hs);
break;
default:
ret = -EFAULT;
}
done:
mutex_unlock(&hci_smd_enable);
return ret;
}
static int hcismd_set_enable(const char *val, struct kernel_param *kp)
{
#if 1 /* HTC_BT modify */
/* note: add get parameter value feature */
int ret = 0;
unsigned long enable;
ret = strict_strtoul(val, 10, &enable);
if (ret)
return ret;
if ( hcismd_set == enable )
return 0;
mutex_lock(&hci_smd_enable);
switch (enable) {
case 1:
if (0 == hci_smd_register_dev(&hs))
hcismd_set = 1;
break;
case 0:
hci_smd_deregister_dev(&hs);
hcismd_set = 0;
break;
default:
ret = -EFAULT;
}
mutex_unlock(&hci_smd_enable);
return ret;
#else /* QCT original */
int ret = 0;
mutex_lock(&hci_smd_enable);
ret = param_set_int(val, kp);
if (ret)
goto done;
switch (hcismd_set) {
case 1:
hci_smd_register_dev(&hs);
break;
case 0:
hci_smd_deregister_dev(&hs);
break;
default:
ret = -EFAULT;
}
done:
mutex_unlock(&hci_smd_enable);
return ret;
#endif /* HTC_BT modify */
}
static int hcismd_set_enable(const char *val, struct kernel_param *kp)
{
#if 1
int ret = 0;
unsigned long enable;
ret = strict_strtoul(val, 10, &enable);
if (ret)
return ret;
if ( hcismd_set == enable )
return 0;
mutex_lock(&hci_smd_enable);
switch (enable) {
case 1:
if (0 == hci_smd_register_smd(&hs))
hcismd_set = 1;
break;
case 0:
hci_smd_deregister_dev(&hs);
hcismd_set = 0;
break;
default:
ret = -EFAULT;
}
mutex_unlock(&hci_smd_enable);
return ret;
#else
int ret = 0;
mutex_lock(&hci_smd_enable);
ret = param_set_int(val, kp);
if (ret)
goto done;
switch (hcismd_set) {
case 1:
hci_smd_register_smd(&hs);
break;
case 0:
hci_smd_deregister_dev(&hs);
break;
default:
ret = -EFAULT;
}
done:
mutex_unlock(&hci_smd_enable);
return ret;
#endif
}
static int param_set_idle_sleep_mode_def(const char *val,
struct kernel_param *kp)
{
int ret;
ret = param_set_int(val, kp);
msm_pm_idle_sleep_mode = idle_sleep_mode_def;
return ret;
}
static int hidden_reset_param_set_int(const char *val, struct kernel_param *kp)
{
int ret;
ret = param_set_int(val, kp);
lge_set_hidden_enable(hidden_reset_enable);
return ret;
}
static int param_set_core_scaling(const char *val, const struct kernel_param *kp)
{
int ret = param_set_int(val, kp);
if (1 == mali_core_scaling_enable) {
mali_core_scaling_sync(mali_executor_get_num_cores_enabled());
}
return ret;
}
static int arb_intr_mma_set(const char *arg, const struct kernel_param *kp)
{
int ret;
unsigned long flags;
spin_lock_irqsave(&arb_intr_info.lock, flags);
ret = param_set_int(arg, kp);
spin_unlock_irqrestore(&arb_intr_info.lock, flags);
return ret;
}
static int max_online_cpus_set(const char *arg, const struct kernel_param *kp)
{
int ret;
ret = param_set_int(arg, kp);
//default to cpus available if set value is out of range
if ((max_online_cpus < 1) || (max_online_cpus > CPUS_AVAILABLE))
max_online_cpus = CPUS_AVAILABLE;
return ret;
}
static int set_led_mode(const char *val, struct kernel_param *kp)
{
int ret;
int rc = 0;
ret = param_set_int(val, kp);
if (ret) {
pr_err("error setting value %d\n", ret);
return ret;
}
printk("__%s: led_config=%d!\n",__func__,led_config);
switch(led_config){
case 0:
aw9106b_power_set(AW_POWER_DOWN);
break;
case 1:
outn = AW_OUT_0;
break;
case 2:
outn = AW_OUT_1;
break;
case 3:
aw9106b_show_regs();
break;
case 4:
enable_outn_const_led(AW_CONST_ON, MAX_18_5__MA,min_grade);
break;
case 5:
enable_outn_blink_led(AW_FADE_AUTO,max_current);
rc |= start_blink_led(max_current);
if(rc < 0)
pr_err("%s: start blink fail!\n",__func__);
break;
case 6:
close_out_blink_led(AW_CLOSE_NOW);
break;
case 7:
close_out_blink_led(AW_CLOSE_DELAY);
break;
default:
break;
};
return 0;
}
static int store_outn(const char *val, struct kernel_param *kp)
{
int ret = 0;
ret = param_set_int(val, kp);
if (ret) {
pr_err("error setting value %d\n", ret);
return ret;
}
return ret;
}
static int enable_wcnss_suspend_notify_set(const char *val,
struct kernel_param *kp)
{
int ret;
ret = param_set_int(val, kp);
if (ret)
return ret;
if (enable_wcnss_suspend_notify)
pr_debug("Suspend notification activated for wcnss\n");
return 0;
}
static int set_enabled(const char *val, const struct kernel_param *kp)
{
int ret = 0;
ret = param_set_int(val, kp);
if (mpu_enable == MPU_MAGIC_LOCK)
mem_prot_region(mpu_start, mpu_size, true);
else if (mpu_enable == MPU_MAGIC_UNLOCK)
mem_prot_region(mpu_start, mpu_size, false);
return ret;
}
static int set_param_ifnum(const char *val, struct kernel_param *kp)
{
int rv = param_set_int(val, kp);
if (rv)
return rv;
if ((ifnum_to_use < 0) || (ifnum_to_use == ipmi_ifnum))
return 0;
ipmi_po_smi_gone(ipmi_ifnum);
ipmi_po_new_smi(ifnum_to_use, NULL);
return 0;
}
static int set_param_wdog_ifnum(const char *val, const struct kernel_param *kp)
{
int rv = param_set_int(val, kp);
if (rv)
return rv;
if ((ifnum_to_use < 0) || (ifnum_to_use == watchdog_ifnum))
return 0;
ipmi_unregister_watchdog(watchdog_ifnum);
ipmi_register_watchdog(ifnum_to_use);
return 0;
}
static int min_online_cpus_set(const char *arg, const struct kernel_param *kp)
{
int ret;
ret = param_set_int(arg, kp);
///at least 1 core must run even if set value is out of range
if ((min_online_cpus < 1) || (min_online_cpus > CPUS_AVAILABLE))
min_online_cpus = 1;
return ret;
}
/* just like param_set_int() but does sanity-check so that it won't point
* over the axis array size
*/
static int param_set_axis(const char *val, const struct kernel_param *kp)
{
int ret = param_set_int(val, kp);
if (!ret) {
int val = *(int *)kp->arg;
if (val < 0)
val = -val;
if (!val || val > 3)
return -EINVAL;
}
return ret;
}
static int enable_riva_ssr_set(const char *val, struct kernel_param *kp)
{
int ret;
ret = param_set_int(val, kp);
if (ret)
return ret;
if (enable_riva_ssr)
pr_info("Subsystem restart activated for riva.\n");
return 0;
}
static int otm1280a_cabc_mode(const char *val, struct kernel_param *kp)
{
int value;
int ret = param_set_int(val, kp);
if(ret < 0)
{
printk(KERN_ERR"%s Invalid argument\n", __func__);
return -EINVAL;
}
value = *((int*)kp->arg);
return otm1280a_cabc_control(value);
}
static int edac_set_debug_level(const char *buf, struct kernel_param *kp)
{
unsigned long val;
int ret;
ret = kstrtoul(buf, 0, &val);
if (ret)
return ret;
if (val > 4)
return -EINVAL;
return param_set_int(buf, kp);
}
