static int hpt_attach(device_t dev)
{
PHBA hba = (PHBA)device_get_softc(dev);
HIM *him = hba->ldm_adapter.him;
PCI_ID pci_id;
HPT_UINT size;
PVBUS vbus;
PVBUS_EXT vbus_ext;
KdPrint(("hpt_attach(%d/%d/%d)", pci_get_bus(dev), pci_get_slot(dev), pci_get_function(dev)));
pci_enable_busmaster(dev);
pci_id.vid = pci_get_vendor(dev);
pci_id.did = pci_get_device(dev);
pci_id.rev = pci_get_revid(dev);
pci_id.subsys = (HPT_U32)(pci_get_subdevice(dev)) << 16 | pci_get_subvendor(dev);
size = him->get_adapter_size(&pci_id);
hba->ldm_adapter.him_handle = kmalloc(size, M_DEVBUF, M_WAITOK);
if (!hba->ldm_adapter.him_handle)
return ENXIO;
hba->pcidev = dev;
hba->pciaddr.tree = 0;
hba->pciaddr.bus = pci_get_bus(dev);
hba->pciaddr.device = pci_get_slot(dev);
hba->pciaddr.function = pci_get_function(dev);
if (!him->create_adapter(&pci_id, hba->pciaddr, hba->ldm_adapter.him_handle, hba)) {
kfree(hba->ldm_adapter.him_handle, M_DEVBUF);
return -1;
}
os_printk("adapter at PCI %d:%d:%d, IRQ %d",
hba->pciaddr.bus, hba->pciaddr.device, hba->pciaddr.function, pci_get_irq(dev));
if (!ldm_register_adapter(&hba->ldm_adapter)) {
size = ldm_get_vbus_size();
vbus_ext = kmalloc(sizeof(VBUS_EXT) + size, M_DEVBUF, M_WAITOK);
if (!vbus_ext) {
kfree(hba->ldm_adapter.him_handle, M_DEVBUF);
return -1;
}
memset(vbus_ext, 0, sizeof(VBUS_EXT));
vbus_ext->ext_type = EXT_TYPE_VBUS;
ldm_create_vbus((PVBUS)vbus_ext->vbus, vbus_ext);
ldm_register_adapter(&hba->ldm_adapter);
}
ldm_for_each_vbus(vbus, vbus_ext) {
if (hba->ldm_adapter.vbus==vbus) {
hba->vbus_ext = vbus_ext;
hba->next = vbus_ext->hba_list;
vbus_ext->hba_list = hba;
break;
}
}
return 0;
}
static int
pcie_endpoint_cap_common_init(PCIDevice *dev, uint8_t offset, uint8_t cap_size)
{
uint8_t type = PCI_EXP_TYPE_ENDPOINT;
Error *local_err = NULL;
int ret;
/*
* Windows guests will report Code 10, device cannot start, if
* a regular Endpoint type is exposed on a root complex. These
* should instead be Root Complex Integrated Endpoints.
*/
if (pci_bus_is_express(pci_get_bus(dev))
&& pci_bus_is_root(pci_get_bus(dev))) {
type = PCI_EXP_TYPE_RC_END;
}
if (cap_size == PCI_EXP_VER1_SIZEOF) {
return pcie_cap_v1_init(dev, offset, type, 0);
} else {
ret = pcie_cap_init(dev, offset, type, 0, &local_err);
if (ret < 0) {
error_report_err(local_err);
}
return ret;
}
}
static void
ecc_e31200_status(struct ecc_e31200_softc *sc)
{
device_t dev = sc->ecc_device;
uint16_t errsts;
int bus, slot;
bus = pci_get_bus(dev);
slot = pci_get_slot(dev);
errsts = pcib_read_config(dev, bus, slot, 0, PCI_E31200_ERRSTS, 2);
if (errsts & PCI_E31200_ERRSTS_DMERR)
ecc_printf(sc, "Uncorrectable multilple-bit ECC error\n");
else if (errsts & PCI_E31200_ERRSTS_DSERR)
ecc_printf(sc, "Correctable single-bit ECC error\n");
if (errsts & (PCI_E31200_ERRSTS_DSERR | PCI_E31200_ERRSTS_DMERR)) {
if (sc->ecc_addr != NULL)
ecc_e31200_errlog(sc);
/* Clear pending errors */
pcib_write_config(dev, bus, slot, 0, PCI_E31200_ERRSTS,
errsts, 2);
}
}
static void
sfxge_mcdi_logger(void *arg, efx_log_msg_t type,
void *header, size_t header_size,
void *data, size_t data_size)
{
struct sfxge_softc *sc = (struct sfxge_softc *)arg;
char buffer[SFXGE_MCDI_LOG_BUF_SIZE];
size_t pfxsize;
size_t start;
if (!sc->mcdi_logging)
return;
pfxsize = snprintf(buffer, sizeof(buffer),
"sfc %04x:%02x:%02x.%02x %s MCDI RPC %s:",
pci_get_domain(sc->dev),
pci_get_bus(sc->dev),
pci_get_slot(sc->dev),
pci_get_function(sc->dev),
device_get_nameunit(sc->dev),
type == EFX_LOG_MCDI_REQUEST ? "REQ" :
type == EFX_LOG_MCDI_RESPONSE ? "RESP" : "???");
start = sfxge_mcdi_do_log(buffer, header, header_size,
pfxsize, pfxsize);
start = sfxge_mcdi_do_log(buffer, data, data_size, pfxsize, start);
if (start != pfxsize) {
buffer[start] = '\0';
printf("%s\n", buffer);
}
}
int
ixp425_md_route_interrupt(device_t bridge, device_t device, int pin)
{
static int ixp425_pci_table[IXP425_MAX_DEV][IXP425_MAX_LINE] = {
{PCI_INT_A, PCI_INT_B, PCI_INT_C, PCI_INT_D},
{PCI_INT_B, PCI_INT_C, PCI_INT_D, PCI_INT_A},
{PCI_INT_C, PCI_INT_D, PCI_INT_A, PCI_INT_B},
{PCI_INT_D, PCI_INT_A, PCI_INT_B, PCI_INT_C},
/* NB: for optional USB controller on Gateworks Avila */
{PCI_INT_A, PCI_INT_B, PCI_INT_C, PCI_INT_D},
};
int dev;
dev = pci_get_slot(device);
if (bootverbose)
device_printf(bridge, "routing pin %d for %s\n", pin,
device_get_nameunit(device));
if (pin >= 1 && pin <= IXP425_MAX_LINE &&
dev >= 1 && dev <= IXP425_MAX_DEV) {
return (ixp425_pci_table[dev - 1][pin - 1]);
} else
printf("ixppcib: no mapping for %d/%d/%d\n",
pci_get_bus(device), dev, pci_get_function(device));
return (-1);
}
int
vga_pci_repost(device_t dev)
{
#if defined(__amd64__) || (defined(__i386__) && !defined(PC98))
x86regs_t regs;
if (!vga_pci_is_boot_display(dev))
return (EINVAL);
if (x86bios_get_orm(VGA_PCI_BIOS_SHADOW_ADDR) == NULL)
return (ENOTSUP);
x86bios_init_regs(®s);
regs.R_AH = pci_get_bus(dev);
regs.R_AL = (pci_get_slot(dev) << 3) | (pci_get_function(dev) & 0x07);
regs.R_DL = 0x80;
device_printf(dev, "REPOSTing\n");
x86bios_call(®s, X86BIOS_PHYSTOSEG(VGA_PCI_BIOS_SHADOW_ADDR + 3),
X86BIOS_PHYSTOOFF(VGA_PCI_BIOS_SHADOW_ADDR + 3));
x86bios_get_intr(0x10);
return (0);
#else
return (ENOTSUP);
#endif
}
static int hpt_probe(device_t dev)
{
PCI_ID pci_id;
HIM *him;
int i;
PHBA hba;
/* Some of supported chips are used not only by HPT. */
if (pci_get_vendor(dev) != 0x1103 && !attach_generic)
return (ENXIO);
for (him = him_list; him; him = him->next) {
for (i=0; him->get_supported_device_id(i, &pci_id); i++) {
if ((pci_get_vendor(dev) == pci_id.vid) &&
(pci_get_device(dev) == pci_id.did)){
KdPrint(("hpt_probe: adapter at PCI %d:%d:%d, IRQ %d",
pci_get_bus(dev), pci_get_slot(dev), pci_get_function(dev), pci_get_irq(dev)
));
device_set_desc(dev, him->name);
hba = (PHBA)device_get_softc(dev);
memset(hba, 0, sizeof(HBA));
hba->ext_type = EXT_TYPE_HBA;
hba->ldm_adapter.him = him;
return 0;
}
}
}
return (ENXIO);
}
void pcie_cap_slot_unplug_request_cb(HotplugHandler *hotplug_dev,
DeviceState *dev, Error **errp)
{
Error *local_err = NULL;
PCIDevice *pci_dev = PCI_DEVICE(dev);
PCIBus *bus = pci_get_bus(pci_dev);
pcie_cap_slot_plug_common(PCI_DEVICE(hotplug_dev), dev, &local_err);
if (local_err) {
error_propagate(errp, local_err);
return;
}
/* In case user cancel the operation of multi-function hot-add,
* remove the function that is unexposed to guest individually,
* without interaction with guest.
*/
if (pci_dev->devfn &&
!bus->devices[0]) {
pcie_unplug_device(bus, pci_dev, NULL);
return;
}
pcie_cap_slot_push_attention_button(PCI_DEVICE(hotplug_dev));
}
static int hpt_probe(device_t dev)
{
PCI_ID pci_id;
HIM *him;
int i;
PHBA hba;
for (him = him_list; him; him = him->next) {
for (i=0; him->get_supported_device_id(i, &pci_id); i++) {
if (him->get_controller_count)
him->get_controller_count(&pci_id,0,0);
if ((pci_get_vendor(dev) == pci_id.vid) &&
(pci_get_device(dev) == pci_id.did)){
KdPrint(("hpt_probe: adapter at PCI %d:%d:%d, IRQ %d",
pci_get_bus(dev), pci_get_slot(dev), pci_get_function(dev), pci_get_irq(dev)
));
device_set_desc(dev, him->name);
hba = (PHBA)device_get_softc(dev);
memset(hba, 0, sizeof(HBA));
hba->ext_type = EXT_TYPE_HBA;
hba->ldm_adapter.him = him;
return 0;
}
}
}
return (ENXIO);
}
phandle_t
ofw_pci_node(device_t dev)
{
return (ofw_pci_find_node(pci_get_bus(dev), pci_get_slot(dev),
pci_get_function(dev)));
}
static int
octopci_route_interrupt(device_t dev, device_t child, int pin)
{
struct octopci_softc *sc;
unsigned bus, slot, func;
unsigned irq;
sc = device_get_softc(dev);
bus = pci_get_bus(child);
slot = pci_get_slot(child);
func = pci_get_function(child);
#if defined(OCTEON_VENDOR_LANNER)
if (slot < 32) {
if (slot == 3 || slot == 9)
irq = pin;
else
irq = pin - 1;
return (CVMX_IRQ_PCI_INT0 + (irq & 3));
}
#endif
irq = slot + pin - 3;
return (CVMX_IRQ_PCI_INT0 + (irq & 3));
}
static PCIBridgeWindows *pci_bridge_region_init(PCIBridge *br)
{
PCIDevice *pd = PCI_DEVICE(br);
PCIBus *parent = pci_get_bus(pd);
PCIBridgeWindows *w = g_new(PCIBridgeWindows, 1);
uint16_t cmd = pci_get_word(pd->config + PCI_COMMAND);
pci_bridge_init_alias(br, &w->alias_pref_mem,
PCI_BASE_ADDRESS_MEM_PREFETCH,
"pci_bridge_pref_mem",
&br->address_space_mem,
parent->address_space_mem,
cmd & PCI_COMMAND_MEMORY);
pci_bridge_init_alias(br, &w->alias_mem,
PCI_BASE_ADDRESS_SPACE_MEMORY,
"pci_bridge_mem",
&br->address_space_mem,
parent->address_space_mem,
cmd & PCI_COMMAND_MEMORY);
pci_bridge_init_alias(br, &w->alias_io,
PCI_BASE_ADDRESS_SPACE_IO,
"pci_bridge_io",
&br->address_space_io,
parent->address_space_io,
cmd & PCI_COMMAND_IO);
pci_bridge_init_vga_aliases(br, parent, w->alias_vga);
return w;
}
static int
ofw_pci_route_interrupt(device_t bus, device_t dev, int pin)
{
struct ofw_pci_softc *sc;
struct ofw_pci_register reg;
uint32_t pintr, mintr[2];
int intrcells;
phandle_t iparent;
sc = device_get_softc(bus);
pintr = pin;
/* Fabricate imap information in case this isn't an OFW device */
bzero(®, sizeof(reg));
reg.phys_hi = (pci_get_bus(dev) << OFW_PCI_PHYS_HI_BUSSHIFT) |
(pci_get_slot(dev) << OFW_PCI_PHYS_HI_DEVICESHIFT) |
(pci_get_function(dev) << OFW_PCI_PHYS_HI_FUNCTIONSHIFT);
intrcells = ofw_bus_lookup_imap(ofw_bus_get_node(dev),
&sc->sc_pci_iinfo, ®, sizeof(reg), &pintr, sizeof(pintr),
mintr, sizeof(mintr), &iparent);
if (intrcells) {
pintr = ofw_bus_map_intr(dev, iparent, intrcells, mintr);
return (pintr);
}
/* Maybe it's a real interrupt, not an intpin */
if (pin > 4)
return (pin);
device_printf(bus, "could not route pin %d for device %d.%d\n",
pin, pci_get_slot(dev), pci_get_function(dev));
return (PCI_INVALID_IRQ);
}
static void pci_bridge_region_del(PCIBridge *br, PCIBridgeWindows *w)
{
PCIDevice *pd = PCI_DEVICE(br);
PCIBus *parent = pci_get_bus(pd);
memory_region_del_subregion(parent->address_space_io, &w->alias_io);
memory_region_del_subregion(parent->address_space_mem, &w->alias_mem);
memory_region_del_subregion(parent->address_space_mem, &w->alias_pref_mem);
pci_unregister_vga(pd);
}
extern int
machdep_pci_route_interrupt(device_t pcib, device_t dev, int pin)
{
int bus;
int device;
int func;
uint32_t busno;
struct i80321_pci_softc *sc = device_get_softc(pcib);
bus = pci_get_bus(dev);
device = pci_get_slot(dev);
func = pci_get_function(dev);
busno = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, ATU_PCIXSR);
busno = PCIXSR_BUSNO(busno);
if (busno == 0xff)
busno = 0;
if (bus != busno)
goto no_mapping;
switch (device) {
/* IQ31244 PCI */
case 1: /* PCIX-PCIX bridge */
/*
* The S-ATA chips are behind the bridge, and all of
* the S-ATA interrupts are wired together.
*/
return (ICU_INT_XINT(2));
case 2: /* PCI slot */
/* All pins are wired together. */
return (ICU_INT_XINT(3));
case 3: /* i82546 dual Gig-E */
if (pin == 1 || pin == 2)
return (ICU_INT_XINT(0));
goto no_mapping;
/* IQ80321 PCI */
case 4: /* i82544 Gig-E */
case 8: /*
* Apparently you can set the device for the ethernet adapter
* to 8 with a jumper, so handle that as well
*/
if (pin == 1)
return (ICU_INT_XINT(0));
goto no_mapping;
case 6: /* S-PCI-X slot */
if (pin == 1)
return (ICU_INT_XINT(2));
if (pin == 2)
return (ICU_INT_XINT(3));
goto no_mapping;
default:
no_mapping:
printf("No mapping for %d/%d/%d/%c\n", bus, device, func, pin);
}
return (0);
}
/*
* Return a pointer to a pretty name for a PCI device. If the device
* has a driver attached, the device's name is used, otherwise a name
* is generated from the device's PCI address.
*/
const char *
pcib_child_name(device_t child)
{
static char buf[64];
if (device_get_nameunit(child) != NULL)
return (device_get_nameunit(child));
snprintf(buf, sizeof(buf), "pci%d:%d:%d:%d", pci_get_domain(child),
pci_get_bus(child), pci_get_slot(child), pci_get_function(child));
return (buf);
}
static int
legacy_pcib_route_interrupt(device_t pcib, device_t dev, int pin)
{
#ifdef __HAVE_PIR
return (pci_pir_route_interrupt(pci_get_bus(dev), pci_get_slot(dev),
pci_get_function(dev), pin));
#else
/* No routing possible */
return (PCI_INVALID_IRQ);
#endif
}
static struct resource *
xlp_pci_alloc_resource(device_t bus, device_t child, int type, int *rid,
u_long start, u_long end, u_long count, u_int flags)
{
struct resource *r;
struct xlp_devinfo *xlp_devinfo;
int busno;
/*
* Do custom allocation for MEMORY resource for SoC device if
* MEM_RES_EMUL flag is set
*/
busno = pci_get_bus(child);
if ((type == SYS_RES_MEMORY || type == SYS_RES_IOPORT) && busno == 0) {
xlp_devinfo = (struct xlp_devinfo *)device_get_ivars(child);
if ((xlp_devinfo->flags & MEM_RES_EMUL) != 0) {
/* no emulation for IO ports */
if (type == SYS_RES_IOPORT)
return (NULL);
start = xlp_devinfo->mem_res_start;
count = XLP_PCIE_CFG_SIZE - XLP_IO_PCI_HDRSZ;
/* MMC needs to 2 slots with rids 16 and 20 and a
* fixup for size */
if (pci_get_device(child) == PCI_DEVICE_ID_NLM_MMC) {
count = 0x100;
if (*rid == 16)
; /* first slot already setup */
else if (*rid == 20)
start += 0x100; /* second slot */
else
return (NULL);
}
end = start + count - 1;
r = BUS_ALLOC_RESOURCE(device_get_parent(bus), child,
type, rid, start, end, count, flags);
if (r == NULL)
return (NULL);
if ((xlp_devinfo->flags & DEV_MMIO32) != 0)
rman_set_bustag(r, rmi_uart_bus_space);
return (r);
}
}
/* Not custom alloc, use PCI code */
return (pci_alloc_resource(bus, child, type, rid, start, end, count,
flags));
}
static int
t4iov_attach(device_t dev)
{
struct t4iov_softc *sc;
sc = device_get_softc(dev);
sc->sc_dev = dev;
sc->sc_main = pci_find_dbsf(pci_get_domain(dev), pci_get_bus(dev),
pci_get_slot(dev), 4);
if (T4_IS_MAIN_READY(sc->sc_main) == 0)
return (t4iov_attach_child(dev));
return (0);
}
static int hpt_probe(device_t dev)
{
HIM *him;
him = hpt_match(dev);
if (him != NULL) {
KdPrint(("hpt_probe: adapter at PCI %d:%d:%d, IRQ %d",
pci_get_bus(dev), pci_get_slot(dev), pci_get_function(dev), pci_get_irq(dev)
));
device_set_desc(dev, him->name);
return (BUS_PROBE_DEFAULT);
}
return (ENXIO);
}
/*
* Set the SYSTEM_IDLE_TIMEOUT to 80 ns on nForce2 systems to work
* around a hang that is triggered when the CPU generates a very fast
* CONNECT/HALT cycle sequence. Specifically, the hang can result in
* the lapic timer being stopped.
*
* This requires changing the value for config register at offset 0x6c
* for the Host-PCI bridge at bus/dev/function 0/0/0:
*
* Chip Current Value New Value
* ---- ---------- ----------
* C17 0x1F0FFF01 0x1F01FF01
* C18D 0x9F0FFF01 0x9F01FF01
*
* We do this by always clearing the bits in 0x000e0000.
*
* See also: http://lkml.org/lkml/2004/5/3/157
*/
static void
fixc1_nforce2(device_t dev)
{
uint32_t val;
if (pci_get_bus(dev) == 0 && pci_get_slot(dev) == 0 &&
pci_get_function(dev) == 0) {
val = pci_read_config(dev, 0x6c, 4);
if (val & 0x000e0000) {
printf("Correcting nForce2 C1 CPU disconnect hangs\n");
val &= ~0x000e0000;
pci_write_config(dev, 0x6c, val, 4);
}
}
}
static struct pptdev *
ppt_find(int bus, int slot, int func)
{
device_t dev;
int i, b, s, f;
for (i = 0; i < num_pptdevs; i++) {
dev = pptdevs[i].dev;
b = pci_get_bus(dev);
s = pci_get_slot(dev);
f = pci_get_function(dev);
if (bus == b && slot == s && func == f)
return (&pptdevs[i]);
}
return (NULL);
}
static int
xlp_pci_release_resource(device_t bus, device_t child, int type, int rid,
struct resource *r)
{
u_long start;
/* If custom alloc, handle that */
start = rman_get_start(r);
if (type == SYS_RES_MEMORY && pci_get_bus(child) == 0 &&
start >= EMUL_MEM_START && start <= EMUL_MEM_END)
return (BUS_RELEASE_RESOURCE(device_get_parent(bus), child,
type, rid, r));
/* use default PCI function */
return (bus_generic_rl_release_resource(bus, child, type, rid, r));
}
int
ppt_unassign_all(struct vm *vm)
{
int i, bus, slot, func;
device_t dev;
for (i = 0; i < num_pptdevs; i++) {
if (pptdevs[i].vm == vm) {
dev = pptdevs[i].dev;
bus = pci_get_bus(dev);
slot = pci_get_slot(dev);
func = pci_get_function(dev);
vm_unassign_pptdev(vm, bus, slot, func);
}
}
return (0);
}
static void
acpi_pci_update_device(ACPI_HANDLE handle, device_t pci_child)
{
ACPI_STATUS status;
device_t child;
/*
* Lookup and remove the unused device that acpi0 creates when it walks
* the namespace creating devices.
*/
child = acpi_get_device(handle);
if (child != NULL) {
if (device_is_alive(child)) {
/*
* The TabletPC TC1000 has a second PCI-ISA bridge
* that has a _HID for an acpi_sysresource device.
* In that case, leave ACPI-CA's device data pointing
* at the ACPI-enumerated device.
*/
device_printf(child,
"Conflicts with PCI device %d:%d:%d\n",
pci_get_bus(pci_child), pci_get_slot(pci_child),
pci_get_function(pci_child));
return;
}
KASSERT(device_get_parent(child) ==
devclass_get_device(devclass_find("acpi"), 0),
("%s: child (%s)'s parent is not acpi0", __func__,
acpi_name(handle)));
device_delete_child(device_get_parent(child), child);
}
/*
* Update ACPI-CA to use the PCI enumerated device_t for this handle.
*/
status = AcpiDetachData(handle, acpi_fake_objhandler);
if (ACPI_FAILURE(status))
kprintf("WARNING: Unable to detach object data from %s - %s\n",
acpi_name(handle), AcpiFormatException(status));
status = AcpiAttachData(handle, acpi_fake_objhandler, pci_child);
if (ACPI_FAILURE(status))
kprintf("WARNING: Unable to attach object data to %s - %s\n",
acpi_name(handle), AcpiFormatException(status));
}
extern int
machdep_pci_route_interrupt(device_t pcib, device_t dev, int pin)
{
int bus;
int device;
int func;
uint32_t busno;
struct i80321_pci_softc *sc = device_get_softc(pcib);
bus = pci_get_bus(dev);
device = pci_get_slot(dev);
func = pci_get_function(dev);
busno = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, ATU_PCIXSR);
busno = PCIXSR_BUSNO(busno);
if (busno == 0xff)
busno = 0;
if (bus != busno)
goto no_mapping;
switch (device) {
/* EP80219 PCI */
case 1: /* Ethernet i82555 10/100 */
printf("Device %d routed to irq %d\n", device, ICU_INT_XINT(0));
return (ICU_INT_XINT(0));
case 2: /* UART */
printf("Device %d routed to irq %d\n", device, ICU_INT_XINT(1));
return (ICU_INT_XINT(1));
case 3:
/*
* The S-ATA chips are behind the bridge, and all of
* the S-ATA interrupts are wired together.
*/
printf("Device %d routed to irq %d\n", device, ICU_INT_XINT(2));
return (ICU_INT_XINT(2));
case 4: /* MINI-PIC_INT */
printf("Device %d routed to irq %d\n", device, ICU_INT_XINT(3));
return( ICU_INT_XINT(3));
default:
no_mapping:
printf("No mapping for %d/%d/%d/%c\n", bus, device, func, pin);
}
return (0);
}
static int
ofw_pcib_pci_route_interrupt(device_t bridge, device_t dev, int intpin)
{
struct ofw_pcib_softc *sc;
struct ofw_bus_iinfo *ii;
struct ofw_pci_register reg;
cell_t pintr, mintr;
phandle_t iparent;
uint8_t maskbuf[sizeof(reg) + sizeof(pintr)];
sc = device_get_softc(bridge);
ii = &sc->ops_iinfo;
if (ii->opi_imapsz > 0) {
pintr = intpin;
/* Fabricate imap information if this isn't an OFW device */
bzero(®, sizeof(reg));
reg.phys_hi = (pci_get_bus(dev) << OFW_PCI_PHYS_HI_BUSSHIFT) |
(pci_get_slot(dev) << OFW_PCI_PHYS_HI_DEVICESHIFT) |
(pci_get_function(dev) << OFW_PCI_PHYS_HI_FUNCTIONSHIFT);
if (ofw_bus_lookup_imap(ofw_bus_get_node(dev), ii, ®,
sizeof(reg), &pintr, sizeof(pintr), &mintr, sizeof(mintr),
&iparent, maskbuf)) {
/*
* If we've found a mapping, return it and don't map
* it again on higher levels - that causes problems
* in some cases, and never seems to be required.
*/
return (ofw_bus_map_intr(dev, iparent, mintr));
}
} else if (intpin >= 1 && intpin <= 4) {
/*
* When an interrupt map is missing, we need to do the
* standard PCI swizzle and continue mapping at the parent.
*/
return (pcib_route_interrupt(bridge, dev, intpin));
}
return (PCIB_ROUTE_INTERRUPT(device_get_parent(device_get_parent(
bridge)), bridge, intpin));
}
static int
mptable_pci_route_interrupt(device_t pcib, device_t dev, int pin)
{
int line, bus, slot, irq;
bus = pci_get_bus(dev);
slot = pci_get_slot(dev);
irq = pci_get_irq(dev);
line = mptable_pci_int_route(bus, slot, pin, irq);
if (line >= 0)
goto done;
kprintf("MPTABLE: Unable to route for bus %d slot %d INT%c\n",
bus, slot, 'A' + pin - 1);
return PCI_INVALID_IRQ;
done:
BUS_CONFIG_INTR(dev, dev, line, INTR_TRIGGER_LEVEL, INTR_POLARITY_LOW);
return line;
}
static int
ppt_probe(device_t dev)
{
int bus, slot, func;
struct pci_devinfo *dinfo;
dinfo = (struct pci_devinfo *)device_get_ivars(dev);
bus = pci_get_bus(dev);
slot = pci_get_slot(dev);
func = pci_get_function(dev);
/*
* To qualify as a pci passthrough device a device must:
* - be allowed by administrator to be used in this role
* - be an endpoint device
*/
if (vmm_is_pptdev(bus, slot, func) &&
(dinfo->cfg.hdrtype & PCIM_HDRTYPE) == PCIM_HDRTYPE_NORMAL)
return (0);
else
return (ENXIO);
}
static void
ecc_e31200_status(struct ecc_e31200_softc *sc)
{
device_t dev = sc->ecc_device;
uint16_t errsts;
int bus, slot;
bus = pci_get_bus(dev);
slot = pci_get_slot(dev);
errsts = pcib_read_config(dev, bus, slot, 0, 0xc8, 2);
if (errsts & 0x2)
ecc_printf(sc, "Uncorrectable ECC error\n");
else if (errsts & 0x1)
ecc_printf(sc, "Correctable ECC error\n");
if (errsts & 0x3) {
if (sc->ecc_addr != NULL)
ecc_e31200_errlog(sc);
/* Clear pending errors */
pcib_write_config(dev, bus, slot, 0, 0xc8, errsts, 2);
}
}
