void
rl_pci_attach(struct device *parent, struct device *self, void *aux)
{
struct rl_pci_softc *psc = (void *)self;
struct rl_softc *sc = &psc->psc_softc;
struct pci_attach_args *pa = aux;
pci_chipset_tag_t pc = pa->pa_pc;
pci_intr_handle_t ih;
const char *intrstr = NULL;
/*
* Map control/status registers.
*/
#ifdef RL_USEIOSPACE
if (pci_mapreg_map(pa, RL_PCI_LOIO, PCI_MAPREG_TYPE_IO, 0,
&sc->rl_btag, &sc->rl_bhandle, NULL, &psc->psc_mapsize, 0)) {
printf(": can't map i/o space\n");
return;
}
#else
if (pci_mapreg_map(pa, RL_PCI_LOMEM, PCI_MAPREG_TYPE_MEM, 0,
&sc->rl_btag, &sc->rl_bhandle, NULL, &psc->psc_mapsize, 0)){
printf(": can't map mem space\n");
return;
}
#endif
/*
* Allocate our interrupt.
*/
if (pci_intr_map(pa, &ih)) {
printf(": couldn't map interrupt\n");
bus_space_unmap(sc->rl_btag, sc->rl_bhandle, psc->psc_mapsize);
return;
}
psc->psc_pc = pa->pa_pc;
intrstr = pci_intr_string(pc, ih);
sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, rl_intr, sc,
self->dv_xname);
if (sc->sc_ih == NULL) {
printf(": couldn't establish interrupt");
if (intrstr != NULL)
printf(" at %s", intrstr);
printf("\n");
bus_space_unmap(sc->rl_btag, sc->rl_bhandle, psc->psc_mapsize);
return;
}
printf(": %s", intrstr);
sc->sc_dmat = pa->pa_dmat;
if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_REALTEK_RT8129)
sc->rl_type = RL_8129;
else
sc->rl_type = RL_8139;
rl_attach(sc);
}
static void
mtd_pci_attach(device_t parent, device_t self, void *aux)
{
struct pci_attach_args * const pa = aux;
struct mtd_softc * const sc = device_private(self);
pci_intr_handle_t ih;
const char *intrstring = NULL;
bus_space_tag_t iot, memt;
bus_space_handle_t ioh, memh;
int io_valid, mem_valid;
sc->dev = self;
pci_aprint_devinfo(pa, NULL);
io_valid = (pci_mapreg_map(pa, PCI_IO_MAP_REG, PCI_MAPREG_TYPE_IO,
0, &iot, &ioh, NULL, NULL) == 0);
mem_valid = (pci_mapreg_map(pa, PCI_MEM_MAP_REG, PCI_MAPREG_TYPE_MEM
| PCI_MAPREG_MEM_TYPE_32BIT, 0, &memt, &memh,
NULL, NULL) == 0);
if (mem_valid) {
sc->bus_tag = memt;
sc->bus_handle = memh;
} else if (io_valid) {
sc->bus_tag = iot;
sc->bus_handle = ioh;
} else {
aprint_error_dev(sc->dev, "could not map memory or i/o space\n");
return;
}
sc->dma_tag = pa->pa_dmat;
/* Do generic attach. Seems this must be done before setting IRQ */
mtd_config(sc);
if (pci_intr_map(pa, &ih)) {
aprint_error_dev(sc->dev, "could not map interrupt\n");
return;
}
intrstring = pci_intr_string(pa->pa_pc, ih);
if (pci_intr_establish(pa->pa_pc, ih, IPL_NET, mtd_irq_h, sc) == NULL) {
aprint_error_dev(sc->dev, "could not establish interrupt");
if (intrstring != NULL)
aprint_error(" at %s", intrstring);
aprint_error("\n");
return;
} else {
aprint_normal_dev(sc->dev, "using %s for interrupt\n",
intrstring ? intrstring : "unknown interrupt");
}
}
void
ral_pci_attach(struct device *parent, struct device *self, void *aux)
{
struct ral_pci_softc *psc = (struct ral_pci_softc *)self;
struct rt2560_softc *sc = &psc->sc_sc;
struct pci_attach_args *pa = aux;
const char *intrstr;
pci_intr_handle_t ih;
pcireg_t memtype;
int error;
if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_RALINK) {
switch (PCI_PRODUCT(pa->pa_id)) {
case PCI_PRODUCT_RALINK_RT2560:
psc->sc_opns = &ral_rt2560_opns;
break;
case PCI_PRODUCT_RALINK_RT2561:
case PCI_PRODUCT_RALINK_RT2561S:
case PCI_PRODUCT_RALINK_RT2661:
psc->sc_opns = &ral_rt2661_opns;
break;
default:
psc->sc_opns = &ral_rt2860_opns;
break;
}
} else {
/* all other vendors are RT2860 only */
psc->sc_opns = &ral_rt2860_opns;
}
sc->sc_dmat = pa->pa_dmat;
psc->sc_pc = pa->pa_pc;
/* map control/status registers */
memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, RAL_PCI_BAR0);
error = pci_mapreg_map(pa, RAL_PCI_BAR0, memtype, 0, &sc->sc_st,
&sc->sc_sh, NULL, &psc->sc_mapsize, 0);
if (error != 0) {
printf(": can't map mem space\n");
return;
}
if (pci_intr_map(pa, &ih) != 0) {
printf(": can't map interrupt\n");
return;
}
intrstr = pci_intr_string(psc->sc_pc, ih);
psc->sc_ih = pci_intr_establish(psc->sc_pc, ih, IPL_NET,
psc->sc_opns->intr, sc, sc->sc_dev.dv_xname);
if (psc->sc_ih == NULL) {
printf(": can't establish interrupt");
if (intrstr != NULL)
printf(" at %s", intrstr);
printf("\n");
return;
}
printf(": %s", intrstr);
(*psc->sc_opns->attach)(sc, PCI_PRODUCT(pa->pa_id));
}
/*
* Check the slots looking for a board we recognise
* If we find one, note its address (slot) and call
* the actual probe routine to check it out.
*/
static int
bha_pci_match(device_t parent, cfdata_t match, void *aux)
{
struct pci_attach_args *pa = aux;
bus_space_tag_t iot;
bus_space_handle_t ioh;
bus_size_t iosize;
int rv;
if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_BUSLOGIC)
return (0);
if (PCI_PRODUCT(pa->pa_id) != PCI_PRODUCT_BUSLOGIC_MULTIMASTER_NC &&
PCI_PRODUCT(pa->pa_id) != PCI_PRODUCT_BUSLOGIC_MULTIMASTER)
return (0);
if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0, &iot, &ioh,
NULL, &iosize))
return (0);
rv = bha_find(iot, ioh);
bus_space_unmap(iot, ioh, iosize);
return (rv);
}
static int
ahci_pci_match(device_t parent, cfdata_t match, void *aux)
{
struct pci_attach_args *pa = aux;
bus_space_tag_t regt;
bus_space_handle_t regh;
bus_size_t size;
int ret = 0;
bool force;
force = ((ahci_pci_has_quirk( PCI_VENDOR(pa->pa_id),
PCI_PRODUCT(pa->pa_id)) & AHCI_PCI_QUIRK_FORCE) != 0);
/* if wrong class and not forced by quirks, don't match */
if ((PCI_CLASS(pa->pa_class) != PCI_CLASS_MASS_STORAGE ||
((PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_MASS_STORAGE_SATA ||
PCI_INTERFACE(pa->pa_class) != PCI_INTERFACE_SATA_AHCI) &&
PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_MASS_STORAGE_RAID)) &&
(force == false))
return 0;
if (pci_mapreg_map(pa, AHCI_PCI_ABAR,
PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0,
®t, ®h, NULL, &size) != 0)
return 0;
if ((PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_SATA &&
PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_SATA_AHCI) ||
(bus_space_read_4(regt, regh, AHCI_GHC) & AHCI_GHC_AE) ||
(force == true))
ret = 3;
bus_space_unmap(regt, regh, size);
return ret;
}
void
pwdog_attach(device_t parent, device_t self, void *aux)
{
struct pwdog_softc *sc = device_private(self);
struct pci_attach_args *const pa = (struct pci_attach_args *)aux;
pcireg_t memtype;
memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START);
if (pci_mapreg_map(pa, PCI_MAPREG_START, memtype, 0, &sc->sc_iot,
&sc->sc_ioh, NULL, &sc->sc_iosize)) {
aprint_error("\n");
aprint_error_dev(self, "PCI %s region not found\n",
memtype == PCI_MAPREG_TYPE_IO ? "I/O" : "memory");
return;
}
printf("\n");
sc->sc_dev = self;
pmf_device_register(self, pwdog_suspend, pwdog_resume);
bus_space_write_1(sc->sc_iot, sc->sc_ioh, PWDOG_DISABLE, 0);
sc->sc_smw.smw_name = device_xname(self);
sc->sc_smw.smw_cookie = sc;
sc->sc_smw.smw_setmode = pwdog_setmode;
sc->sc_smw.smw_tickle = pwdog_tickle;
sc->sc_smw.smw_period = PWDOG_MAX_PERIOD;
if (sysmon_wdog_register(&sc->sc_smw))
aprint_error_dev(self, "couldn't register with sysmon\n");
else
sc->sc_smw_valid = true;
}
/*
* map the BAR in question, returning the vga_pci_bar struct in case any more
* processing needs to be done. Returns NULL on failure. Can be called multiple
* times.
*/
struct vga_pci_bar*
vga_pci_bar_map(struct vga_pci_softc *dev, int addr, bus_size_t size,
int busflags)
{
struct vga_pci_bar *bar = NULL;
int i;
if (dev == NULL)
return (NULL);
for (i = 0; i < VGA_PCI_MAX_BARS; i++) {
if (dev->bars[i] && dev->bars[i]->addr == addr) {
bar = dev->bars[i];
break;
}
}
if (bar == NULL) {
printf("vga_pci_bar_map: given invalid address 0x%x\n", addr);
return (NULL);
}
if (bar->mapped == 0) {
if (pci_mapreg_map(&dev->pa, bar->addr, bar->maptype,
bar->flags | busflags, &bar->bst, &bar->bsh, NULL,
&bar->size, size)) {
printf("vga_pci_bar_map: can't map bar 0x%x\n", addr);
return (NULL);
}
}
bar->mapped++;
return (bar);
}
static void
mtd_pci_attach(struct device *parent, struct device *self, void *aux)
{
struct mtd_softc *sc = (void *)self;
struct pci_attach_args *pa = aux;
pci_intr_handle_t ih;
const char *intrstr = NULL;
bus_size_t iosize;
#ifndef MTD_USE_IO
if (pci_mapreg_map(pa, MTD_PCI_LOMEM, PCI_MAPREG_TYPE_MEM, 0,
&sc->bus_tag, &sc->bus_handle, NULL, &iosize, 0)) {
printf(": can't map mem space\n");
return;
}
#else /* MTD_USE_IO */
if (pci_mapreg_map(pa, MTD_PCI_LOIO, PCI_MAPREG_TYPE_IO, 0,
&sc->bus_tag, &sc->bus_handle, NULL, &iosize, 0)) {
printf(": can't map io space\n");
return;
}
#endif /* MTD_USE_IO */
/*
* Allocate our interrupt.
*/
if (pci_intr_map(pa, &ih)) {
printf(": couldn't map interrupt\n");
bus_space_unmap(sc->bus_tag, sc->bus_handle, iosize);
return;
}
intrstr = pci_intr_string(pa->pa_pc, ih);
if (pci_intr_establish(pa->pa_pc, ih, IPL_NET, mtd_irq_h, sc,
self->dv_xname) == NULL) {
printf(": couldn't establish interrupt");
if (intrstr != NULL)
printf(" at %s", intrstr);
printf("\n");
bus_space_unmap(sc->bus_tag, sc->bus_handle, iosize);
return;
}
printf(": %s", intrstr);
sc->dma_tag = pa->pa_dmat;
mtd_config(sc);
}
void
amdiic_attach(struct device *parent, struct device *self, void *aux)
{
struct amdiic_softc *sc = (struct amdiic_softc *)self;
struct pci_attach_args *pa = aux;
struct i2cbus_attach_args iba;
pcireg_t conf;
bus_size_t iosize;
pci_intr_handle_t ih;
const char *intrstr = NULL;
/* Map I/O space */
if (pci_mapreg_map(pa, AMD8111_SMB_BASE, PCI_MAPREG_TYPE_IO, 0,
&sc->sc_iot, &sc->sc_ioh, NULL, &iosize, 0)) {
printf(": can't map i/o space\n");
return;
}
/* Read configuration */
conf = pci_conf_read(pa->pa_pc, pa->pa_tag, AMD8111_SMB_MISC);
DPRINTF((": conf 0x%08x", conf));
sc->sc_poll = 1;
if (conf & AMD8111_SMB_MISC_SCIEN) {
/* No PCI IRQ */
printf(": SCI");
} else if (conf & AMD8111_SMB_MISC_INTEN) {
/* Install interrupt handler */
if (pci_intr_map(pa, &ih) == 0) {
intrstr = pci_intr_string(pa->pa_pc, ih);
sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO,
amdiic_intr, sc, sc->sc_dev.dv_xname);
if (sc->sc_ih != NULL) {
printf(": %s", intrstr);
sc->sc_poll = 0;
}
}
if (sc->sc_poll)
printf(": polling");
}
printf("\n");
/* Attach I2C bus */
rw_init(&sc->sc_i2c_lock, "iiclk");
sc->sc_i2c_tag.ic_cookie = sc;
sc->sc_i2c_tag.ic_acquire_bus = amdiic_i2c_acquire_bus;
sc->sc_i2c_tag.ic_release_bus = amdiic_i2c_release_bus;
sc->sc_i2c_tag.ic_exec = amdiic_i2c_exec;
bzero(&iba, sizeof(iba));
iba.iba_name = "iic";
iba.iba_tag = &sc->sc_i2c_tag;
config_found(self, &iba, iicbus_print);
return;
}
void
ral_pci_attach(device_t parent, device_t self, void *aux)
{
struct ral_pci_softc *psc = device_private(self);
struct rt2560_softc *sc = &psc->sc_sc;
const struct pci_attach_args *pa = aux;
const char *intrstr;
bus_addr_t base;
pci_intr_handle_t ih;
pcireg_t reg;
int error;
pci_aprint_devinfo(pa, NULL);
psc->sc_opns = (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_RALINK_RT2560) ?
&ral_rt2560_opns : &ral_rt2661_opns;
sc->sc_dev = self;
sc->sc_dmat = pa->pa_dmat;
psc->sc_pc = pa->pa_pc;
/* enable the appropriate bits in the PCI CSR */
reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
reg |= PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_MEM_ENABLE;
pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, reg);
/* map control/status registers */
error = pci_mapreg_map(pa, RAL_PCI_BAR0, PCI_MAPREG_TYPE_MEM |
PCI_MAPREG_MEM_TYPE_32BIT, 0, &sc->sc_st, &sc->sc_sh, &base,
&psc->sc_mapsize);
if (error != 0) {
aprint_error(": could not map memory space\n");
return;
}
if (pci_intr_map(pa, &ih) != 0) {
aprint_error(": could not map interrupt\n");
return;
}
intrstr = pci_intr_string(psc->sc_pc, ih);
psc->sc_ih = pci_intr_establish(psc->sc_pc, ih, IPL_NET,
psc->sc_opns->intr, sc);
if (psc->sc_ih == NULL) {
aprint_error(": could not establish interrupt");
if (intrstr != NULL)
aprint_error(" at %s", intrstr);
aprint_error("\n");
return;
}
aprint_normal_dev(sc->sc_dev, "interrupting at %s\n", intrstr);
(*psc->sc_opns->attach)(sc, PCI_PRODUCT(pa->pa_id));
}
void
mfi_pci_attach(struct device *parent, struct device *self, void *aux)
{
struct mfi_softc *sc = (struct mfi_softc *)self;
struct pci_attach_args *pa = aux;
const struct mfi_pci_device *mpd;
pci_intr_handle_t ih;
bus_size_t size;
pcireg_t reg;
int regbar;
mpd = mfi_pci_find_device(pa);
if (mpd == NULL) {
printf(": can't find matching pci device\n");
return;
}
if (mpd->mpd_iop == MFI_IOP_GEN2 || mpd->mpd_iop == MFI_IOP_SKINNY)
regbar = MFI_BAR_GEN2;
else
regbar = MFI_BAR;
reg = pci_mapreg_type(pa->pa_pc, pa->pa_tag, regbar);
if (pci_mapreg_map(pa, regbar, reg, 0,
&sc->sc_iot, &sc->sc_ioh, NULL, &size, MFI_PCI_MEMSIZE)) {
printf(": can't map controller pci space\n");
return;
}
sc->sc_dmat = pa->pa_dmat;
if (pci_intr_map(pa, &ih) != 0) {
printf(": can't map interrupt\n");
goto unmap;
}
printf(": %s\n", pci_intr_string(pa->pa_pc, ih));
sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO, mfi_intr, sc,
sc->sc_dev.dv_xname);
if (!sc->sc_ih) {
printf("%s: can't establish interrupt\n", DEVNAME(sc));
goto unmap;
}
if (mfi_attach(sc, mpd->mpd_iop)) {
printf("%s: can't attach\n", DEVNAME(sc));
goto unintr;
}
return;
unintr:
pci_intr_disestablish(pa->pa_pc, sc->sc_ih);
sc->sc_ih = NULL;
unmap:
bus_space_unmap(sc->sc_iot, sc->sc_ioh, size);
}
void
pgt_pci_attach(struct device *parent, struct device *self, void *aux)
{
struct pgt_pci_softc *psc = (struct pgt_pci_softc *)self;
struct pgt_softc *sc = &psc->sc_pgt;
struct pci_attach_args *pa = aux;
const char *intrstr = NULL;
pci_intr_handle_t ih;
int error;
sc->sc_dmat = pa->pa_dmat;
psc->sc_pc = pa->pa_pc;
/* remember chipset */
if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTERSIL_ISL3877)
sc->sc_flags |= SC_ISL3877;
/* map control / status registers */
error = pci_mapreg_map(pa, PGT_PCI_BAR0,
PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0,
&sc->sc_iotag, &sc->sc_iohandle, NULL, &psc->sc_mapsize, 0);
if (error != 0) {
printf(": can't map mem space\n");
return;
}
/* map interrupt */
if (pci_intr_map(pa, &ih) != 0) {
printf(": can't map interrupt\n");
return;
}
/* disable all interrupts */
bus_space_write_4(sc->sc_iotag, sc->sc_iohandle, PGT_REG_INT_EN, 0);
(void)bus_space_read_4(sc->sc_iotag, sc->sc_iohandle, PGT_REG_INT_EN);
DELAY(PGT_WRITEIO_DELAY);
/* establish interrupt */
intrstr = pci_intr_string(psc->sc_pc, ih);
psc->sc_ih = pci_intr_establish(psc->sc_pc, ih, IPL_NET, pgt_intr, sc,
sc->sc_dev.dv_xname);
if (psc->sc_ih == NULL) {
printf(": can't establish interrupt");
if (intrstr != NULL)
printf(" at %s", intrstr);
printf("\n");
return;
}
printf(": %s\n", intrstr);
if (rootvp == NULL)
mountroothook_establish(pgt_attach, sc);
else
pgt_attach(sc);
}
void
mfi_pci_attach(struct device *parent, struct device *self, void *aux)
{
struct mfi_softc *sc = (struct mfi_softc *)self;
struct pci_attach_args *pa = aux;
const char *intrstr;
pci_intr_handle_t ih;
bus_size_t size;
pcireg_t csr;
uint32_t subsysid, i;
subsysid = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
for (i = 0; mfi_pci_devices[i].mpd_vendor; i++)
if (mfi_pci_devices[i].mpd_subvendor == PCI_VENDOR(subsysid) &&
mfi_pci_devices[i].mpd_subproduct == PCI_PRODUCT(subsysid)){
printf(", %s", mfi_pci_devices[i].mpd_model);
break;
}
csr = pci_mapreg_type(pa->pa_pc, pa->pa_tag, MFI_BAR);
csr |= PCI_MAPREG_MEM_TYPE_32BIT;
if (pci_mapreg_map(pa, MFI_BAR, csr, 0,
&sc->sc_iot, &sc->sc_ioh, NULL, &size, MFI_PCI_MEMSIZE)) {
printf(": can't map controller pci space\n");
return;
}
sc->sc_dmat = pa->pa_dmat;
if (pci_intr_map(pa, &ih)) {
printf(": can't map interrupt\n");
bus_space_unmap(sc->sc_iot, sc->sc_ioh, size);
return;
}
intrstr = pci_intr_string(pa->pa_pc, ih);
sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_BIO, mfi_intr, sc,
sc->sc_dev.dv_xname);
if (!sc->sc_ih) {
printf(": can't establish interrupt");
if (intrstr)
printf(" at %s", intrstr);
printf("\n");
bus_space_unmap(sc->sc_iot, sc->sc_ioh, size);
return;
}
printf(": %s\n", intrstr);
if (mfi_attach(sc)) {
printf("%s: can't attach", DEVNAME(sc));
pci_intr_disestablish(pa->pa_pc, sc->sc_ih);
sc->sc_ih = NULL;
bus_space_unmap(sc->sc_iot, sc->sc_ioh, size);
}
}
void
rtsx_pci_attach(struct device *parent, struct device *self, void *aux)
{
struct rtsx_pci_softc *sc = (struct rtsx_pci_softc *)self;
struct pci_attach_args *pa = aux;
pci_intr_handle_t ih;
char const *intrstr;
bus_space_tag_t iot;
bus_space_handle_t ioh;
bus_size_t size;
int flags;
if ((pci_conf_read(pa->pa_pc, pa->pa_tag, RTSX_CFG_PCI)
& RTSX_CFG_ASIC) != 0) {
printf("%s: no asic\n", sc->sc.sc_dev.dv_xname);
return;
}
if (pci_intr_map_msi(pa, &ih) && pci_intr_map(pa, &ih)) {
printf(": can't map interrupt\n");
return;
}
intrstr = pci_intr_string(pa->pa_pc, ih);
sc->sc_ih = pci_intr_establish(pa->pa_pc, ih, IPL_SDMMC,
rtsx_intr, sc, sc->sc.sc_dev.dv_xname);
if (sc->sc_ih == NULL) {
printf(": can't establish interrupt\n");
return;
}
printf(": %s\n", intrstr);
if (pci_mem_find(pa->pa_pc, pa->pa_tag, RTSX_PCI_BAR,
NULL, NULL, NULL) != 0) {
printf("%s: can't find registers\n", sc->sc.sc_dev.dv_xname);
return;
}
if (pci_mapreg_map(pa, RTSX_PCI_BAR, PCI_MAPREG_TYPE_MEM, 0,
&iot, &ioh, NULL, &size, 0)) {
printf("%s: can't map registers\n", sc->sc.sc_dev.dv_xname);
return;
}
pci_set_powerstate(pa->pa_pc, pa->pa_tag, PCI_PMCSR_STATE_D0);
if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_REALTEK_RTS5209)
flags = RTSX_F_5209;
else
flags = RTSX_F_5229;
if (rtsx_attach(&sc->sc, iot, ioh, size, pa->pa_dmat, flags) != 0)
printf("%s: can't initialize chip\n", sc->sc.sc_dev.dv_xname);
}
void
bwi_pci_attach(struct device *parent, struct device *self, void *aux)
{
struct bwi_pci_softc *psc = (struct bwi_pci_softc *)self;
struct pci_attach_args *pa = aux;
struct bwi_softc *sc = &psc->psc_bwi;
const char *intrstr = NULL;
pci_intr_handle_t ih;
pcireg_t memtype, reg;
sc->sc_dmat = pa->pa_dmat;
psc->psc_pc = pa->pa_pc;
psc->psc_pcitag = pa->pa_tag;
/* map control / status registers */
memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, BWI_PCI_BAR0);
if (pci_mapreg_map(pa, BWI_PCI_BAR0, memtype, 0, &sc->sc_mem_bt,
&sc->sc_mem_bh, NULL, &psc->psc_mapsize, 0)) {
printf(": can't map mem space\n");
return;
}
/* map interrupt */
if (pci_intr_map(pa, &ih) != 0) {
printf(": can't map interrupt\n");
return;
}
/* establish interrupt */
intrstr = pci_intr_string(psc->psc_pc, ih);
psc->psc_ih = pci_intr_establish(psc->psc_pc, ih, IPL_NET, bwi_intr, sc,
sc->sc_dev.dv_xname);
if (psc->psc_ih == NULL) {
printf(": can't establish interrupt");
if (intrstr != NULL)
printf(" at %s", intrstr);
printf("\n");
return;
}
printf(": %s", intrstr);
/* we need to access PCI config space from the driver */
sc->sc_conf_write = bwi_pci_conf_write;
sc->sc_conf_read = bwi_pci_conf_read;
reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_SUBSYS_ID_REG);
sc->sc_pci_revid = PCI_REVISION(pa->pa_class);
sc->sc_pci_did = PCI_PRODUCT(pa->pa_id);
sc->sc_pci_subvid = PCI_VENDOR(reg);
sc->sc_pci_subdid = PCI_PRODUCT(reg);
bwi_attach(sc);
}
int
ne_pci_ipkdb_attach(struct ipkdb_if *kip, bus_space_tag_t iot,
pci_chipset_tag_t pc, int bus, int dev)
{
struct pci_attach_args pa;
bus_space_tag_t nict, asict;
bus_space_handle_t nich, asich;
u_int32_t csr;
pa.pa_iot = iot;
pa.pa_pc = pc;
pa.pa_device = dev;
pa.pa_function = 0;
pa.pa_flags = PCI_FLAGS_IO_OKAY;
pa.pa_tag = pci_make_tag(pc, bus, dev, /*func*/0);
pa.pa_id = pci_conf_read(pc, pa.pa_tag, PCI_ID_REG);
pa.pa_class = pci_conf_read(pc, pa.pa_tag, PCI_CLASS_REG);
if (ne_pci_lookup(&pa) == NULL)
return -1;
if (pci_mapreg_map(&pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0,
&nict, &nich, NULL, NULL))
return -1;
asict = nict;
if (bus_space_subregion(nict, nich, NE2000_ASIC_OFFSET,
NE2000_ASIC_NPORTS, &asich)) {
bus_space_unmap(nict, nich, NE2000_NPORTS);
return -1;
}
/* Enable card */
csr = pci_conf_read(pc, pa.pa_tag, PCI_COMMAND_STATUS_REG);
pci_conf_write(pc, pa.pa_tag, PCI_COMMAND_STATUS_REG,
csr | PCI_COMMAND_MASTER_ENABLE);
ipkdb_softc.sc_ne2000.sc_dp8390.sc_regt = nict;
ipkdb_softc.sc_ne2000.sc_dp8390.sc_regh = nich;
ipkdb_softc.sc_ne2000.sc_asict = asict;
ipkdb_softc.sc_ne2000.sc_asich = asich;
kip->port = &ipkdb_softc;
ipkdb_pc = pc;
ipkdb_tag = pa.pa_tag;
ne_kip = kip;
if (ne2000_ipkdb_attach(kip) < 0) {
bus_space_unmap(nict, nich, NE2000_NPORTS);
return -1;
}
return 0;
}
static void
nca_pci_attach(device_t parent, device_t self, void *aux)
{
struct ncr5380_softc *sc = device_private(self);
struct pci_attach_args *pa = aux;
sc->sc_dev = self;
pci_aprint_devinfo(pa, "SCSI controller");
if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_IO, 0,
&sc->sc_regt, &sc->sc_regh, NULL, NULL)) {
aprint_error_dev(self, "could not map IO space\n");
return;
}
/* The Domex 536 seems to be driven by polling,
* don't bother mapping an interrupt handler.
*/
sc->sc_rev = NCR_VARIANT_CXD1180;
sc->sci_r0 = 0;
sc->sci_r1 = 1;
sc->sci_r2 = 2;
sc->sci_r3 = 3;
sc->sci_r4 = 4;
sc->sci_r5 = 5;
sc->sci_r6 = 6;
sc->sci_r7 = 7;
sc->sc_pio_out = ncr5380_pio_out;
sc->sc_pio_in = ncr5380_pio_in;
sc->sc_dma_alloc = NULL;
sc->sc_dma_free = NULL;
sc->sc_dma_setup = NULL;
sc->sc_dma_start = NULL;
sc->sc_dma_poll = NULL;
sc->sc_dma_eop = NULL;
sc->sc_dma_stop = NULL;
sc->sc_intr_on = NULL;
sc->sc_intr_off = NULL;
sc->sc_flags |= NCR5380_FORCE_POLLING;
sc->sc_min_dma_len = 0;
sc->sc_adapter.adapt_request = ncr5380_scsipi_request;
sc->sc_adapter.adapt_minphys = minphys;
sc->sc_channel.chan_id = 7;
ncr5380_attach(sc);
}
static void
ahci_pci_attach(device_t parent, device_t self, void *aux)
{
struct pci_attach_args *pa = aux;
struct ahci_pci_softc *psc = device_private(self);
struct ahci_softc *sc = &psc->ah_sc;
bus_size_t size;
char devinfo[256];
const char *intrstr;
pci_intr_handle_t intrhandle;
void *ih;
sc->sc_atac.atac_dev = self;
if (pci_mapreg_map(pa, AHCI_PCI_ABAR,
PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0,
&sc->sc_ahcit, &sc->sc_ahcih, NULL, &size) != 0) {
aprint_error_dev(self, "can't map ahci registers\n");
return;
}
psc->sc_pc = pa->pa_pc;
psc->sc_pcitag = pa->pa_tag;
pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
aprint_naive(": AHCI disk controller\n");
aprint_normal(": %s\n", devinfo);
if (pci_intr_map(pa, &intrhandle) != 0) {
aprint_error("%s: couldn't map interrupt\n", AHCINAME(sc));
return;
}
intrstr = pci_intr_string(pa->pa_pc, intrhandle);
ih = pci_intr_establish(pa->pa_pc, intrhandle, IPL_BIO, ahci_intr, sc);
if (ih == NULL) {
aprint_error("%s: couldn't establish interrupt", AHCINAME(sc));
return;
}
aprint_normal("%s: interrupting at %s\n", AHCINAME(sc),
intrstr ? intrstr : "unknown interrupt");
sc->sc_dmat = pa->pa_dmat;
if (PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_RAID) {
AHCIDEBUG_PRINT(("%s: RAID mode\n", AHCINAME(sc)), DEBUG_PROBE);
sc->sc_atac_capflags = ATAC_CAP_RAID;
} else {
AHCIDEBUG_PRINT(("%s: SATA mode\n", AHCINAME(sc)), DEBUG_PROBE);
}
ahci_attach(sc);
if (!pmf_device_register(self, NULL, ahci_pci_resume))
aprint_error_dev(self, "couldn't establish power handler\n");
}
void
wdt_attach(struct device *parent, struct device *self, void *aux)
{
struct wdt_softc *wdt = (struct wdt_softc *)self;
struct pci_attach_args *const pa = (struct pci_attach_args *)aux;
bus_size_t iosize;
/* retrieve the I/O region (BAR2) */
if (pci_mapreg_map(pa, 0x18, PCI_MAPREG_TYPE_IO, 0,
&wdt->sc_iot, &wdt->sc_ioh, NULL, &iosize, 0) != 0) {
printf("%s: couldn't find PCI I/O region\n",
wdt->sc_dev.dv_xname);
return;
}
/* sanity check I/O size */
if (iosize != (bus_size_t)16) {
printf("%s: invalid I/O region size\n",
wdt->sc_dev.dv_xname);
return;
}
/* initialize the watchdog timer structure */
/* check the feature set available */
if (wdt_is501(wdt))
wdt->sc_features = 1;
else
wdt->sc_features = 0;
if (wdt->sc_features) {
/*
* turn off the buzzer, it may have been activated
* by a previous timeout
*/
wdt_buzzer_off(wdt);
wdt_buzzer_enable(wdt);
}
/* initialize the timer modes and the lower 16-bit counter */
wdt_init_timer(wdt);
/*
* ensure that the watchdog is disabled
*/
wdt_timer_disable(wdt);
/*
* register with the watchdog framework
*/
wdog_register(wdt_set_timeout, wdt);
}
void
nep_attach(struct device *parent, struct device *self, void *aux)
{
struct nep_softc *sc = (struct nep_softc *)self;
struct pci_attach_args *pa = aux;
struct ifnet *ifp = &sc->sc_ac.ac_if;
struct mii_data *mii = &sc->sc_mii;
pcireg_t memtype;
uint64_t cfg;
sc->sc_dmat = pa->pa_dmat;
memtype = PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_64BIT;
if (pci_mapreg_map(pa, PCI_MAPREG_START, memtype, 0,
&sc->sc_memt, &sc->sc_memh, NULL, &sc->sc_mems, 0)) {
printf(": can't map registers\n");
return;
}
sc->sc_port = pa->pa_function;
#ifdef __sparc64__
if (OF_getprop(PCITAG_NODE(pa->pa_tag), "local-mac-address",
sc->sc_ac.ac_enaddr, ETHER_ADDR_LEN) <= 0)
myetheraddr(sc->sc_ac.ac_enaddr);
#endif
printf(", address %s\n", ether_sprintf(sc->sc_ac.ac_enaddr));
cfg = nep_read(sc, MIF_CONFIG);
cfg &= ~MIF_CONFIG_INDIRECT_MODE;
nep_write(sc, MIF_CONFIG, cfg);
strlcpy(ifp->if_xname, sc->sc_dev.dv_xname, sizeof(ifp->if_xname));
ifp->if_softc = sc;
ifp->if_ioctl = nep_ioctl;
mii->mii_ifp = ifp;
mii->mii_readreg = nep_mii_readreg;
mii->mii_writereg = nep_mii_writereg;
mii->mii_statchg = nep_mii_statchg;
ifmedia_init(&mii->mii_media, 0, nep_mediachange, nep_mediastatus);
mii_attach(&sc->sc_dev, mii, 0xffffffff, MII_PHY_ANY, sc->sc_port, 0);
ifmedia_set(&mii->mii_media, IFM_ETHER|IFM_AUTO);
if_attach(ifp);
ether_ifattach(ifp);
timeout_set(&sc->sc_tick_ch, nep_tick, sc);
}
int
ahci_map_regs(struct ahci_pci_softc *psc, struct pci_attach_args *pa)
{
pcireg_t maptype;
struct ahci_softc *sc = &psc->psc_ahci;
maptype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, AHCI_PCI_BAR);
if (pci_mapreg_map(pa, AHCI_PCI_BAR, maptype, 0, &sc->sc_iot,
&sc->sc_ioh, NULL, &sc->sc_ios, 0) != 0) {
printf(" unable to map registers\n");
return (1);
}
return (0);
}
static void
via_vt6421_mapreg_dma(struct pciide_softc *sc, const struct pci_attach_args *pa)
{
struct pciide_channel *pc;
int chan, reg;
bus_size_t size;
sc->sc_dma_ok = (pci_mapreg_map(pa, PCIIDE_REG_BUS_MASTER_DMA,
PCI_MAPREG_TYPE_IO, 0, &sc->sc_dma_iot, &sc->sc_dma_ioh,
NULL, &sc->sc_dma_ios) == 0);
sc->sc_dmat = pa->pa_dmat;
if (sc->sc_dma_ok == 0) {
aprint_verbose(", but unused (couldn't map registers)");
} else {
sc->sc_wdcdev.dma_arg = sc;
sc->sc_wdcdev.dma_init = pciide_dma_init;
sc->sc_wdcdev.dma_start = pciide_dma_start;
sc->sc_wdcdev.dma_finish = pciide_dma_finish;
}
if (device_cfdata(sc->sc_wdcdev.sc_atac.atac_dev)->cf_flags &
PCIIDE_OPTIONS_NODMA) {
aprint_verbose(
", but unused (forced off by config file)");
sc->sc_dma_ok = 0;
}
if (sc->sc_dma_ok == 0)
return;
for (chan = 0; chan < 4; chan++) {
pc = &sc->pciide_channels[chan];
for (reg = 0; reg < IDEDMA_NREGS; reg++) {
size = 4;
if (size > (IDEDMA_SCH_OFFSET - reg))
size = IDEDMA_SCH_OFFSET - reg;
if (bus_space_subregion(sc->sc_dma_iot, sc->sc_dma_ioh,
IDEDMA_SCH_OFFSET * chan + reg, size,
&pc->dma_iohs[reg]) != 0) {
sc->sc_dma_ok = 0;
aprint_verbose(", but can't subregion offset "
"%d size %lu",
reg, (u_long)size);
return;
}
}
}
}
void
smfb_pci_attach(struct device *parent, struct device *self, void *aux)
{
struct smfb_softc *sc = (struct smfb_softc *)self;
struct pci_attach_args *pa = (struct pci_attach_args *)aux;
bus_space_tag_t memt;
bus_space_handle_t memh;
if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_MEM,
BUS_SPACE_MAP_LINEAR, &memt, &memh, NULL, NULL, 0) != 0) {
printf(": can't map frame buffer\n");
return;
}
smfb_attach_common(sc, 0, memt, memh, memt, memh);
}
static int
mapreg_map(lua_State *L)
{
int res;
bus_size_t size;
res = pci_mapreg_map(lua_touserdata(L, -6),
PCI_MAPREG_START + lua_tointeger(L, -5),
lua_tointeger(L, -4), lua_tointeger(L, -3),
lua_touserdata(L, -2), lua_touserdata(L, -1),
NULL, &size);
lua_pop(L, 6);
lua_pushinteger(L, res);
lua_pushinteger(L, size);
return 2;
}
void
smfb_attach(struct device *parent, struct device *self, void *aux)
{
struct smfb_softc *sc = (struct smfb_softc *)self;
struct pci_attach_args *pa = (struct pci_attach_args *)aux;
struct wsemuldisplaydev_attach_args waa;
vaddr_t fbbase;
int console;
if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_MEM,
BUS_SPACE_MAP_LINEAR, &sc->sc_memt, &sc->sc_memh,
NULL, NULL, 0) != 0) {
printf(": can't map frame buffer\n");
return;
}
console = smfbcn.ri.ri_hw != NULL;
if (console) {
sc->sc_fb = &smfbcn;
sc->sc_fb->sc = sc;
} else {
sc->sc_fb = &sc->sc_fb_store;
fbbase = (vaddr_t)bus_space_vaddr(sc->sc_memt, sc->sc_memh);
if (smfb_setup(sc->sc_fb, fbbase) != 0) {
printf(": can't setup frame buffer\n");
return;
}
}
printf("\n");
sc->sc_scrlist[0] = &sc->sc_fb->wsd;
sc->sc_wsl.nscreens = 1;
sc->sc_wsl.screens = (const struct wsscreen_descr **)sc->sc_scrlist;
waa.console = console;
waa.scrdata = &sc->sc_wsl;
waa.accessops = &smfb_accessops;
waa.accesscookie = sc;
waa.defaultscreens = 0;
config_found((struct device *)sc, &waa, wsemuldisplaydevprint);
}
void
an_pci_attach(struct device *parent, struct device *self, void *aux)
{
struct an_softc *sc = (struct an_softc *)self;
struct pci_attach_args *pa = aux;
pci_intr_handle_t ih;
bus_space_handle_t ioh;
bus_space_tag_t iot = pa->pa_iot;
pci_chipset_tag_t pc = pa->pa_pc;
const char *intrstr;
/* Map the I/O ports. */
if (pci_mapreg_map(pa, AN_PCI_LOIO, PCI_MAPREG_TYPE_IO, 0,
&iot, &ioh, NULL, NULL, 0) != 0) {
printf(": can't map i/o space\n");
return;
}
sc->sc_iot = iot;
sc->sc_ioh = ioh;
/* Map and establish the interrupt. */
if (pci_intr_map(pa, &ih)) {
printf("\n%s: couldn't map interrupt\n", sc->sc_dev.dv_xname);
return;
}
intrstr = pci_intr_string(pc, ih);
sc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, an_intr, sc,
sc->sc_dev.dv_xname);
if (sc->sc_ih == NULL) {
printf("\n%s: couldn't establish interrupt",
sc->sc_dev.dv_xname);
if (intrstr != NULL)
printf(" at %s", intrstr);
printf("\n");
return;
}
printf(": %s", intrstr);
sc->sc_enabled = 1;
an_attach(sc);
}
void
pwdog_attach(struct device *parent, struct device *self, void *aux)
{
struct pwdog_softc *pwdog = (struct pwdog_softc *)self;
struct pci_attach_args *const pa = (struct pci_attach_args *)aux;
pcireg_t memtype;
bus_size_t iosize;
memtype = pci_mapreg_type(pa->pa_pc, pa->pa_tag, PCI_MAPREG_START);
if (pci_mapreg_map(pa, PCI_MAPREG_START, memtype, 0, &pwdog->iot,
&pwdog->ioh, NULL, &iosize, 0)) {
printf("\n%s: PCI %s region not found\n",
pwdog->pwdog_dev.dv_xname,
memtype == PCI_MAPREG_TYPE_IO ? "I/O" : "memory");
return;
}
printf("\n");
bus_space_write_1(pwdog->iot, pwdog->ioh, PWDOG_DISABLE, 0);
wdog_register(pwdog_set_timeout, pwdog);
}
static void
gtp_attach(device_t parent, device_t self, void *aux)
{
struct gtp_softc *sc = device_private(self);
struct pci_attach_args *pa = aux;
cfdata_t cf = device_cfdata(self);
pci_chipset_tag_t pc = pa->pa_pc;
bus_size_t iosize;
pcireg_t csr;
pci_aprint_devinfo(pa, "Radio controller");
/* Map I/O registers */
if (pci_mapreg_map(pa, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0, &sc->tea.iot,
&sc->tea.ioh, NULL, &iosize)) {
aprint_error(": can't map i/o space\n");
return;
}
/* Enable the card */
csr = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
csr | PCI_COMMAND_MASTER_ENABLE);
sc->vol = 0;
sc->mute = 0;
sc->freq = MIN_FM_FREQ;
sc->stereo = TEA5757_STEREO;
sc->lock = TEA5757_S030;
sc->tea.offset = 0;
sc->tea.flags = cf->cf_flags;
sc->tea.init = gtp_init;
sc->tea.rset = gtp_rset;
sc->tea.write_bit = gtp_write_bit;
sc->tea.read = gtp_hardware_read;
aprint_normal(": Gemtek PR103\n");
radio_attach_mi(>p_hw_if, sc, self);
}
static void
joy_pci_attach(device_t parent, device_t self, void *aux)
{
struct joy_softc *sc = device_private(self);
struct pci_attach_args *pa = aux;
char devinfo[256];
bus_size_t mapsize;
int reg;
pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
aprint_normal(": %s (rev 0x%02x)\n", devinfo, PCI_REVISION(pa->pa_class));
for (reg = PCI_MAPREG_START; reg < PCI_MAPREG_END;
reg += sizeof(pcireg_t))
if (bar_is_io(pa->pa_pc, pa->pa_tag, reg))
break;
if (reg >= PCI_MAPREG_END) {
aprint_error_dev(self,
"violates PCI spec, no IO region found\n");
return;
}
if (pci_mapreg_map(pa, reg, PCI_MAPREG_TYPE_IO, 0,
&sc->sc_iot, &sc->sc_ioh, NULL, &mapsize)) {
aprint_error_dev(self, "could not map IO space\n");
return;
}
if (mapsize != 2) {
if (!bus_space_subregion(sc->sc_iot, sc->sc_ioh, 1, 1, &sc->sc_ioh) < 0) {
aprint_error_dev(self, "error mapping subregion\n");
return;
}
}
sc->sc_dev = self;
joyattach(sc);
}
void
berkwdt_attach(struct device *parent, struct device *self, void *aux)
{
struct berkwdt_softc *sc = (struct berkwdt_softc *)self;
struct pci_attach_args *const pa = (struct pci_attach_args *)aux;
bus_size_t iosize;
u_int8_t reg;
/* retrieve the I/O region (BAR 0) */
if (pci_mapreg_map(pa, 0x10, PCI_MAPREG_TYPE_IO, 0,
&sc->sc_iot, &sc->sc_ioh, NULL, &iosize, 0) != 0) {
printf(": couldn't find PCI I/O region\n");
return;
}
/* Check for reboot by the card */
reg = bus_space_read_1(sc->sc_iot, sc->sc_ioh, PCWD_PCI_CS1);
if (reg & WD_PCI_WTRP) {
printf(", warning: watchdog triggered");
if (reg & WD_PCI_TTRP)
printf(", overheat detected");
/* clear trip status & LED and keep mode of relay 2 */
reg &= WD_PCI_R2DS;
reg |= WD_PCI_WTRP;
bus_space_write_1(sc->sc_iot, sc->sc_ioh, PCWD_PCI_CS1, reg);
}
printf("\n");
/* ensure that the watchdog is disabled */
berkwdt_stop(sc);
sc->sc_period = 0;
/* register with the watchdog framework */
wdog_register(berkwdt_set_timeout, sc);
}
