static void
artsata_attach(struct device *parent, struct device *self, void *aux)
{
struct pci_attach_args *pa = aux;
struct pciide_softc *sc = (struct pciide_softc *)self;
pciide_common_attach(sc, pa,
pciide_lookup_product(pa->pa_id, pciide_artsata_products));
}
static void
gcscide_attach(device_t parent, device_t self, void *aux)
{
struct pci_attach_args *pa = aux;
struct pciide_softc *sc = device_private(self);
sc->sc_wdcdev.sc_atac.atac_dev = self;
pciide_common_attach(sc, pa,
pciide_lookup_product(pa->pa_id, pciide_gcscide_products));
}
static void
viaide_attach(struct device *parent, struct device *self, void *aux)
{
struct pci_attach_args *pa = aux;
struct pciide_softc *sc = (struct pciide_softc *)self;
const struct pciide_product_desc *pp;
pp = viaide_lookup(pa->pa_id);
if (pp == NULL)
panic("viaide_attach");
pciide_common_attach(sc, pa, pp);
}
static void
piixide_attach(device_t parent, device_t self, void *aux)
{
struct pci_attach_args *pa = aux;
struct pciide_softc *sc = device_private(self);
sc->sc_wdcdev.sc_atac.atac_dev = self;
pciide_common_attach(sc, pa,
pciide_lookup_product(pa->pa_id, pciide_intel_products));
if (!pmf_device_register(self, piixide_suspend, piixide_resume))
aprint_error_dev(self, "couldn't establish power handler\n");
}
static void
viaide_attach(device_t parent, device_t self, void *aux)
{
const struct pci_attach_args *pa = aux;
struct pciide_softc *sc = device_private(self);
const struct pciide_product_desc *pp;
sc->sc_wdcdev.sc_atac.atac_dev = self;
pp = viaide_lookup(pa->pa_id);
if (pp == NULL)
panic("viaide_attach");
pciide_common_attach(sc, pa, pp);
if (!pmf_device_register(self, viaide_suspend, viaide_resume))
aprint_error_dev(self, "couldn't establish power handler\n");
}
static void
piccolo_attach(device_t parent, device_t self, void *aux)
{
struct pci_attach_args *pa = aux;
struct pciide_softc *sc = device_private(self);
const struct pciide_product_desc *pp;
sc->sc_wdcdev.sc_atac.atac_dev = self;
if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_TOSHIBA2)
pp = pciide_lookup_product(pa->pa_id, pciide_toshiba2_products);
else
pp = NULL;
if (pp == NULL)
panic("toshide_attach");
pciide_common_attach(sc, pa, pp);
}
static void
siside_attach(device_t parent, device_t self, void *aux)
{
struct pci_attach_args *pa = aux;
struct pciide_softc *sc = device_private(self);
pci_chipset_tag_t pc = pa->pa_pc;
pcitag_t tag = pa->pa_tag;
pcireg_t csr;
sc->sc_wdcdev.sc_atac.atac_dev = self;
pciide_common_attach(sc, pa,
pciide_lookup_product(pa->pa_id, pciide_sis_products));
csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
if (csr & PCI_COMMAND_INTERRUPT_DISABLE) {
csr &= ~PCI_COMMAND_INTERRUPT_DISABLE;
pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
}
}
static void
jmide_attach(device_t parent, device_t self, void *aux)
{
struct pci_attach_args *pa = aux;
struct jmide_softc *sc = device_private(self);
const struct jmide_product *jp;
const char *intrstr;
pci_intr_handle_t intrhandle;
u_int32_t pcictrl0 = pci_conf_read(pa->pa_pc, pa->pa_tag,
PCI_JM_CONTROL0);
u_int32_t pcictrl1 = pci_conf_read(pa->pa_pc, pa->pa_tag,
PCI_JM_CONTROL1);
struct pciide_product_desc *pp;
int ahci_used = 0;
sc->sc_pciide.sc_wdcdev.sc_atac.atac_dev = self;
jp = jmide_lookup(pa->pa_id);
if (jp == NULL) {
printf("jmide_attach: WTF?\n");
return;
}
sc->sc_npata = jp->jm_npata;
sc->sc_nsata = jp->jm_nsata;
pci_aprint_devinfo(pa, "JMICRON PATA/SATA disk controller");
aprint_normal("%s: ", JM_NAME(sc));
if (sc->sc_npata)
aprint_normal("%d PATA port%s", sc->sc_npata,
(sc->sc_npata > 1) ? "s" : "");
if (sc->sc_nsata)
aprint_normal("%s%d SATA port%s", sc->sc_npata ? ", " : "",
sc->sc_nsata, (sc->sc_nsata > 1) ? "s" : "");
aprint_normal("\n");
if (pci_intr_map(pa, &intrhandle) != 0) {
aprint_error("%s: couldn't map interrupt\n", JM_NAME(sc));
return;
}
intrstr = pci_intr_string(pa->pa_pc, intrhandle);
sc->sc_pciide.sc_pci_ih = pci_intr_establish(pa->pa_pc, intrhandle,
IPL_BIO, jmide_intr, sc);
if (sc->sc_pciide.sc_pci_ih == NULL) {
aprint_error("%s: couldn't establish interrupt", JM_NAME(sc));
return;
}
aprint_normal("%s: interrupting at %s\n", JM_NAME(sc),
intrstr ? intrstr : "unknown interrupt");
if (pcictrl0 & JM_CONTROL0_AHCI_EN) {
bus_size_t size;
struct jmahci_attach_args jma;
u_int32_t saved_pcictrl0;
/*
* ahci controller enabled; disable sata on pciide and
* enable on ahci
*/
saved_pcictrl0 = pcictrl0;
pcictrl0 |= JM_CONTROL0_SATA0_AHCI | JM_CONTROL0_SATA1_AHCI;
pcictrl0 &= ~(JM_CONTROL0_SATA0_IDE | JM_CONTROL0_SATA1_IDE);
pci_conf_write(pa->pa_pc, pa->pa_tag,
PCI_JM_CONTROL0, pcictrl0);
/* attach ahci controller if on the right function */
if ((pa->pa_function == 0 &&
(pcictrl0 & JM_CONTROL0_AHCI_F1) == 0) ||
(pa->pa_function == 1 &&
(pcictrl0 & JM_CONTROL0_AHCI_F1) != 0)) {
jma.jma_pa = pa;
/* map registers */
if (pci_mapreg_map(pa, AHCI_PCI_ABAR,
PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0,
&jma.jma_ahcit, &jma.jma_ahcih, NULL, &size) != 0) {
aprint_error("%s: can't map ahci registers\n",
JM_NAME(sc));
} else {
sc->sc_ahci = config_found_ia(
sc->sc_pciide.sc_wdcdev.sc_atac.atac_dev,
"jmide_hl", &jma, jmahci_print);
}
/*
* if we couldn't attach an ahci, try to fall back
* to pciide. Note that this will not work if IDE
* is on function 0 and AHCI on function 1.
*/
if (sc->sc_ahci == NULL) {
pcictrl0 = saved_pcictrl0 &
~(JM_CONTROL0_SATA0_AHCI |
JM_CONTROL0_SATA1_AHCI |
JM_CONTROL0_AHCI_EN);
pcictrl0 |= JM_CONTROL0_SATA1_IDE |
JM_CONTROL0_SATA0_IDE;
pci_conf_write(pa->pa_pc, pa->pa_tag,
PCI_JM_CONTROL0, pcictrl0);
} else
ahci_used = 1;
}
}
sc->sc_chan_swap = ((pcictrl0 & JM_CONTROL0_PCIIDE_CS) != 0);
/* compute the type of internal primary channel */
if (pcictrl1 & JM_CONTROL1_PATA1_PRI) {
if (sc->sc_npata > 1)
sc->sc_chan_type[sc->sc_chan_swap ? 1 : 0] = TYPE_PATA;
else
sc->sc_chan_type[sc->sc_chan_swap ? 1 : 0] = TYPE_NONE;
} else if (ahci_used == 0 && sc->sc_nsata > 0)
sc->sc_chan_type[sc->sc_chan_swap ? 1 : 0] = TYPE_SATA;
else
sc->sc_chan_type[sc->sc_chan_swap ? 1 : 0] = TYPE_NONE;
/* compute the type of internal secondary channel */
if (sc->sc_nsata > 1 && ahci_used == 0 &&
(pcictrl0 & JM_CONTROL0_PCIIDE0_MS) == 0) {
sc->sc_chan_type[sc->sc_chan_swap ? 0 : 1] = TYPE_SATA;
} else {
/* only a drive if first PATA enabled */
if (sc->sc_npata > 0 && (pcictrl0 & JM_CONTROL0_PATA0_EN)
&& (pcictrl0 &
(sc->sc_chan_swap ? JM_CONTROL0_PATA0_PRI: JM_CONTROL0_PATA0_SEC)))
sc->sc_chan_type[sc->sc_chan_swap ? 0 : 1] = TYPE_PATA;
else
sc->sc_chan_type[sc->sc_chan_swap ? 0 : 1] = TYPE_NONE;
}
if (sc->sc_chan_type[0] == TYPE_NONE &&
sc->sc_chan_type[1] == TYPE_NONE)
return;
if (pa->pa_function == 0 && (pcictrl0 & JM_CONTROL0_PCIIDE_F1))
return;
if (pa->pa_function == 1 && (pcictrl0 & JM_CONTROL0_PCIIDE_F1) == 0)
return;
pp = malloc(sizeof(struct pciide_product_desc), M_DEVBUF, M_NOWAIT);
if (pp == NULL) {
aprint_error("%s: can't malloc sc_pp\n", JM_NAME(sc));
return;
}
aprint_normal("%s: PCI IDE interface used", JM_NAME(sc));
pp->ide_product = 0;
pp->ide_flags = 0;
pp->ide_name = NULL;
pp->chip_map = jmpata_chip_map;
pciide_common_attach(&sc->sc_pciide, pa, pp);
}