/** * \brief Application entry point for pdca_usart example. * * \return Unused (ANSI-C compatibility). */ int main(void) { /* Initialize the SAM system */ sysclk_init(); board_init(); /* Initialize the UART console */ configure_console(); /* Output example information */ puts(STRING_HEADER); /* Enable PDCA module clock */ pdca_enable(PDCA); /* Init PDCA channel with the pdca_options.*/ pdca_channel_set_config(PDCA_TX_CHANNEL, &pdca_tx_configs); /* Enable PDCA channel */ pdca_channel_enable(PDCA_TX_CHANNEL); pdca_channel_set_callback(PDCA_TX_CHANNEL, pdca_tranfer_done, PDCA_0_IRQn, 1, PDCA_IER_RCZ); while (1) { } }
/** * Initialize the PDCA transfer for the example. */ static void init_pdca(void) { /* PDCA channel options */ static const pdca_channel_config_t pdca_tx_configs = { .addr = (void *)event_string, .pid = PDCA_PID_USART_TX, .size = sizeof(event_string), .r_addr = 0, .r_size = 0, .ring = false, .etrig = true, .transfer_size = PDCA_MR_SIZE_BYTE }; /* Enable PDCA module clock */ pdca_enable(PDCA); /* Init PDCA channel with the pdca_options.*/ pdca_channel_set_config(PEVC_ID_USER_PDCA_0, &pdca_tx_configs); /* Set callback for PDCA channel */ pdca_channel_set_callback(PEVC_ID_USER_PDCA_0, pdca_tranfer_done, PDCA_0_IRQn, 1, PDCA_IER_TRC | PDCA_IER_TERR); /* Enable PDCA channel */ pdca_channel_enable(PEVC_ID_USER_PDCA_0); } /** * Push button 0 interrupt callback. */ //! [example_pb0_callback] static void pb0_callback(void) { /* Handle pin interrupt here e.g. toggle an LED */ LED_Toggle(LED0); }
/** * Initialize the PDCA transfer for the example. */ static void init_pdca(void) { /* PDCA channel options */ static const pdca_channel_config_t pdca_tx_configs = { .addr = (void *)event_string, .pid = PDCA_PID_USART2_TX, .size = sizeof(event_string), .r_addr = 0, .r_size = 0, .ring = false, .etrig = true, .transfer_size = PDCA_MR_SIZE_BYTE }; /* Enable PDCA module */ pdca_enable(PDCA); /* Init PDCA channel with the pdca_options.*/ pdca_channel_set_config(PEVC_ID_USER_PDCA_0, &pdca_tx_configs); /* Set callback for PDCA channel */ pdca_channel_set_callback(PEVC_ID_USER_PDCA_0, pdca_tranfer_done, PDCA_0_IRQn, 1, PDCA_IER_TRC | PDCA_IER_TERR); /* Enable PDCA channel */ pdca_channel_enable(PEVC_ID_USER_PDCA_0); } /** * Configure serial console. */ static void configure_console(void) { const usart_serial_options_t uart_serial_options = { .baudrate = CONF_UART_BAUDRATE, #ifdef CONF_UART_CHAR_LENGTH .charlength = CONF_UART_CHAR_LENGTH, #endif .paritytype = CONF_UART_PARITY, #ifdef CONF_UART_STOP_BITS .stopbits = CONF_UART_STOP_BITS, #endif }; /* Configure console. */ stdio_serial_init(CONF_UART, &uart_serial_options); } /** * \brief Main entry point for event example. */ int main(void) { /* Initialize the SAM system */ sysclk_init(); board_init(); /* Initialize the console uart */ configure_console(); /* Output example information */ printf("\r\n\r\n-- Events example 2 --\r\n"); printf("-- %s\r\n", BOARD_NAME); printf("-- Compiled: %s %s --\r\n", __DATE__, __TIME__); /* Configure pin to trigger an enent on falling edge */ ioport_set_pin_mode(CONF_EXAMPLE_PIN_EVENT, IOPORT_MODE_PULLUP | IOPORT_MODE_MUX_C); ioport_disable_pin(CONF_EXAMPLE_PIN_EVENT); ioport_set_pin_sense_mode(CONF_EXAMPLE_PIN_EVENT, IOPORT_SENSE_FALLING); gpio_enable_pin_periph_event(CONF_EXAMPLE_PIN_EVENT); printf(CONF_EXAMPLE_EVENT_MSG); init_events(); init_pdca(); while (1) { /* Toggle LED0 every 500 ms */ LED_Toggle(LED0); delay_ms(500); } }
/** * \brief Start ADC sample. * Initialize ADC, set clock and timing, and set ADC to given mode. */ static void start_adc(void) { struct adc_config adc_cfg = { /* System clock division factor is 16 */ .prescal = ADC_PRESCAL_DIV16, /* The APB clock is used */ .clksel = ADC_CLKSEL_APBCLK, /* Max speed is 150K */ .speed = ADC_SPEED_150K, /* ADC Reference voltage is 0.625*VCC */ .refsel = ADC_REFSEL_1, /* Enables the Startup time */ .start_up = CONFIG_ADC_STARTUP }; struct adc_seq_config adc_seq_cfg = { /* Select Vref for shift cycle */ .zoomrange = ADC_ZOOMRANGE_0, /* Pad Ground */ .muxneg = ADC_MUXNEG_1, /* DAC internal */ .muxpos = ADC_MUXPOS_3, /* Enables the internal voltage sources */ .internal = ADC_INTERNAL_3, /* Disables the ADC gain error reduction */ .gcomp = ADC_GCOMP_DIS, /* Disables the HWLA mode */ .hwla = ADC_HWLA_DIS, /* 12-bits resolution */ .res = ADC_RES_12_BIT, /* Enables the single-ended mode */ .bipolar = ADC_BIPOLAR_SINGLEENDED }; struct adc_ch_config adc_ch_cfg = { .seq_cfg = &adc_seq_cfg, /* Internal Timer Max Counter */ .internal_timer_max_count = 60, /* Window monitor mode is off */ .window_mode = 0, .low_threshold = 0, .high_threshold = 0, }; if(adc_init(&g_adc_inst, ADCIFE, &adc_cfg) != STATUS_OK) { puts("-F- ADC Init Fail!\n\r"); while(1); } if(adc_enable(&g_adc_inst) != STATUS_OK) { puts("-F- ADC Enable Fail!\n\r"); while(1); } if (g_adc_test_mode.uc_pdc_en) { adc_disable_interrupt(&g_adc_inst, ADC_SEQ_SEOC); adc_pdca_set_config(&g_adc_pdca_cfg); pdca_channel_set_callback(CONFIG_ADC_PDCA_RX_CHANNEL, pdca_transfer_done, PDCA_0_IRQn, 1, PDCA_IER_TRC); } else { pdca_channel_disable_interrupt(CONFIG_ADC_PDCA_RX_CHANNEL, PDCA_IDR_TRC); pdca_channel_disable_interrupt(CONFIG_ADC_PDCA_TX_CHANNEL, PDCA_IDR_TRC); adc_ch_set_config(&g_adc_inst, &adc_ch_cfg); adc_set_callback(&g_adc_inst, ADC_SEQ_SEOC, adcife_read_conv_result, ADCIFE_IRQn, 1); } /* Configure trigger mode and start convention. */ switch (g_adc_test_mode.uc_trigger_mode) { case TRIGGER_MODE_SOFTWARE: adc_configure_trigger(&g_adc_inst, ADC_TRIG_SW); break; case TRIGGER_MODE_CON: adc_configure_trigger(&g_adc_inst, ADC_TRIG_CON); break; case TRIGGER_MODE_ITIMER: adc_configure_trigger(&g_adc_inst, ADC_TRIG_INTL_TIMER); adc_configure_itimer_period(&g_adc_inst, adc_ch_cfg.internal_timer_max_count); adc_start_itimer(&g_adc_inst); break; default: break; } if (g_adc_test_mode.uc_gain_en) { adc_configure_gain(&g_adc_inst, ADC_GAIN_2X); } else { adc_configure_gain(&g_adc_inst, ADC_GAIN_1X); } } /** * \brief Start DAC ouput. * Initialize DAC, set clock and timing, and set DAC to given mode. */ static void start_dac(void) { sysclk_enable_peripheral_clock(DACC); /* Reset DACC registers */ dacc_reset(DACC); /* Half word transfer mode */ dacc_set_transfer_mode(DACC, 0); /* Timing: * startup - 0x10 (17 clocks) * internal trigger clock - 0x60 (96 clocks) */ dacc_set_timing(DACC, 0x10, 0x60); /* Enable DAC */ dacc_enable(DACC); /* The DAC is 10-bit resolution, so output voltage should be * (3300 * 255) / ((1 << 10) - 1) = 823mv */ dacc_write_conversion_data(DACC, 0xFF); }
/** * \brief Initialize the PDCA transfer for the example. */ static void init_pdca(void) { /* PDCA channel options */ static const pdca_channel_config_t pdca_tx_configs = { .addr = (void *)event_string, .pid = CONF_PDCA_PID_USART_TX, .size = sizeof(event_string), .r_addr = 0, .r_size = 0, .ring = false, .etrig = true, .transfer_size = PDCA_MR_SIZE_BYTE }; /* Enable PDCA module */ pdca_enable(PDCA); /* Init PDCA channel with the pdca_options.*/ pdca_channel_set_config(PEVC_ID_USER_PDCA_0, &pdca_tx_configs); /* Set callback for PDCA channel */ pdca_channel_set_callback(PEVC_ID_USER_PDCA_0, pdca_tranfer_done, PDCA_0_IRQn, 1, PDCA_IER_TRC | PDCA_IER_TERR); /* Enable PDCA channel */ pdca_channel_enable(PEVC_ID_USER_PDCA_0); } /** * \brief Configure serial console. */ static void configure_console(void) { const usart_serial_options_t uart_serial_options = { .baudrate = CONF_UART_BAUDRATE, #ifdef CONF_UART_CHAR_LENGTH .charlength = CONF_UART_CHAR_LENGTH, #endif /* CONF_UART_CHAR_LENGTH */ .paritytype = CONF_UART_PARITY, #ifdef CONF_UART_STOP_BITS .stopbits = CONF_UART_STOP_BITS, #endif /* CONF_UART_STOP_BITS */ }; /* Configure console. */ stdio_serial_init(CONF_UART, &uart_serial_options); } /** * \brief Main entry point for event example. */ int main(void) { /* Initialize the SAM system */ sysclk_init(); board_init(); /* Initialize the console uart */ configure_console(); /* Output example information */ printf("\r\n\r\n-- Events example 1 --\r\n"); printf("-- %s\r\n", BOARD_NAME); printf("-- Compiled: %s %s --\r\n", __DATE__, __TIME__); //! [quick_start_init_all_basic_use] /* Initialize AST as event generator. */ //! [quick_start_init_ast_basic_use] init_ast(); //! [quick_start_init_ast_basic_use] /* Initialise events for this example. */ //! [quick_start_init_events_basic_use] init_events(); //! [quick_start_init_events_basic_use] /* Initialize the PDCA as event user */ //! [quick_start_init_pdca_basic_use] init_pdca(); //! [quick_start_init_pdca_basic_use] //! [quick_start_init_all_basic_use] while (1) { /* Toggle LED0 every 500 ms */ LED_Toggle(LED0); delay_ms(500); } }
/** * \brief Application entry point for PARC example. * * \return Unused (ANSI-C compatibility). */ int main(void) { uint32_t uc_key; /* Initialize the SAM system. */ sysclk_init(); board_init(); /* Configure UART for debug message output. */ configure_console(); parc_port_source_simulation_config(); //! [parc_variables] struct parc_module module_inst; struct parc_config config; //! [parc_variables] /* Output example information. */ puts(STRING_HEADER); /* Configure TC. */ configure_tc(); /* Start timer. */ tc_start(TC0, 0); //! [parc_get_defaults] // Get default configuration parc_get_config_defaults(&config); //! [parc_get_defaults] printf("Press y to sample the data when both data enable pins are enabled.\r\n"); printf("Press n to sample the data, don't care the status of the data enable pins.\r\n"); uc_key = 0; while ((uc_key != 'y') && (uc_key != 'n')) { usart_read(CONF_UART, &uc_key); } if (uc_key == 'y') { /* Sample the data when both data enable pins are enabled. */ config.smode = PARC_SMODE_PCEN1_AND_PCEN2_H; ioport_set_pin_level(PIN_PCEN1_INPUT, IOPORT_PIN_LEVEL_HIGH); ioport_set_pin_level(PIN_PCEN2_INPUT, IOPORT_PIN_LEVEL_HIGH); printf("Receive data when both data enable pins are enabled.\r\n"); } else { /* Sample the data, don't care the status of the data enable pins. */ config.smode = PARC_SMODE_ALWAYS; printf("Receive data, don't care the status of the data enable pins.\r\n"); } printf("Press y to sample all the data.\r\n"); printf("Press n to sample the data only one out of two.\r\n"); uc_key = 0; while ((uc_key != 'y') && (uc_key != 'n')) { usart_read(CONF_UART, &uc_key); } if (uc_key == 'y') { /* Sample all the data. */ config.capture_mode = PARC_BOTH_CAPTURE; printf("All data are sampled.\r\n"); } else { /* Sample the data only one out of two. */ config.capture_mode = PARC_EVEN_CAPTURE; printf("Only one out of two data is sampled, with an even index.\r\n"); } //! [parc_init_enable_and_start] //! [parc_init_enable_and_start_1] // Initialize PARC. parc_init(&module_inst, PARC, &config); //! [parc_init_enable_and_start_1] //! [parc_init_enable_and_start_2] // Enable the PARC parc_enable(&module_inst); // Start capture. parc_start_capture(&module_inst); //! [parc_init_enable_and_start_2] //! [parc_init_enable_and_start] /* Enable PDCA module clock */ pdca_enable(PDCA); /* Init PDCA channel with the pdca_options.*/ pdca_channel_set_config(PDCA_PARC_CHANNEL, &PDCA_PARC_OPTIONS); /* Set callback for PDCA interrupt. */ pdca_channel_set_callback(PDCA_PARC_CHANNEL, pdca_parc_callback,PDCA_0_IRQn,1,PDCA_IER_RCZ); /* Enable PDCA channel, start receiving data. */ pdca_channel_enable(PDCA_PARC_CHANNEL); /* Start read PARC data capture via PDCA. */ pdca_channel_write_load(PDCA_PARC_CHANNEL, (void *)gs_puc_buffer, BUFFER_SIZE); /* Main loop. */ while(1) { } }
/** * \brief usart_rs485 Application entry point. * * Configure USART in RS485 mode. If the application starts earlier, it acts * as a receiver. Otherwise, it should be a transmitter. * * \return Unused (ANSI-C compatibility). */ int main(void) { uint8_t uc_receive, uc_send = SYNC_CHAR; uint32_t time_elapsed = 0; uint32_t i; /* Initialize the SAM system. */ sysclk_init(); board_init(); /* Configure UART for debug message output. */ configure_console(); /* Output example information. */ puts(STRING_HEADER); /* 1ms tick. */ configure_systick(); /* Configure USART. */ configure_usart(); /* Initialize receiving buffer to distinguish with the sent frame. */ memset(g_uc_receive_buffer, 0x0, BUFFER_SIZE); /* * Enable transmitter here, and disable receiver first, to avoid receiving * characters sent by itself. It's necessary for half duplex RS485. */ usart_enable_tx(BOARD_USART); usart_disable_rx(BOARD_USART); /* Enable PDCA module clock */ pdca_enable(PDCA); /* Init PDCA channel with the pdca_options.*/ pdca_channel_set_config(PDCA_RX_CHANNEL, &PDCA_RX_OPTIONS); pdca_channel_set_config(PDCA_TX_CHANNEL, &PDCA_TX_OPTIONS); /* Send a sync character XON (0x11). */ pdca_channel_write_load(PDCA_TX_CHANNEL, &uc_send, 1); /* Enable transfer PDCA channel */ pdca_channel_enable(PDCA_TX_CHANNEL); /* Delay until the line is cleared, an estimated time used. */ wait(50); /* Then enable receiver. */ usart_enable_rx(BOARD_USART); /* Read the acknowledgement. */ pdca_channel_write_load(PDCA_RX_CHANNEL, &uc_receive, 1); /* Enable PDCA channel */ pdca_channel_enable(PDCA_RX_CHANNEL); /* Wait until time out or acknowledgement is received. */ time_elapsed = get_tick_count(); while (pdca_get_channel_status(PDCA_RX_CHANNEL) != PDCA_CH_TRANSFER_COMPLETED) { if (get_tick_count() - time_elapsed > TIMEOUT) { break; } } /* If acknowledgement received in a short time. */ if (pdca_get_channel_status(PDCA_RX_CHANNEL) == PDCA_CH_TRANSFER_COMPLETED) { /* Acknowledgement. */ if (uc_receive == ACK_CHAR) { /* Act as transmitter, start transmitting. */ puts("-I- Act as transmitter.\r"); g_state = TRANSMITTING; puts("-I- Start transmitting!\r"); pdca_channel_write_load(PDCA_TX_CHANNEL, g_uc_transmit_buffer, BUFFER_SIZE); /* Enable PDCA interrupt */ pdca_channel_set_callback(PDCA_TX_CHANNEL, PDCA_TX_Handler, PDCA_1_IRQn, 1, PDCA_IER_TRC); while (g_state != TRANSMITTED) { } puts("-I- Transmit done!\r"); while (1) { } } } else { /* Start receiving, act as receiver. */ puts("-I- Act as receiver.\r"); puts("-I- Receiving sync character.\r"); while (pdca_get_channel_status(PDCA_RX_CHANNEL) != PDCA_CH_TRANSFER_COMPLETED) { } /* Sync character is received. */ if (uc_receive == SYNC_CHAR) { puts("-I- Received sync character.\r"); /* SEND XOff as acknowledgement. */ uc_send = ACK_CHAR; /* * Delay to prevent the character from being discarded by * transmitter due to responding too soon. */ wait(100); ioport_set_pin_level(RS485_USART_CTS_PIN, 1); pdca_channel_write_load(PDCA_TX_CHANNEL, &uc_send, 1); g_state = RECEIVING; puts("-I- Start receiving buffer!\r"); pdca_channel_write_load(PDCA_RX_CHANNEL, g_uc_receive_buffer, BUFFER_SIZE); /* Enable PDCA interrupt */ pdca_channel_set_callback(PDCA_RX_CHANNEL, PDCA_RX_Handler, PDCA_0_IRQn, 1, PDCA_IER_TRC); ioport_set_pin_level(RS485_USART_CTS_PIN, 0); while (g_state != RECEIVED) { } } } i = 0; /* Check received frame. */ while (i < BUFFER_SIZE) { if (g_uc_transmit_buffer[i] != g_uc_receive_buffer[i]) { puts("-E- Error occurred while receiving!\r"); /* Infinite loop here. */ while (1) { } } i++; } puts("-I- Received buffer successfully!\r"); while (1) { } }
/** * \brief Test ADCIFE in Differential mode. * * \param test Current test case. */ static void run_adcife_diff_test(const struct test_case *test) { uint32_t timeout = ADC_NUM_OF_ATTEMPTS; bool conversion_timeout = false; struct adc_seq_config adc_seq_cfg = { /* Select Vref for shift cycle */ .zoomrange = ADC_ZOOMRANGE_0, /* Pad Ground */ .muxneg = ADC_MUXNEG_1, /* Scaled Vcc, Vcc/10 */ .muxpos = ADC_MUXPOS_2, /* Enables the internal voltage sources */ .internal = ADC_INTERNAL_3, /* Disables the ADC gain error reduction */ .gcomp = ADC_GCOMP_DIS, /* Disables the HWLA mode */ .hwla = ADC_HWLA_DIS, /* 12-bits resolution */ .res = ADC_RES_12_BIT, /* Enables the differential mode */ .bipolar = ADC_BIPOLAR_DIFFERENTIAL }; struct adc_ch_config adc_ch_cfg = { .seq_cfg = &adc_seq_cfg, /* Internal Timer Max Counter */ .internal_timer_max_count = 60, /* Window monitor mode is off */ .window_mode = 0, .low_threshold = 0, .high_threshold = 0, }; adc_ch_set_config(&g_adc_inst, &adc_ch_cfg); adc_configure_trigger(&g_adc_inst, ADC_TRIG_CON); adc_configure_gain(&g_adc_inst, ADC_GAIN_1X); while (!((adc_get_status(&g_adc_inst) & ADCIFE_SR_SEOC) == ADCIFE_SR_SEOC)) { if (!timeout--) { conversion_timeout = true; } } test_assert_true(test, conversion_timeout == false, "ADCIFE Differential conversion timeout"); /* Because selected channel is positive input, then in differential mode * the output conversion result will = 2047 + (Vin/Vref)*2047. */ test_assert_true(test, adc_get_last_conv_value(&g_adc_inst) > 2047, "ADCIFE Differential test failed"); } /** * \brief Test ADCIFE in internal timer trigger mode, * which also tests interrupt driven conversions. * * \param test Current test case. */ static void run_adcife_itimer_trig_test(const struct test_case *test) { struct adc_seq_config adc_seq_cfg = { /* Select Vref for shift cycle */ .zoomrange = ADC_ZOOMRANGE_0, /* Pad Ground */ .muxneg = ADC_MUXNEG_1, /* Scaled Vcc, Vcc/10 */ .muxpos = ADC_MUXPOS_2, /* Enables the internal voltage sources */ .internal = ADC_INTERNAL_3, /* Disables the ADC gain error reduction */ .gcomp = ADC_GCOMP_DIS, /* Disables the HWLA mode */ .hwla = ADC_HWLA_DIS, /* 12-bits resolution */ .res = ADC_RES_12_BIT, /* Enables the single-ended mode */ .bipolar = ADC_BIPOLAR_SINGLEENDED }; struct adc_ch_config adc_ch_cfg = { .seq_cfg = &adc_seq_cfg, /* Internal Timer Max Counter */ .internal_timer_max_count = 60, /* Window monitor mode is off */ .window_mode = 0, .low_threshold = 0, .high_threshold = 0, }; adc_ch_set_config(&g_adc_inst, &adc_ch_cfg); adc_set_callback(&g_adc_inst, ADC_SEQ_SEOC, adcife_set_conv_flag, ADCIFE_IRQn, 1); adc_configure_trigger(&g_adc_inst, ADC_TRIG_INTL_TIMER); adc_configure_gain(&g_adc_inst, ADC_GAIN_1X); adc_configure_itimer_period(&g_adc_inst, adc_ch_cfg.internal_timer_max_count); adc_start_itimer(&g_adc_inst); delay_ms(100); test_assert_true(test, g_uc_condone_flag == 1, "ADCIFE Internal Timer trigger test failed"); } /* When VDDANA is in MIN value = 2.4V, the equivalent voltage value is * (2400 * 255) / ((1 << 10) - 1) = 598mv. The relative digital value is * 598 * 4095 / 1000 = 2449. */ #define DAC_INTERNAL_MIN_VALUE 2449 /* When VDDANA is in MAX value = 3.6V the equivalent voltage value is * (3600 * 255) / ((1 << 10) - 1) = 897mv. The relative digital value is * 897 * 4095 / 1000 = 3673. */ #define DAC_INTERNAL_MAX_VALUE 3673 /* When VCC is in MIN value = 1.6V, the equivalent voltage value is * 1600 / 10 = 160mv. The relative digital value is * 160 * 4095 / 1000 = 434. */ #define VCC_SCALED_MIN_VALUE 434 /* When VCC is in MAX value = 3.6V, the equivalent voltage value is * 3600 / 10 = 360mv. The relative digital value is * 360 * 4095 / 1000 = 1474. */ #define VCC_SCALED_MAX_VALUE 1474 /** * \brief Test ADCIFE in multiple channel mode. * * \param test Current test case. */ static void run_adcife_multichannel_test(const struct test_case *test) { start_dac(); adc_pdca_set_config(&g_adc_pdca_cfg); pdca_channel_set_callback(CONFIG_ADC_PDCA_RX_CHANNEL, pdca_transfer_done, PDCA_0_IRQn, 1, PDCA_IER_TRC); adc_configure_trigger(&g_adc_inst, ADC_TRIG_CON); adc_configure_gain(&g_adc_inst, ADC_GAIN_1X); delay_ms(100); /* The DAC output voltage value is 823mv, so the equivalent ADC value should be * 4095 * 823 / 1000 = 3370. The scaled VCC output voltage is 330mv, so the * equivalent ADC value should be 4095 * 330 / 1000 = 1351. */ test_assert_true(test, ((DAC_INTERNAL_MIN_VALUE < g_adc_sample_data[0] < DAC_INTERNAL_MAX_VALUE) && (VCC_SCALED_MIN_VALUE < g_adc_sample_data[1] < VCC_SCALED_MAX_VALUE)), "ADCIFE Multichannel test failed"); } /** * \brief Test ADCIFE in window monitor mode. * * \param test Current test case. */ static void run_adcife_wm_test(const struct test_case *test) { struct adc_seq_config adc_seq_cfg = { /* Select Vref for shift cycle */ .zoomrange = ADC_ZOOMRANGE_0, /* Pad Ground */ .muxneg = ADC_MUXNEG_1, /* Scaled Vcc, Vcc/10 */ .muxpos = ADC_MUXPOS_2, /* Enables the internal voltage sources */ .internal = ADC_INTERNAL_3, /* Disables the ADC gain error reduction */ .gcomp = ADC_GCOMP_DIS, /* Disables the HWLA mode */ .hwla = ADC_HWLA_DIS, /* 12-bits resolution */ .res = ADC_RES_12_BIT, /* Enables the single-ended mode */ .bipolar = ADC_BIPOLAR_SINGLEENDED }; struct adc_ch_config adc_ch_cfg = { .seq_cfg = &adc_seq_cfg, /* Internal Timer Max Counter */ .internal_timer_max_count = 60, /* Window monitor mode is off */ .window_mode = ADC_WM_MODE_3, /* The equivalent voltage value is 205 * 1000 / 4095 = 50mv. */ .low_threshold = 205, /* The equivalent voltage value is 2050 * 1000 / 4095 = 500mv. */ .high_threshold = 2050, }; adc_ch_set_config(&g_adc_inst, &adc_ch_cfg); adc_configure_trigger(&g_adc_inst, ADC_TRIG_CON); adc_configure_gain(&g_adc_inst, ADC_GAIN_1X); adc_set_callback(&g_adc_inst, ADC_WINDOW_MONITOR, adcife_set_wm_flag, ADCIFE_IRQn, 1); delay_ms(100); test_assert_true(test, g_uc_enter_win_flag == 1, "ADCIFE Inside Window Mode test failed"); /* The teseted channel voltage is outside window */ adc_disable(&g_adc_inst); g_uc_enter_win_flag = 0; adc_seq_cfg.muxpos = ADC_MUXPOS_3; adc_ch_set_config(&g_adc_inst, &adc_ch_cfg); adc_configure_trigger(&g_adc_inst, ADC_TRIG_CON); adc_configure_gain(&g_adc_inst, ADC_GAIN_1X); adc_enable_interrupt(&g_adc_inst, ADC_WINDOW_MONITOR); delay_ms(100); test_assert_true(test, g_uc_enter_win_flag == 0, "ADCIFE Outside Window Mode test failed"); } /** * \brief Run ADCIFE driver unit tests. */ int main(void) { const usart_serial_options_t usart_serial_options = { .baudrate = CONF_TEST_BAUDRATE, .charlength = CONF_TEST_CHARLENGTH, .paritytype = CONF_TEST_PARITY, .stopbits = CONF_TEST_STOPBITS }; /* Initialize the system clock and board */ sysclk_init(); board_init(); /* Enable the debug uart */ stdio_serial_init(CONF_TEST_USART, &usart_serial_options); #if defined(__GNUC__) setbuf(stdout, NULL); #endif /* Define all the test cases */ DEFINE_TEST_CASE(adcife_init_test, NULL, run_adcife_init_test, NULL, "ADCIFE Initialize test"); DEFINE_TEST_CASE(adcife_diff_test, NULL, run_adcife_diff_test, NULL, "ADCIFE Differential test"); DEFINE_TEST_CASE(adcife_itmer_trig_test, NULL, run_adcife_itimer_trig_test, NULL, "ADCIFE Internal Timer trigger test"); DEFINE_TEST_CASE(adcife_multichannel_test, NULL, run_adcife_multichannel_test, NULL, "ADCIFE Multichannel test"); DEFINE_TEST_CASE(adcife_wm_test, NULL, run_adcife_wm_test, NULL, "ADCIFE Window Monitor Mode test"); /* Put test case addresses in an array */ DEFINE_TEST_ARRAY(adcife_tests) = { &adcife_init_test, &adcife_diff_test, &adcife_itmer_trig_test, &adcife_multichannel_test, &adcife_wm_test, }; /* Define the test suite */ DEFINE_TEST_SUITE(adcife_suite, adcife_tests, "SAM ADCIFE driver test suite"); /* Run all tests in the test suite */ test_suite_run(&adcife_suite); while (1) { /* Busy-wait forever. */ } }