void setup_motors() { pio_enable(GPIO_NUM + MOTOR_1_STEP); pio_enable(GPIO_NUM + MOTOR_2_STEP); pio_enable(GPIO_NUM + MOTOR_1_DIR); pio_enable(GPIO_NUM + MOTOR_2_DIR); pio_set_direction(GPIO_NUM + MOTOR_1_STEP, GPIO_OUT); pio_set_direction(GPIO_NUM + MOTOR_2_STEP, GPIO_OUT); pio_set_direction(GPIO_NUM + MOTOR_1_DIR, GPIO_OUT); pio_set_direction(GPIO_NUM + MOTOR_2_DIR, GPIO_OUT); pio_set_value(GPIO_NUM + MOTOR_1_STEP, 0); pio_set_value(GPIO_NUM + MOTOR_2_STEP, 0); pio_set_value(GPIO_NUM + MOTOR_1_DIR, 0); pio_set_value(GPIO_NUM + MOTOR_2_DIR, 0); }
static int cuda_init(void) { if (sysinfo_get_value("cuda.address.physical", &(instance->cuda_physical)) != EOK) return -1; void *vaddr; if (pio_enable((void *) instance->cuda_physical, sizeof(cuda_t), &vaddr) != 0) return -1; dev = vaddr; instance->cuda = dev; instance->xstate = cx_listen; instance->bidx = 0; instance->snd_bytes = 0; fibril_mutex_initialize(&instance->dev_lock); /* Disable all interrupts from CUDA. */ pio_write_8(&dev->ier, IER_CLR | ALL_INT); cuda_irq_code.ranges[0].base = (uintptr_t) instance->cuda_physical; cuda_irq_code.cmds[0].addr = (void *) &((cuda_t *) instance->cuda_physical)->ifr; async_set_interrupt_received(cuda_irq_handler); irq_register(10, device_assign_devno(), 0, &cuda_irq_code); /* Enable SR interrupt. */ pio_write_8(&dev->ier, TIP | TREQ); pio_write_8(&dev->ier, IER_SET | SR_INT); /* Enable ADB autopolling. */ cuda_autopoll_set(true); return 0; }
static int ne2k_dev_init(nic_t *nic_data) { /* Get HW resources */ hw_res_list_parsed_t hw_res_parsed; hw_res_list_parsed_init(&hw_res_parsed); int rc = nic_get_resources(nic_data, &hw_res_parsed); if (rc != EOK) goto failed; if (hw_res_parsed.irqs.count == 0) { rc = EINVAL; goto failed; } if (hw_res_parsed.io_ranges.count == 0) { rc = EINVAL; goto failed; } if (hw_res_parsed.io_ranges.ranges[0].size < NE2K_IO_SIZE) { rc = EINVAL; goto failed; } ne2k_t *ne2k = (ne2k_t *) nic_get_specific(nic_data); ne2k->irq = hw_res_parsed.irqs.irqs[0]; ne2k->base_port = (void *) (uintptr_t) hw_res_parsed.io_ranges.ranges[0].address; hw_res_list_parsed_clean(&hw_res_parsed); /* Enable port I/O */ if (pio_enable(ne2k->base_port, NE2K_IO_SIZE, &ne2k->port) != EOK) return EADDRNOTAVAIL; ne2k->data_port = ne2k->port + NE2K_DATA; ne2k->receive_configuration = RCR_AB | RCR_AM; ne2k->probed = false; ne2k->up = false; /* Find out whether the device is present. */ if (ne2k_probe(ne2k) != EOK) return ENOENT; ne2k->probed = true; rc = ne2k_register_interrupt(nic_data); if (rc != EOK) return EINVAL; return EOK; failed: hw_res_list_parsed_clean(&hw_res_parsed); return rc; }
/** Initialize UHCI hc driver structure * * @param[in] instance Memory place to initialize. * @param[in] regs Address of I/O control registers. * @param[in] reg_size Size of I/O control registers. * @param[in] interrupts True if hw interrupts should be used. * @return Error code. * @note Should be called only once on any structure. * * Initializes memory structures, starts up hw, and launches debugger and * interrupt fibrils. */ int hc_init(hc_t *instance, void *regs, size_t reg_size, bool interrupts) { assert(reg_size >= sizeof(uhci_regs_t)); int ret; #define CHECK_RET_RETURN(ret, message...) \ if (ret != EOK) { \ usb_log_error(message); \ return ret; \ } else (void) 0 instance->hw_interrupts = interrupts; instance->hw_failures = 0; /* allow access to hc control registers */ uhci_regs_t *io; ret = pio_enable(regs, reg_size, (void **)&io); CHECK_RET_RETURN(ret, "Failed to gain access to registers at %p: %s.\n", io, str_error(ret)); instance->registers = io; usb_log_debug( "Device registers at %p (%zuB) accessible.\n", io, reg_size); ret = hc_init_mem_structures(instance); CHECK_RET_RETURN(ret, "Failed to initialize UHCI memory structures: %s.\n", str_error(ret)); #undef CHECK_RET_RETURN hcd_init(&instance->generic, USB_SPEED_FULL, BANDWIDTH_AVAILABLE_USB11, bandwidth_count_usb11); instance->generic.private_data = instance; instance->generic.schedule = hc_schedule; instance->generic.ep_add_hook = NULL; hc_init_hw(instance); if (!interrupts) { instance->interrupt_emulator = fibril_create(hc_interrupt_emulator, instance); fibril_add_ready(instance->interrupt_emulator); } (void)hc_debug_checker; return EOK; }
/** Initialize the APIC driver. * */ static bool apic_init(void) { sysarg_t apic; if ((sysinfo_get_value("apic", &apic) != EOK) || (!apic)) { printf("%s: No APIC found\n", NAME); return false; } int rc = pio_enable((void *) IO_APIC_BASE, IO_APIC_SIZE, (void **) &io_apic); if (rc != EOK) { printf("%s: Failed to enable PIO for APIC: %d\n", NAME, rc); return false; } async_set_fallback_port_handler(apic_connection, NULL); service_register(SERVICE_IRC); return true; }
int amdm37x_init(amdm37x_t *device, bool trace) { assert(device); int ret = EOK; ret = pio_enable((void*)USBHOST_CM_BASE_ADDRESS, USBHOST_CM_SIZE, (void**)&device->cm.usbhost); if (ret != EOK) return ret; ret = pio_enable((void*)CORE_CM_BASE_ADDRESS, CORE_CM_SIZE, (void**)&device->cm.core); if (ret != EOK) return ret; ret = pio_enable((void*)CLOCK_CONTROL_CM_BASE_ADDRESS, CLOCK_CONTROL_CM_SIZE, (void**)&device->cm.clocks); if (ret != EOK) return ret; ret = pio_enable((void*)MPU_CM_BASE_ADDRESS, MPU_CM_SIZE, (void**)&device->cm.mpu); if (ret != EOK) return ret; ret = pio_enable((void*)IVA2_CM_BASE_ADDRESS, IVA2_CM_SIZE, (void**)&device->cm.iva2); if (ret != EOK) return ret; ret = pio_enable((void*)CLOCK_CONTROL_PRM_BASE_ADDRESS, CLOCK_CONTROL_PRM_SIZE, (void**)&device->prm.clocks); if (ret != EOK) return ret; ret = pio_enable((void*)GLOBAL_REG_PRM_BASE_ADDRESS, GLOBAL_REG_PRM_SIZE, (void**)&device->prm.global); if (ret != EOK) return ret; ret = pio_enable((void*)AMDM37x_USBTLL_BASE_ADDRESS, AMDM37x_USBTLL_SIZE, (void**)&device->tll); if (ret != EOK) return ret; ret = pio_enable((void*)AMDM37x_UHH_BASE_ADDRESS, AMDM37x_UHH_SIZE, (void**)&device->uhh); if (ret != EOK) return ret; if (trace) { pio_trace_enable(device->tll, AMDM37x_USBTLL_SIZE, log, (void*)AMDM37x_USBTLL_BASE_ADDRESS); pio_trace_enable(device->cm.clocks, CLOCK_CONTROL_CM_SIZE, log, (void*)CLOCK_CONTROL_CM_BASE_ADDRESS); pio_trace_enable(device->cm.core, CORE_CM_SIZE, log, (void*)CORE_CM_BASE_ADDRESS); pio_trace_enable(device->cm.mpu, MPU_CM_SIZE, log, (void*)MPU_CM_BASE_ADDRESS); pio_trace_enable(device->cm.iva2, IVA2_CM_SIZE, log, (void*)IVA2_CM_BASE_ADDRESS); pio_trace_enable(device->cm.usbhost, USBHOST_CM_SIZE, log, (void*)USBHOST_CM_BASE_ADDRESS); pio_trace_enable(device->uhh, AMDM37x_UHH_SIZE, log, (void*)AMDM37x_UHH_BASE_ADDRESS); pio_trace_enable(device->prm.clocks, CLOCK_CONTROL_PRM_SIZE, log, (void*)CLOCK_CONTROL_PRM_BASE_ADDRESS); pio_trace_enable(device->prm.global, GLOBAL_REG_PRM_SIZE, log, (void*)GLOBAL_REG_PRM_BASE_ADDRESS); } return EOK; }
int ega_init(void) { sysarg_t present; int rc = sysinfo_get_value("fb", &present); if (rc != EOK) present = false; if (!present) return ENOENT; sysarg_t kind; rc = sysinfo_get_value("fb.kind", &kind); if (rc != EOK) kind = (sysarg_t) -1; if (kind != 2) return EINVAL; sysarg_t paddr; rc = sysinfo_get_value("fb.address.physical", &paddr); if (rc != EOK) return rc; rc = sysinfo_get_value("fb.width", &ega.cols); if (rc != EOK) return rc; rc = sysinfo_get_value("fb.height", &ega.rows); if (rc != EOK) return rc; rc = pio_enable((void*)EGA_IO_BASE, EGA_IO_SIZE, NULL); if (rc != EOK) return rc; ega.size = (ega.cols * ega.rows) << 1; rc = physmem_map((void *) paddr, ALIGN_UP(ega.size, PAGE_SIZE) >> PAGE_WIDTH, AS_AREA_READ | AS_AREA_WRITE, (void *) &ega.addr); if (rc != EOK) return rc; sysarg_t blinking; rc = sysinfo_get_value("fb.blinking", &blinking); if (rc != EOK) blinking = false; ega.style_normal = 0xf0; ega.style_inverted = 0x0f; if (blinking) { ega.style_normal &= 0x77; ega.style_inverted &= 0x77; } outdev_t *dev = outdev_register(&ega_ops, (void *) &ega); if (dev == NULL) { as_area_destroy(ega.addr); return EINVAL; } return EOK; }
/** Initialize i8042 driver structure. * * @param dev Driver structure to initialize. * @param regs I/O address of registers. * @param reg_size size of the reserved I/O address space. * @param irq_kbd IRQ for primary port. * @param irq_mouse IRQ for aux port. * @param ddf_dev DDF device structure of the device. * * @return Error code. * */ int i8042_init(i8042_t *dev, void *regs, size_t reg_size, int irq_kbd, int irq_mouse, ddf_dev_t *ddf_dev) { const size_t range_count = sizeof(i8042_ranges) / sizeof(irq_pio_range_t); irq_pio_range_t ranges[range_count]; const size_t cmd_count = sizeof(i8042_cmds) / sizeof(irq_cmd_t); irq_cmd_t cmds[cmd_count]; int rc; bool kbd_bound = false; bool aux_bound = false; dev->kbd_fun = NULL; dev->aux_fun = NULL; if (reg_size < sizeof(i8042_regs_t)) { rc = EINVAL; goto error; } if (pio_enable(regs, sizeof(i8042_regs_t), (void **) &dev->regs) != 0) { rc = EIO; goto error; } dev->kbd_fun = ddf_fun_create(ddf_dev, fun_inner, "ps2a"); if (dev->kbd_fun == NULL) { rc = ENOMEM; goto error; }; rc = ddf_fun_add_match_id(dev->kbd_fun, "char/xtkbd", 90); if (rc != EOK) goto error; dev->aux_fun = ddf_fun_create(ddf_dev, fun_inner, "ps2b"); if (dev->aux_fun == NULL) { rc = ENOMEM; goto error; } rc = ddf_fun_add_match_id(dev->aux_fun, "char/ps2mouse", 90); if (rc != EOK) goto error; ddf_fun_set_ops(dev->kbd_fun, &ops); ddf_fun_set_ops(dev->aux_fun, &ops); buffer_init(&dev->kbd_buffer, dev->kbd_data, BUFFER_SIZE); buffer_init(&dev->aux_buffer, dev->aux_data, BUFFER_SIZE); fibril_mutex_initialize(&dev->write_guard); rc = ddf_fun_bind(dev->kbd_fun); if (rc != EOK) { ddf_msg(LVL_ERROR, "Failed to bind keyboard function: %s.", ddf_fun_get_name(dev->kbd_fun)); goto error; } kbd_bound = true; rc = ddf_fun_bind(dev->aux_fun); if (rc != EOK) { ddf_msg(LVL_ERROR, "Failed to bind aux function: %s.", ddf_fun_get_name(dev->aux_fun)); goto error; } aux_bound = true; /* Disable kbd and aux */ wait_ready(dev); pio_write_8(&dev->regs->status, i8042_CMD_WRITE_CMDB); wait_ready(dev); pio_write_8(&dev->regs->data, i8042_KBD_DISABLE | i8042_AUX_DISABLE); /* Flush all current IO */ while (pio_read_8(&dev->regs->status) & i8042_OUTPUT_FULL) (void) pio_read_8(&dev->regs->data); memcpy(ranges, i8042_ranges, sizeof(i8042_ranges)); ranges[0].base = (uintptr_t) regs; memcpy(cmds, i8042_cmds, sizeof(i8042_cmds)); cmds[0].addr = (void *) &(((i8042_regs_t *) regs)->status); cmds[3].addr = (void *) &(((i8042_regs_t *) regs)->data); irq_code_t irq_code = { .rangecount = range_count, .ranges = ranges, .cmdcount = cmd_count, .cmds = cmds }; rc = register_interrupt_handler(ddf_dev, irq_kbd, i8042_irq_handler, &irq_code); if (rc != EOK) { ddf_msg(LVL_ERROR, "Failed set handler for kbd: %s.", ddf_dev_get_name(ddf_dev)); goto error; } rc = register_interrupt_handler(ddf_dev, irq_mouse, i8042_irq_handler, &irq_code); if (rc != EOK) { ddf_msg(LVL_ERROR, "Failed set handler for mouse: %s.", ddf_dev_get_name(ddf_dev)); goto error; } /* Enable interrupts */ async_sess_t *parent_sess = ddf_dev_parent_sess_get(ddf_dev); assert(parent_sess != NULL); const bool enabled = hw_res_enable_interrupt(parent_sess); if (!enabled) { log_msg(LOG_DEFAULT, LVL_ERROR, "Failed to enable interrupts: %s.", ddf_dev_get_name(ddf_dev)); rc = EIO; goto error; } /* Enable port interrupts. */ wait_ready(dev); pio_write_8(&dev->regs->status, i8042_CMD_WRITE_CMDB); wait_ready(dev); pio_write_8(&dev->regs->data, i8042_KBD_IE | i8042_KBD_TRANSLATE | i8042_AUX_IE); return EOK; error: if (kbd_bound) ddf_fun_unbind(dev->kbd_fun); if (aux_bound) ddf_fun_unbind(dev->aux_fun); if (dev->kbd_fun != NULL) ddf_fun_destroy(dev->kbd_fun); if (dev->aux_fun != NULL) ddf_fun_destroy(dev->aux_fun); return rc; }
void setup_magnet() { pio_enable(MAGNET_PIO); pio_set_direction(MAGNET_PIO, GPIO_OUT); }