void sec_util_force_entering_fastboot_mode(void){
    u32 addr = CFG_UBOOT_MEMADDR;
    blkdev_t *bootdev;

    g_boot_mode = FASTBOOT;
    platform_set_boot_args();
    bldr_jump(addr, &bootarg, sizeof(boot_arg_t));
       
error:   
    print("error on jumping to fastboot mode\n");
    while(1);
}
Exemplo n.º 2
0
void platform_post_init(void)
{
    struct ram_console_buffer *ram_console;

#if CFG_BATTERY_DETECT
    /* normal boot to check battery exists or not */
    if (g_boot_mode == NORMAL_BOOT && !hw_check_battery() && usb_accessory_in()) {
        print("%s Wait for battery inserted...\n", MOD);
        /* disable pmic pre-charging led */
        pl_close_pre_chr_led();
        /* enable force charging mode */
        pl_charging(1);
        do {
            mdelay(300);
            /* check battery exists or not */
            if (hw_check_battery())
                break;
            /* kick all watchdogs */
            platform_wdt_all_kick();
        } while(1);
        /* disable force charging mode */
        pl_charging(0);
    }
#endif

#if !CFG_FPGA_PLATFORM
    /* security check */
    sec_lib_read_secro();
    sec_boot_check();
    device_APC_dom_setup();
#endif

#if CFG_MDJTAG_SWITCH 
    unsigned int md_pwr_con;

    /* md0 default power on and clock on */
    /* md1 default power on and clock off */

    /* ungate md1 */
    /* rst_b = 0 */
    md_pwr_con = DRV_Reg32(0x10006280);
    md_pwr_con &= ~0x1;
    DRV_WriteReg32(0x10006280, md_pwr_con);

    /* enable clksq2 for md1 */
    DRV_WriteReg32(0x10209000, 0x00001137);
    udelay(200);
    DRV_WriteReg32(0x10209000, 0x0000113f);

    /* rst_b = 1 */
    md_pwr_con = DRV_Reg32(0x10006280);
    md_pwr_con |= 0x1;
    DRV_WriteReg32(0x10006280, md_pwr_con);

    /* switch to MD legacy JTAG */
    /* this step is not essentially required */
#endif

#if CFG_MDMETA_DETECT 
    if (g_boot_mode == META_BOOT || g_boot_mode == ADVMETA_BOOT) {
	/* trigger md0 to enter meta mode */
        DRV_WriteReg32(0x20000010, 0x1);
	/* trigger md1 to enter meta mode */
        DRV_WriteReg32(0x30000010, 0x1);
    } else {
	/* md0 does not enter meta mode */
        DRV_WriteReg32(0x20000010, 0x0);
	/* md1 does not enter meta mode */
        DRV_WriteReg32(0x30000010, 0x0);
    }
#endif

#if CFG_RAM_CONSOLE
    ram_console = (struct ram_console_buffer *)RAM_CONSOLE_ADDR;

    if (ram_console->sig == RAM_CONSOLE_SIG) {
        print("%s ram_console->start=0x%x\n", MOD, ram_console->start);
        if (ram_console->start > RAM_CONSOLE_MAX_SIZE)
            ram_console->start = 0;

		ram_console->hw_status = g_rgu_status;

        print("%s ram_console(0x%x)=0x%x (boot reason)\n", MOD, 
            ram_console->hw_status, g_rgu_status);
		    }
#endif

    platform_set_boot_args();

    /* post init pll */
    mt_pll_post_init();
}