void RX_PIN_WAKEUP_handler(void *arg)
{
(void)arg;
platform_uart_driver_t* driver = arg;
uint32_t uart_number;
platform_gpio_enable_clock( driver->peripheral->pin_rx );
uart_number = platform_uart_get_port_number( driver->peripheral->port );
uart_peripheral_clock_functions[ uart_number ]( uart_peripheral_clocks[ uart_number ], ENABLE );
/* Enable DMA peripheral clock */
if ( driver->peripheral->tx_dma_config.controller == DMA1 )
{
RCC->AHB1ENR |= RCC_AHB1Periph_DMA1;
}
else
{
RCC->AHB1ENR |= RCC_AHB1Periph_DMA2;
}
platform_gpio_irq_disable( driver->peripheral->pin_rx );
platform_mcu_powersave_disable( );
mico_rtos_set_semaphore( &driver->sem_wakeup );
}
OSStatus platform_uart_deinit( platform_uart_driver_t* driver )
{
uint8_t uart_number;
OSStatus err = kNoErr;
platform_mcu_powersave_disable();
require_action_quiet( ( driver != NULL ), exit, err = kParamErr);
uart_number = platform_uart_get_port_number( driver->peripheral->port );
/* Disable USART */
USART_Cmd( driver->peripheral->port, DISABLE );
/* Deinitialise USART */
USART_DeInit( driver->peripheral->port );
/**************************************************************************
* De-initialise STM32 DMA and interrupt
**************************************************************************/
/* Deinitialise DMA streams */
DMA_DeInit( driver->peripheral->tx_dma_config.stream );
DMA_DeInit( driver->peripheral->rx_dma_config.stream );
/* Disable TC (transfer complete) interrupt at the source */
DMA_ITConfig( driver->peripheral->tx_dma_config.stream, DMA_INTERRUPT_FLAGS, DISABLE );
DMA_ITConfig( driver->peripheral->rx_dma_config.stream, DMA_INTERRUPT_FLAGS, DISABLE );
/* Disable transmit DMA interrupt at Cortex-M3 */
NVIC_DisableIRQ( driver->peripheral->tx_dma_config.irq_vector );
/**************************************************************************
* De-initialise STM32 USART interrupt
**************************************************************************/
USART_ITConfig( driver->peripheral->port, USART_IT_RXNE, DISABLE );
/* Disable UART interrupt vector on Cortex-M3 */
NVIC_DisableIRQ( driver->peripheral->rx_dma_config.irq_vector );
/* Disable registers clocks */
uart_peripheral_clock_functions[uart_number]( uart_peripheral_clocks[uart_number], DISABLE );
mico_rtos_deinit_semaphore( &driver->rx_complete );
mico_rtos_deinit_semaphore( &driver->tx_complete );
mico_rtos_deinit_mutex( &driver->tx_mutex );
driver->rx_size = 0;
driver->tx_size = 0;
driver->last_transmit_result = kNoErr;
driver->last_receive_result = kNoErr;
driver->initialized = false;
exit:
platform_mcu_powersave_enable();
return err;
}
OSStatus platform_uart_init( platform_uart_driver_t* driver, const platform_uart_t* peripheral, const platform_uart_config_t* config, ring_buffer_t* optional_ring_buffer )
{
DMA_InitTypeDef dma_init_structure;
USART_InitTypeDef uart_init_structure;
uint32_t uart_number;
OSStatus err = kNoErr;
platform_mcu_powersave_disable();
require_action_quiet( ( driver != NULL ) && ( peripheral != NULL ) && ( config != NULL ), exit, err = kParamErr);
require_action_quiet( (optional_ring_buffer == NULL) || ((optional_ring_buffer->buffer != NULL ) && (optional_ring_buffer->size != 0)), exit, err = kParamErr);
uart_number = platform_uart_get_port_number( peripheral->port );
driver->rx_size = 0;
driver->tx_size = 0;
driver->last_transmit_result = kNoErr;
driver->last_receive_result = kNoErr;
driver->peripheral = (platform_uart_t*)peripheral;
#ifndef NO_MICO_RTOS
mico_rtos_init_semaphore( &driver->tx_complete, 1 );
mico_rtos_init_semaphore( &driver->rx_complete, 1 );
mico_rtos_init_semaphore( &driver->sem_wakeup, 1 );
mico_rtos_init_mutex ( &driver->tx_mutex );
#else
driver->tx_complete = false;
driver->rx_complete = false;
#endif
/* Configure TX and RX pin_mapping */
platform_gpio_set_alternate_function( peripheral->pin_tx->port, peripheral->pin_tx->pin_number, GPIO_OType_PP, GPIO_PuPd_NOPULL, uart_alternate_functions[ uart_number ] );
platform_gpio_set_alternate_function( peripheral->pin_rx->port, peripheral->pin_rx->pin_number, GPIO_OType_PP, GPIO_PuPd_NOPULL, uart_alternate_functions[ uart_number ] );
if ( ( peripheral->pin_cts != NULL ) && ( config->flow_control == FLOW_CONTROL_CTS || config->flow_control == FLOW_CONTROL_CTS_RTS ) )
{
platform_gpio_set_alternate_function( peripheral->pin_cts->port, peripheral->pin_cts->pin_number, GPIO_OType_PP, GPIO_PuPd_NOPULL, uart_alternate_functions[ uart_number ] );
}
if ( ( peripheral->pin_rts != NULL ) && ( config->flow_control == FLOW_CONTROL_RTS || config->flow_control == FLOW_CONTROL_CTS_RTS ) )
{
platform_gpio_set_alternate_function( peripheral->pin_rts->port, peripheral->pin_rts->pin_number, GPIO_OType_PP, GPIO_PuPd_NOPULL, uart_alternate_functions[ uart_number ] );
}
#ifndef NO_MICO_RTOS
if(config->flags & UART_WAKEUP_ENABLE) {
mico_rtos_init_semaphore( driver->sem_wakeup, 1 );
mico_rtos_create_thread(NULL, MICO_APPLICATION_PRIORITY, "UART_WAKEUP", thread_wakeup, 0x100, driver);
}
#endif
/* Enable UART peripheral clock */
uart_peripheral_clock_functions[ uart_number ]( uart_peripheral_clocks[ uart_number ], ENABLE );
uart_init_structure.USART_Mode = USART_Mode_Rx | USART_Mode_Tx;
uart_init_structure.USART_BaudRate = config->baud_rate;
uart_init_structure.USART_WordLength = ( ( config->data_width == DATA_WIDTH_9BIT ) || ( ( config->data_width == DATA_WIDTH_8BIT ) && ( config->parity != NO_PARITY ) ) ) ? USART_WordLength_9b : USART_WordLength_8b;
uart_init_structure.USART_StopBits = ( config->stop_bits == STOP_BITS_1 ) ? USART_StopBits_1 : USART_StopBits_2;
switch ( config->parity )
{
case NO_PARITY:
uart_init_structure.USART_Parity = USART_Parity_No;
break;
case EVEN_PARITY:
uart_init_structure.USART_Parity = USART_Parity_Even;
break;
case ODD_PARITY:
uart_init_structure.USART_Parity = USART_Parity_Odd;
break;
default:
err = kParamErr;
goto exit;
}
switch ( config->flow_control )
{
case FLOW_CONTROL_DISABLED:
uart_init_structure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
break;
case FLOW_CONTROL_CTS:
uart_init_structure.USART_HardwareFlowControl = USART_HardwareFlowControl_CTS;
break;
case FLOW_CONTROL_RTS:
uart_init_structure.USART_HardwareFlowControl = USART_HardwareFlowControl_RTS;
break;
case FLOW_CONTROL_CTS_RTS:
uart_init_structure.USART_HardwareFlowControl = USART_HardwareFlowControl_RTS_CTS;
break;
default:
err = kParamErr;
goto exit;
}
/* Initialise USART peripheral */
USART_DeInit( peripheral->port );
USART_Init( peripheral->port, &uart_init_structure );
/**************************************************************************
* Initialise STM32 DMA registers
* Note: If DMA is used, USART interrupt isn't enabled.
**************************************************************************/
/* Enable DMA peripheral clock */
if ( peripheral->tx_dma_config.controller == DMA1 )
{
RCC->AHB1ENR |= RCC_AHB1Periph_DMA1;
}
else
{
RCC->AHB1ENR |= RCC_AHB1Periph_DMA2;
}
/* Fill init structure with common DMA settings */
dma_init_structure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
dma_init_structure.DMA_MemoryInc = DMA_MemoryInc_Enable;
dma_init_structure.DMA_Priority = DMA_Priority_VeryHigh;
dma_init_structure.DMA_FIFOMode = DMA_FIFOMode_Disable;
dma_init_structure.DMA_FIFOThreshold = DMA_FIFOThreshold_Full;
dma_init_structure.DMA_MemoryBurst = DMA_MemoryBurst_Single;
dma_init_structure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
if ( config->data_width == DATA_WIDTH_9BIT )
{
dma_init_structure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
dma_init_structure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
}
else
{
dma_init_structure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
dma_init_structure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
}
/* Initialise TX DMA */
DMA_DeInit( peripheral->tx_dma_config.stream );
dma_init_structure.DMA_Channel = peripheral->tx_dma_config.channel;
dma_init_structure.DMA_PeripheralBaseAddr = (uint32_t) &peripheral->port->DR;
dma_init_structure.DMA_Memory0BaseAddr = (uint32_t) 0;
dma_init_structure.DMA_DIR = DMA_DIR_MemoryToPeripheral;
dma_init_structure.DMA_BufferSize = 0xFFFF; // This parameter will be configured during communication
dma_init_structure.DMA_Mode = DMA_Mode_Normal;
DMA_Init( peripheral->tx_dma_config.stream, &dma_init_structure );
/* Initialise RX DMA */
DMA_DeInit( peripheral->rx_dma_config.stream );
dma_init_structure.DMA_Channel = peripheral->rx_dma_config.channel;
dma_init_structure.DMA_PeripheralBaseAddr = (uint32_t) &peripheral->port->DR;
dma_init_structure.DMA_Memory0BaseAddr = (uint32_t) 0;
dma_init_structure.DMA_DIR = DMA_DIR_PeripheralToMemory;
dma_init_structure.DMA_BufferSize = 0xFFFF; // This parameter will be configured during communication
dma_init_structure.DMA_Mode = DMA_Mode_Normal;
DMA_Init( peripheral->rx_dma_config.stream, &dma_init_structure );
/**************************************************************************
* Initialise STM32 DMA interrupts
**************************************************************************/
/* Configure TX DMA interrupt on Cortex-M3 */
NVIC_EnableIRQ( peripheral->tx_dma_config.irq_vector );
/* Enable TC (transfer complete) and TE (transfer error) interrupts on source */
clear_dma_interrupts( peripheral->tx_dma_config.stream, peripheral->tx_dma_config.complete_flags | peripheral->tx_dma_config.error_flags );
DMA_ITConfig( peripheral->tx_dma_config.stream, DMA_INTERRUPT_FLAGS, ENABLE );
/* Enable USART interrupt vector in Cortex-M3 */
NVIC_EnableIRQ( uart_irq_vectors[uart_number] );
USART_DMACmd( driver->peripheral->port, USART_DMAReq_Tx, DISABLE );
/* Enable USART */
USART_Cmd( peripheral->port, ENABLE );
/* Enable both transmit and receive */
peripheral->port->CR1 |= USART_CR1_TE;
peripheral->port->CR1 |= USART_CR1_RE;
/* Setup ring buffer */
if ( optional_ring_buffer != NULL )
{
/* Note that the ring_buffer should've been initialised first */
driver->rx_buffer = optional_ring_buffer;
driver->rx_size = 0;
receive_bytes( driver, optional_ring_buffer->buffer, optional_ring_buffer->size, 0 );
}
else
{
/* Not using ring buffer. Configure RX DMA interrupt on Cortex-M3 */
NVIC_EnableIRQ( peripheral->rx_dma_config.irq_vector );
/* Enable TC (transfer complete) and TE (transfer error) interrupts on source */
clear_dma_interrupts( peripheral->rx_dma_config.stream, peripheral->rx_dma_config.complete_flags | peripheral->rx_dma_config.error_flags );
DMA_ITConfig( peripheral->rx_dma_config.stream, DMA_INTERRUPT_FLAGS, ENABLE );
}
exit:
MicoMcuPowerSaveConfig(true);
return err;
}
platform_result_t platform_uart_init( platform_uart_driver_t* driver, const platform_uart_t* interface, const platform_uart_config_t* config, wiced_ring_buffer_t* optional_ring_buffer )
{
uint32_t uart_number;
UART_FIFO_CFG_T UARTFIFOConfigStruct;
config_uart_data_t config_uart_data;
wiced_assert( "bad argument", ( driver != NULL ) && ( interface != NULL ) && ( config != NULL ) );
Chip_Clock_EnablePeriphClock( SYSCTL_CLOCK_UART0 );
uart_number = platform_uart_get_port_number(interface->uart_base);
driver->rx_size = 0;
driver->tx_size = 0;
driver->last_transmit_result = PLATFORM_SUCCESS;
driver->last_receive_result = PLATFORM_SUCCESS;
driver->interface = (platform_uart_t*)interface;
host_rtos_init_semaphore( &driver->tx_complete );
host_rtos_init_semaphore( &driver->rx_complete );
platform_gpio_set_alternate_function( &driver->interface->tx_pin);
platform_gpio_set_alternate_function( &driver->interface->rx_pin);
/* Initialise USART peripheral */
Chip_UART_FIFOConfigStructInit( driver->interface->uart_base, &UARTFIFOConfigStruct );
Chip_UART_Init( driver->interface->uart_base );
Chip_UART_SetBaud( driver->interface->uart_base, config->baud_rate );
config_uart_data.databits = ( ( config->data_width == DATA_WIDTH_8BIT ) || ( ( config->data_width == DATA_WIDTH_7BIT ) && ( config->parity != NO_PARITY ) ) ) ? UART_DATABIT_8 : UART_DATABIT_7;
config_uart_data.stopbits = ( config->stop_bits == STOP_BITS_1 ) ? UART_STOPBIT_1 : UART_STOPBIT_2;
switch ( config->parity )
{
case NO_PARITY:
config_uart_data.parity = UART_PARITY_NONE;
break;
case EVEN_PARITY:
config_uart_data.parity = UART_PARITY_EVEN;
break;
case ODD_PARITY:
config_uart_data.parity = UART_PARITY_ODD;
break;
default:
return WICED_BADARG;
}
Chip_UART_ConfigData( driver->interface->uart_base, config_uart_data.databits, config_uart_data.parity, config_uart_data.stopbits );
Chip_UART_TxCmd( driver->interface->uart_base, ENABLE );
/* Enable receive data and line status interrupt */
/* Initialize FIFO for UART0 peripheral */
Chip_UART_FIFOConfig( driver->interface->uart_base, &UARTFIFOConfigStruct );
/* Enable UART Rx interrupt */
Chip_UART_IntConfig( driver->interface->uart_base, UART_INTCFG_RBR, ENABLE );
/* Enable UART line status interrupt */
Chip_UART_IntConfig( driver->interface->uart_base, UART_INTCFG_RLS, ENABLE );
/* Enable Interrupt for UART channel */
NVIC_DisableIRQ( uart_irq_vectors[ uart_number ] );
NVIC_ClearPendingIRQ( uart_irq_vectors[ uart_number ] );
/*Note the LPC uses 5 bits for interrupt priority levels*/
NVIC_EnableIRQ( uart_irq_vectors[ uart_number ] );
if ( optional_ring_buffer != NULL )
{
/* Note that the ring_buffer should've been initialised first */
driver->rx_buffer = optional_ring_buffer;
driver->rx_size = 0;
}
return PLATFORM_SUCCESS;
}