static int __devinit sdhci_sprd_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct sdhci_host *host;
struct resource *res;
int ret, irq;
#ifdef CONFIG_MMC_CARD_HOTPLUG
int sd_detect_gpio;
int *sd_detect;
int detect_irq;
#endif
struct sprd_host_data *host_data;
irq = platform_get_irq(pdev, 0);
if (irq < 0) {
dev_err(dev, "no irq specified\n");
return irq;
}
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
dev_err(dev, "no memory specified\n");
return -ENOENT;
}
host = sdhci_alloc_host(dev, sizeof(struct sprd_host_data));
if (IS_ERR(host)) {
dev_err(dev, "sdhci_alloc_host() failed\n");
return PTR_ERR(host);
}
host_data = sdhci_priv(host);
host_data->clk_enable = 1;
platform_set_drvdata(pdev, host);
host->vmmc = NULL;
host->ioaddr = (void __iomem *)res->start;
pr_debug("sdio: host->ioaddr:0x%x\n", (unsigned int)host->ioaddr);
if (0 == pdev->id){
host->hw_name = "Spread SDIO host0";
}else if(1 == pdev->id){
host->hw_name = "Spread SDIO host1";
}
else if(2 == pdev->id){
host->hw_name = "Spread SDIO host2";
}
else if(3 == pdev->id){
host->hw_name = "Spread EMMC host0";
host->mmc->caps |= MMC_CAP_8_BIT_DATA /*| MMC_CAP_1_8V_DDR*/;
}
host->ops = &sdhci_sprd_ops;
/*
* SC8810G don't have timeout value and cann't find card
*insert, write protection...
* too sad
*/
host->quirks = SDHCI_QUIRK_BROKEN_TIMEOUT_VAL |\
SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK |\
SDHCI_QUIRK_BROKEN_CARD_DETECTION|\
SDHCI_QUIRK_INVERTED_WRITE_PROTECT;
host->irq = irq;
#ifdef CONFIG_MMC_CARD_HOTPLUG
gpio_detect = 777;
sd_detect = dev_get_platdata(dev);
if(sd_detect && (*sd_detect > 0)){
sd_detect_gpio = *sd_detect;
pr_info("%s, sd_detect_gpio:%d\n", __func__, sd_detect_gpio);
if (0 == pdev->id){
ret = gpio_request(sd_detect_gpio, "sdio0_detect");
}else{
ret = gpio_request(sd_detect_gpio, "sdio1_detect");
}
gpio_export( sd_detect_gpio, 1);
if (ret) {
dev_err(dev, "cannot request gpio\n");
return -1;
}
ret = gpio_direction_input(sd_detect_gpio);
if (ret) {
dev_err(dev, "gpio can not change to input\n");
return -1;
}
detect_irq = gpio_to_irq(sd_detect_gpio);
if (detect_irq < 0){
dev_err(dev, "cannot alloc detect irq\n");
return -1;
}
gpio_detect = sd_detect_gpio;
host_data->detect_irq = detect_irq;
}else{
printk("%s, sd_detect_gpio == 0 \n", __func__ );
}
#endif
if (sd_detection_cmd_dev == NULL)
{
sd_detection_cmd_dev = device_create(sec_class, NULL, 0, NULL, "sdcard");
if (IS_ERR(sd_detection_cmd_dev))
pr_err("Fail to create sysfs dev\n");
if (device_create_file(sd_detection_cmd_dev,&dev_attr_status) < 0)
pr_err("Fail to create sysfs file\n");
}
host->clk = NULL;
sdhci_module_init(host);
host->mmc->caps |= MMC_CAP_HW_RESET;
host->mmc->pm_flags |= MMC_PM_IGNORE_PM_NOTIFY;
host->mmc->pm_caps |= (MMC_PM_KEEP_POWER | MMC_PM_WAKE_SDIO_IRQ);
#ifdef CONFIG_MACH_KYLEW
if(pdev->id == 1){
host->mmc->pm_caps |= MMC_CAP_NONREMOVABLE;
pm_runtime_disable(&(pdev)->dev); /* temprarily disable runtime case because of error arising when turn on*/
} else if(pdev->id == 0) {
host->mmc->pm_flags |= MMC_PM_KEEP_POWER;
pm_runtime_disable(&(pdev)->dev);
}
#elif defined (CONFIG_ARCH_SC7710)
if(pdev->id == 1){
host->mmc->pm_caps |= MMC_CAP_NONREMOVABLE;
// pm_runtime_disable(&(pdev)->dev);
} else if(pdev->id == 2) {
host->mmc->pm_flags |= MMC_PM_KEEP_POWER;
// pm_runtime_disable(&(pdev)->dev);
}
#elif defined (CONFIG_MACH_SP7702)
if(pdev->id == 1){
host->mmc->pm_flags |= MMC_PM_KEEP_POWER;
pm_runtime_disable(&(pdev)->dev);
}
#else
if(pdev->id == 1){
host->mmc->pm_caps |= MMC_CAP_NONREMOVABLE;
}
switch(pdev->id) {
case 1://eMMC
host->mmc->pm_flags |= MMC_PM_IGNORE_PM_NOTIFY ;//| MMC_PM_KEEP_POWER;
host->mmc->caps |= MMC_CAP_NONREMOVABLE | MMC_CAP_1_8V_DDR;
break;
case 0://SD
host->mmc->pm_flags |= MMC_PM_IGNORE_PM_NOTIFY;
break;
default:
break;
}
#endif
ret = sdhci_add_host(host);
if (ret) {
dev_err(dev, "sdhci_add_host() failed\n");
goto err_add_host;
}
#if defined(CONFIG_MACH_KYLEW) || defined(CONFIG_MACH_SP7702)|| defined(CONFIG_MACH_MINT)
sdhci_sprd_fix_controller_1p8v(host);
#endif
#ifdef CONFIG_MMC_BUS_SCAN
if (pdev->id == 1)
sdhci_host_g = host;
#endif
#ifdef CONFIG_PM_RUNTIME
switch(pdev->id) {
case 1:
case 0:
pm_suspend_ignore_children(&pdev->dev, true);
pm_runtime_set_active(&pdev->dev);
pm_runtime_set_autosuspend_delay(&pdev->dev, 500);
pm_runtime_use_autosuspend(&pdev->dev);
pm_runtime_enable(&pdev->dev);
default:
break;
}
#endif
return 0;
err_add_host:
#ifdef CONFIG_PM_RUNTIME
pm_runtime_disable(&(pdev)->dev);
pm_runtime_set_suspended(&(pdev)->dev);
#endif
if (host_data->clk_enable) {
clk_disable(host->clk);
host_data->clk_enable = 0;
}
sdhci_free_host(host);
return ret;
}
/**
* ufshcd_pltfrm_init - probe routine of the driver
* @pdev: pointer to Platform device handle
* @vops: pointer to variant ops
*
* Returns 0 on success, non-zero value on failure
*/
int ufshcd_pltfrm_init(struct platform_device *pdev,
struct ufs_hba_variant_ops *vops)
{
struct ufs_hba *hba;
void __iomem *mmio_base;
struct resource *mem_res;
int irq, err;
struct device *dev = &pdev->dev;
mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
mmio_base = devm_ioremap_resource(dev, mem_res);
if (IS_ERR(*(void **)&mmio_base)) {
err = PTR_ERR(*(void **)&mmio_base);
goto out;
}
irq = platform_get_irq(pdev, 0);
if (irq < 0) {
dev_err(dev, "IRQ resource not available\n");
err = -ENODEV;
goto out;
}
err = ufshcd_alloc_host(dev, &hba);
if (err) {
dev_err(&pdev->dev, "Allocation failed\n");
goto out;
}
hba->vops = vops;
err = ufshcd_parse_clock_info(hba);
if (err) {
dev_err(&pdev->dev, "%s: clock parse failed %d\n",
__func__, err);
goto dealloc_host;
}
err = ufshcd_parse_regulator_info(hba);
if (err) {
dev_err(&pdev->dev, "%s: regulator init failed %d\n",
__func__, err);
goto dealloc_host;
}
pm_runtime_set_active(&pdev->dev);
pm_runtime_enable(&pdev->dev);
ufshcd_init_lanes_per_dir(hba);
err = ufshcd_init(hba, mmio_base, irq);
if (err) {
dev_err(dev, "Initialization failed\n");
goto out_disable_rpm;
}
platform_set_drvdata(pdev, hba);
return 0;
out_disable_rpm:
pm_runtime_disable(&pdev->dev);
pm_runtime_set_suspended(&pdev->dev);
dealloc_host:
ufshcd_dealloc_host(hba);
out:
return err;
}
static int __devinit pm8058_othc_probe(struct platform_device *pd)
{
int rc;
struct pm8058_othc *dd;
struct pm8058_chip *chip;
struct resource *res;
struct pmic8058_othc_config_pdata *pdata = pd->dev.platform_data;
chip = platform_get_drvdata(pd);
if (chip == NULL) {
pr_err("%s: Invalid driver information \n", __func__);
return -EINVAL;
}
/* Check PMIC8058 version. A0 version is not supported */
if (pm8058_rev(chip) == PM_8058_REV_1p0) {
pr_err("%s: PMIC8058 version not supported \n", __func__);
return -ENODEV;
}
if (pdata == NULL) {
pr_err("%s: Platform data not present \n", __func__);
return -EINVAL;
}
dd = kzalloc(sizeof(*dd), GFP_KERNEL);
if (dd == NULL) {
pr_err("%s: Unable to allocate memory \n", __func__);
return -ENOMEM;
}
/* Enable runtime PM ops, start in ACTIVE mode */
rc = pm_runtime_set_active(&pd->dev);
if (rc < 0)
dev_dbg(&pd->dev, "unable to set runtime pm state\n");
pm_runtime_enable(&pd->dev);
res = platform_get_resource_byname(pd, IORESOURCE_IO, "othc_base");
if (res == NULL) {
pr_err("%s: othc resource:Base address absent \n", __func__);
rc = -ENXIO;
goto fail_get_res;
}
dd->othc_pdata = pdata;
dd->pm_chip = chip;
dd->othc_base = res->start;
if (pdata->micbias_capability == OTHC_MICBIAS_HSED) {
/* HSED to be supported on this MICBIAS line */
if (pdata->hsed_config != NULL) {
rc = othc_configure_hsed(dd, pd);
if (rc < 0)
goto fail_get_res;
} else {
pr_err("%s: HSED config data not present\n", __func__);
rc = -EINVAL;
goto fail_get_res;
}
}
/* Store the local driver data structure */
if (dd->othc_pdata->micbias_select < OTHC_MICBIAS_MAX)
config[dd->othc_pdata->micbias_select] = dd;
platform_set_drvdata(pd, dd);
pr_debug("%s: Device %s:%d successfully registered\n",
__func__, pd->name, pd->id);
return 0;
fail_get_res:
pm_runtime_set_suspended(&pd->dev);
pm_runtime_disable(&pd->dev);
kfree(dd);
return rc;
}
/**
* cdns_spi_probe - Probe method for the SPI driver
* @pdev: Pointer to the platform_device structure
*
* This function initializes the driver data structures and the hardware.
*
* Return: 0 on success and error value on error
*/
static int cdns_spi_probe(struct platform_device *pdev)
{
int ret = 0, irq;
struct spi_master *master;
struct cdns_spi *xspi;
struct resource *res;
u32 num_cs;
master = spi_alloc_master(&pdev->dev, sizeof(*xspi));
if (!master)
return -ENOMEM;
xspi = spi_master_get_devdata(master);
master->dev.of_node = pdev->dev.of_node;
platform_set_drvdata(pdev, master);
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
xspi->regs = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(xspi->regs)) {
ret = PTR_ERR(xspi->regs);
goto remove_master;
}
xspi->pclk = devm_clk_get(&pdev->dev, "pclk");
if (IS_ERR(xspi->pclk)) {
dev_err(&pdev->dev, "pclk clock not found.\n");
ret = PTR_ERR(xspi->pclk);
goto remove_master;
}
xspi->ref_clk = devm_clk_get(&pdev->dev, "ref_clk");
if (IS_ERR(xspi->ref_clk)) {
dev_err(&pdev->dev, "ref_clk clock not found.\n");
ret = PTR_ERR(xspi->ref_clk);
goto remove_master;
}
ret = clk_prepare_enable(xspi->pclk);
if (ret) {
dev_err(&pdev->dev, "Unable to enable APB clock.\n");
goto remove_master;
}
ret = clk_prepare_enable(xspi->ref_clk);
if (ret) {
dev_err(&pdev->dev, "Unable to enable device clock.\n");
goto clk_dis_apb;
}
ret = of_property_read_u32(pdev->dev.of_node, "num-cs", &num_cs);
if (ret < 0)
master->num_chipselect = CDNS_SPI_DEFAULT_NUM_CS;
else
master->num_chipselect = num_cs;
ret = of_property_read_u32(pdev->dev.of_node, "is-decoded-cs",
&xspi->is_decoded_cs);
if (ret < 0)
xspi->is_decoded_cs = 0;
/* SPI controller initializations */
cdns_spi_init_hw(xspi);
pm_runtime_set_active(&pdev->dev);
pm_runtime_enable(&pdev->dev);
pm_runtime_use_autosuspend(&pdev->dev);
pm_runtime_set_autosuspend_delay(&pdev->dev, SPI_AUTOSUSPEND_TIMEOUT);
irq = platform_get_irq(pdev, 0);
if (irq <= 0) {
ret = -ENXIO;
dev_err(&pdev->dev, "irq number is invalid\n");
goto clk_dis_all;
}
ret = devm_request_irq(&pdev->dev, irq, cdns_spi_irq,
0, pdev->name, master);
if (ret != 0) {
ret = -ENXIO;
dev_err(&pdev->dev, "request_irq failed\n");
goto clk_dis_all;
}
master->use_gpio_descriptors = true;
master->prepare_transfer_hardware = cdns_prepare_transfer_hardware;
master->prepare_message = cdns_prepare_message;
master->transfer_one = cdns_transfer_one;
master->unprepare_transfer_hardware = cdns_unprepare_transfer_hardware;
master->set_cs = cdns_spi_chipselect;
master->auto_runtime_pm = true;
master->mode_bits = SPI_CPOL | SPI_CPHA;
/* Set to default valid value */
master->max_speed_hz = clk_get_rate(xspi->ref_clk) / 4;
xspi->speed_hz = master->max_speed_hz;
master->bits_per_word_mask = SPI_BPW_MASK(8);
ret = spi_register_master(master);
if (ret) {
dev_err(&pdev->dev, "spi_register_master failed\n");
goto clk_dis_all;
}
return ret;
clk_dis_all:
pm_runtime_set_suspended(&pdev->dev);
pm_runtime_disable(&pdev->dev);
clk_disable_unprepare(xspi->ref_clk);
clk_dis_apb:
clk_disable_unprepare(xspi->pclk);
remove_master:
spi_master_put(master);
return ret;
}
static int sdhci_msm_probe(struct platform_device *pdev)
{
struct sdhci_host *host;
struct sdhci_pltfm_host *pltfm_host;
struct sdhci_msm_host *msm_host;
struct resource *core_memres;
int ret;
u16 host_version, core_minor;
u32 core_version, config;
u8 core_major;
host = sdhci_pltfm_init(pdev, &sdhci_msm_pdata, sizeof(*msm_host));
if (IS_ERR(host))
return PTR_ERR(host);
pltfm_host = sdhci_priv(host);
msm_host = sdhci_pltfm_priv(pltfm_host);
msm_host->mmc = host->mmc;
msm_host->pdev = pdev;
ret = mmc_of_parse(host->mmc);
if (ret)
goto pltfm_free;
sdhci_get_of_property(pdev);
msm_host->saved_tuning_phase = INVALID_TUNING_PHASE;
/* Setup SDCC bus voter clock. */
msm_host->bus_clk = devm_clk_get(&pdev->dev, "bus");
if (!IS_ERR(msm_host->bus_clk)) {
/* Vote for max. clk rate for max. performance */
ret = clk_set_rate(msm_host->bus_clk, INT_MAX);
if (ret)
goto pltfm_free;
ret = clk_prepare_enable(msm_host->bus_clk);
if (ret)
goto pltfm_free;
}
/* Setup main peripheral bus clock */
msm_host->pclk = devm_clk_get(&pdev->dev, "iface");
if (IS_ERR(msm_host->pclk)) {
ret = PTR_ERR(msm_host->pclk);
dev_err(&pdev->dev, "Peripheral clk setup failed (%d)\n", ret);
goto bus_clk_disable;
}
ret = clk_prepare_enable(msm_host->pclk);
if (ret)
goto bus_clk_disable;
/* Setup SDC MMC clock */
msm_host->clk = devm_clk_get(&pdev->dev, "core");
if (IS_ERR(msm_host->clk)) {
ret = PTR_ERR(msm_host->clk);
dev_err(&pdev->dev, "SDC MMC clk setup failed (%d)\n", ret);
goto pclk_disable;
}
/*
* xo clock is needed for FLL feature of cm_dll.
* In case if xo clock is not mentioned in DT, warn and proceed.
*/
msm_host->xo_clk = devm_clk_get(&pdev->dev, "xo");
if (IS_ERR(msm_host->xo_clk)) {
ret = PTR_ERR(msm_host->xo_clk);
dev_warn(&pdev->dev, "TCXO clk not present (%d)\n", ret);
}
/* Vote for maximum clock rate for maximum performance */
ret = clk_set_rate(msm_host->clk, INT_MAX);
if (ret)
dev_warn(&pdev->dev, "core clock boost failed\n");
ret = clk_prepare_enable(msm_host->clk);
if (ret)
goto pclk_disable;
core_memres = platform_get_resource(pdev, IORESOURCE_MEM, 1);
msm_host->core_mem = devm_ioremap_resource(&pdev->dev, core_memres);
if (IS_ERR(msm_host->core_mem)) {
dev_err(&pdev->dev, "Failed to remap registers\n");
ret = PTR_ERR(msm_host->core_mem);
goto clk_disable;
}
/* Reset the vendor spec register to power on reset state */
writel_relaxed(CORE_VENDOR_SPEC_POR_VAL,
host->ioaddr + CORE_VENDOR_SPEC);
/* Set HC_MODE_EN bit in HC_MODE register */
writel_relaxed(HC_MODE_EN, (msm_host->core_mem + CORE_HC_MODE));
config = readl_relaxed(msm_host->core_mem + CORE_HC_MODE);
config |= FF_CLK_SW_RST_DIS;
writel_relaxed(config, msm_host->core_mem + CORE_HC_MODE);
host_version = readw_relaxed((host->ioaddr + SDHCI_HOST_VERSION));
dev_dbg(&pdev->dev, "Host Version: 0x%x Vendor Version 0x%x\n",
host_version, ((host_version & SDHCI_VENDOR_VER_MASK) >>
SDHCI_VENDOR_VER_SHIFT));
core_version = readl_relaxed(msm_host->core_mem + CORE_MCI_VERSION);
core_major = (core_version & CORE_VERSION_MAJOR_MASK) >>
CORE_VERSION_MAJOR_SHIFT;
core_minor = core_version & CORE_VERSION_MINOR_MASK;
dev_dbg(&pdev->dev, "MCI Version: 0x%08x, major: 0x%04x, minor: 0x%02x\n",
core_version, core_major, core_minor);
if (core_major == 1 && core_minor >= 0x42)
msm_host->use_14lpp_dll_reset = true;
/*
* SDCC 5 controller with major version 1, minor version 0x34 and later
* with HS 400 mode support will use CM DLL instead of CDC LP 533 DLL.
*/
if (core_major == 1 && core_minor < 0x34)
msm_host->use_cdclp533 = true;
/*
* Support for some capabilities is not advertised by newer
* controller versions and must be explicitly enabled.
*/
if (core_major >= 1 && core_minor != 0x11 && core_minor != 0x12) {
config = readl_relaxed(host->ioaddr + SDHCI_CAPABILITIES);
config |= SDHCI_CAN_VDD_300 | SDHCI_CAN_DO_8BIT;
writel_relaxed(config, host->ioaddr +
CORE_VENDOR_SPEC_CAPABILITIES0);
}
/* Setup IRQ for handling power/voltage tasks with PMIC */
msm_host->pwr_irq = platform_get_irq_byname(pdev, "pwr_irq");
if (msm_host->pwr_irq < 0) {
dev_err(&pdev->dev, "Get pwr_irq failed (%d)\n",
msm_host->pwr_irq);
ret = msm_host->pwr_irq;
goto clk_disable;
}
ret = devm_request_threaded_irq(&pdev->dev, msm_host->pwr_irq, NULL,
sdhci_msm_pwr_irq, IRQF_ONESHOT,
dev_name(&pdev->dev), host);
if (ret) {
dev_err(&pdev->dev, "Request IRQ failed (%d)\n", ret);
goto clk_disable;
}
pm_runtime_get_noresume(&pdev->dev);
pm_runtime_set_active(&pdev->dev);
pm_runtime_enable(&pdev->dev);
pm_runtime_set_autosuspend_delay(&pdev->dev,
MSM_MMC_AUTOSUSPEND_DELAY_MS);
pm_runtime_use_autosuspend(&pdev->dev);
host->mmc_host_ops.execute_tuning = sdhci_msm_execute_tuning;
ret = sdhci_add_host(host);
if (ret)
goto pm_runtime_disable;
pm_runtime_mark_last_busy(&pdev->dev);
pm_runtime_put_autosuspend(&pdev->dev);
return 0;
pm_runtime_disable:
pm_runtime_disable(&pdev->dev);
pm_runtime_set_suspended(&pdev->dev);
pm_runtime_put_noidle(&pdev->dev);
clk_disable:
clk_disable_unprepare(msm_host->clk);
pclk_disable:
clk_disable_unprepare(msm_host->pclk);
bus_clk_disable:
if (!IS_ERR(msm_host->bus_clk))
clk_disable_unprepare(msm_host->bus_clk);
pltfm_free:
sdhci_pltfm_free(pdev);
return ret;
}
static int ehci_msm2_remove(struct platform_device *pdev)
{
struct usb_hcd *hcd = platform_get_drvdata(pdev);
struct msm_hcd *mhcd = hcd_to_mhcd(hcd);
struct pinctrl_state *set_state;
if (mhcd->pmic_gpio_dp_irq) {
if (mhcd->pmic_gpio_dp_irq_enabled)
disable_irq_wake(mhcd->pmic_gpio_dp_irq);
free_irq(mhcd->pmic_gpio_dp_irq, mhcd);
}
if (mhcd->async_irq) {
if (mhcd->async_irq_enabled)
disable_irq_wake(mhcd->async_irq);
free_irq(mhcd->async_irq, mhcd);
}
if (mhcd->wakeup_irq) {
if (mhcd->wakeup_irq_enabled)
disable_irq_wake(mhcd->wakeup_irq);
free_irq(mhcd->wakeup_irq, mhcd);
}
/* If the device was removed no need to call pm_runtime_disable */
if (pdev->dev.power.power_state.event != PM_EVENT_INVALID)
pm_runtime_disable(&pdev->dev);
device_init_wakeup(&pdev->dev, 0);
pm_runtime_set_suspended(&pdev->dev);
usb_remove_hcd(hcd);
if (hcd->phy)
usb_phy_shutdown(hcd->phy);
if (mhcd->xo_clk) {
clk_disable_unprepare(mhcd->xo_clk);
clk_put(mhcd->xo_clk);
}
msm_ehci_vbus_power(mhcd, 0);
msm_ehci_init_vbus(mhcd, 0);
msm_ehci_ldo_enable(mhcd, 0);
msm_ehci_ldo_init(mhcd, 0);
msm_ehci_init_vddcx(mhcd, 0);
if (mhcd->hsusb_pinctrl) {
set_state = pinctrl_lookup_state(mhcd->hsusb_pinctrl,
"ehci_sleep");
if (IS_ERR(set_state))
pr_err("cannot get hsusb pinctrl sleep state\n");
else
pinctrl_select_state(mhcd->hsusb_pinctrl, set_state);
}
msm_ehci_init_clocks(mhcd, 0);
wakeup_source_trash(&mhcd->ws);
iounmap(hcd->regs);
usb_put_hcd(hcd);
#if defined(CONFIG_DEBUG_FS)
debugfs_remove_recursive(dent_ehci);
#endif
return 0;
}
static int pm8058_kp_config_drv(int gpio_start, int num_gpios)
{
int rc;
struct pm8058_gpio kypd_drv = {
.direction = PM_GPIO_DIR_OUT,
.output_buffer = PM_GPIO_OUT_BUF_OPEN_DRAIN,
.output_value = 0,
.pull = PM_GPIO_PULL_NO,
.vin_sel = 2,
.out_strength = PM_GPIO_STRENGTH_LOW,
.function = PM_GPIO_FUNC_1,
.inv_int_pol = 1,
};
if (gpio_start < 0 || num_gpios < 0 || num_gpios > PM8058_GPIOS)
return -EINVAL;
while (num_gpios--) {
rc = pm8058_gpio_config(gpio_start++, &kypd_drv);
if (rc) {
pr_err("%s: FAIL pm8058_gpio_config(): rc=%d.\n",
__func__, rc);
return rc;
}
}
return 0;
}
static int pm8058_kp_config_sns(int gpio_start, int num_gpios)
{
int rc;
struct pm8058_gpio kypd_sns = {
.direction = PM_GPIO_DIR_IN,
.pull = PM_GPIO_PULL_UP_31P5,
.vin_sel = 2,
.out_strength = PM_GPIO_STRENGTH_NO,
.function = PM_GPIO_FUNC_NORMAL,
.inv_int_pol = 1,
};
if (gpio_start < 0 || num_gpios < 0 || num_gpios > PM8058_GPIOS)
return -EINVAL;
while (num_gpios--) {
rc = pm8058_gpio_config(gpio_start++, &kypd_sns);
if (rc) {
pr_err("%s: FAIL pm8058_gpio_config(): rc=%d.\n",
__func__, rc);
return rc;
}
}
return 0;
}
/*
* keypad controller should be initialized in the following sequence
* only, otherwise it might get into FSM stuck state.
*
* - Initialize keypad control parameters, like no. of rows, columns,
* timing values etc.,
* - configure rows and column gpios pull up/down.
* - set irq edge type.
* - enable the keypad controller.
*/
static int __devinit pmic8058_kp_probe(struct platform_device *pdev)
{
struct pmic8058_keypad_data *pdata = pdev->dev.platform_data;
const struct matrix_keymap_data *keymap_data;
struct pmic8058_kp *kp;
int rc;
unsigned short *keycodes;
u8 ctrl_val;
struct pm8058_chip *pm_chip;
pm_chip = platform_get_drvdata(pdev);
if (pm_chip == NULL) {
dev_err(&pdev->dev, "no parent data passed in\n");
return -EFAULT;
}
if (!pdata || !pdata->num_cols || !pdata->num_rows ||
pdata->num_cols > PM8058_MAX_COLS ||
pdata->num_rows > PM8058_MAX_ROWS ||
pdata->num_cols < PM8058_MIN_COLS ||
pdata->num_rows < PM8058_MIN_ROWS) {
dev_err(&pdev->dev, "invalid platform data\n");
return -EINVAL;
}
if (pdata->rows_gpio_start < 0 || pdata->cols_gpio_start < 0) {
dev_err(&pdev->dev, "invalid gpio_start platform data\n");
return -EINVAL;
}
if (!pdata->scan_delay_ms || pdata->scan_delay_ms > MAX_SCAN_DELAY
|| pdata->scan_delay_ms < MIN_SCAN_DELAY ||
!is_power_of_2(pdata->scan_delay_ms)) {
dev_err(&pdev->dev, "invalid keypad scan time supplied\n");
return -EINVAL;
}
if (!pdata->row_hold_ns || pdata->row_hold_ns > MAX_ROW_HOLD_DELAY
|| pdata->row_hold_ns < MIN_ROW_HOLD_DELAY ||
((pdata->row_hold_ns % MIN_ROW_HOLD_DELAY) != 0)) {
dev_err(&pdev->dev, "invalid keypad row hold time supplied\n");
return -EINVAL;
}
if (pm8058_rev(pm_chip) == PM_8058_REV_1p0) {
if (!pdata->debounce_ms
|| !is_power_of_2(pdata->debounce_ms[0])
|| pdata->debounce_ms[0] > MAX_DEBOUNCE_A0_TIME
|| pdata->debounce_ms[0] < MIN_DEBOUNCE_A0_TIME) {
dev_err(&pdev->dev, "invalid debounce time supplied\n");
return -EINVAL;
}
} else {
if (!pdata->debounce_ms
|| ((pdata->debounce_ms[1] % 5) != 0)
|| pdata->debounce_ms[1] > MAX_DEBOUNCE_B0_TIME
|| pdata->debounce_ms[1] < MIN_DEBOUNCE_B0_TIME) {
dev_err(&pdev->dev, "invalid debounce time supplied\n");
return -EINVAL;
}
}
keymap_data = pdata->keymap_data;
if (!keymap_data) {
dev_err(&pdev->dev, "no keymap data supplied\n");
return -EINVAL;
}
kp = kzalloc(sizeof(*kp), GFP_KERNEL);
if (!kp)
return -ENOMEM;
keycodes = kzalloc(PM8058_MATRIX_MAX_SIZE * sizeof(*keycodes),
GFP_KERNEL);
if (!keycodes) {
rc = -ENOMEM;
goto err_alloc_mem;
}
platform_set_drvdata(pdev, kp);
mutex_init(&kp->mutex);
kp->pdata = pdata;
kp->dev = &pdev->dev;
kp->keycodes = keycodes;
kp->pm_chip = pm_chip;
if (pm8058_rev(pm_chip) == PM_8058_REV_1p0)
kp->flags |= KEYF_FIX_LAST_ROW;
kp->input = input_allocate_device();
if (!kp->input) {
dev_err(&pdev->dev, "unable to allocate input device\n");
rc = -ENOMEM;
goto err_alloc_device;
}
/* Enable runtime PM ops, start in ACTIVE mode */
rc = pm_runtime_set_active(&pdev->dev);
if (rc < 0)
dev_dbg(&pdev->dev, "unable to set runtime pm state\n");
pm_runtime_enable(&pdev->dev);
kp->key_sense_irq = platform_get_irq(pdev, 0);
if (kp->key_sense_irq < 0) {
dev_err(&pdev->dev, "unable to get keypad sense irq\n");
rc = -ENXIO;
goto err_get_irq;
}
kp->key_stuck_irq = platform_get_irq(pdev, 1);
if (kp->key_stuck_irq < 0) {
dev_err(&pdev->dev, "unable to get keypad stuck irq\n");
rc = -ENXIO;
goto err_get_irq;
}
if (pdata->input_name)
kp->input->name = pdata->input_name;
else
kp->input->name = "PMIC8058 keypad";
if (pdata->input_phys_device)
kp->input->phys = pdata->input_phys_device;
else
kp->input->phys = "pmic8058_keypad/input0";
kp->input->dev.parent = &pdev->dev;
kp->input->id.bustype = BUS_HOST;
kp->input->id.version = 0x0001;
kp->input->id.product = 0x0001;
kp->input->id.vendor = 0x0001;
kp->input->evbit[0] = BIT_MASK(EV_KEY);
if (pdata->rep)
__set_bit(EV_REP, kp->input->evbit);
kp->input->keycode = keycodes;
kp->input->keycodemax = PM8058_MATRIX_MAX_SIZE;
kp->input->keycodesize = sizeof(*keycodes);
matrix_keypad_build_keymap(keymap_data, PM8058_ROW_SHIFT,
kp->input->keycode, kp->input->keybit);
input_set_capability(kp->input, EV_MSC, MSC_SCAN);
input_set_drvdata(kp->input, kp);
rc = input_register_device(kp->input);
if (rc < 0) {
dev_err(&pdev->dev, "unable to register keypad input device\n");
goto err_get_irq;
}
/* initialize keypad state */
memset(kp->keystate, 0xff, sizeof(kp->keystate));
memset(kp->stuckstate, 0xff, sizeof(kp->stuckstate));
rc = pmic8058_kpd_init(kp);
if (rc < 0) {
dev_err(&pdev->dev, "unable to initialize keypad controller\n");
goto err_kpd_init;
}
rc = pm8058_kp_config_sns(pdata->cols_gpio_start,
pdata->num_cols);
if (rc < 0) {
dev_err(&pdev->dev, "unable to configure keypad sense lines\n");
goto err_gpio_config;
}
rc = pm8058_kp_config_drv(pdata->rows_gpio_start,
pdata->num_rows);
if (rc < 0) {
dev_err(&pdev->dev, "unable to configure keypad drive lines\n");
goto err_gpio_config;
}
rc = request_threaded_irq(kp->key_sense_irq, NULL, pmic8058_kp_irq,
IRQF_TRIGGER_RISING, "pmic-keypad", kp);
if (rc < 0) {
dev_err(&pdev->dev, "failed to request keypad sense irq\n");
goto err_req_sense_irq;
}
rc = request_threaded_irq(kp->key_stuck_irq, NULL,
pmic8058_kp_stuck_irq, IRQF_TRIGGER_RISING,
"pmic-keypad-stuck", kp);
if (rc < 0) {
dev_err(&pdev->dev, "failed to request keypad stuck irq\n");
goto err_req_stuck_irq;
}
rc = pmic8058_kp_read_u8(kp, &ctrl_val, KEYP_CTRL);
ctrl_val |= KEYP_CTRL_KEYP_EN;
rc = pmic8058_kp_write_u8(kp, ctrl_val, KEYP_CTRL);
kp->ctrl_reg = ctrl_val;
__dump_kp_regs(kp, "probe");
rc = device_create_file(&pdev->dev, &dev_attr_disable_kp);
if (rc < 0)
goto err_create_file;
device_init_wakeup(&pdev->dev, pdata->wakeup);
return 0;
err_create_file:
free_irq(kp->key_stuck_irq, NULL);
err_req_stuck_irq:
free_irq(kp->key_sense_irq, NULL);
err_req_sense_irq:
err_gpio_config:
err_kpd_init:
input_unregister_device(kp->input);
kp->input = NULL;
err_get_irq:
pm_runtime_set_suspended(&pdev->dev);
pm_runtime_disable(&pdev->dev);
input_free_device(kp->input);
err_alloc_device:
kfree(keycodes);
err_alloc_mem:
kfree(kp);
return rc;
}
static int __devexit pmic8058_kp_remove(struct platform_device *pdev)
{
struct pmic8058_kp *kp = platform_get_drvdata(pdev);
pm_runtime_set_suspended(&pdev->dev);
pm_runtime_disable(&pdev->dev);
device_remove_file(&pdev->dev, &dev_attr_disable_kp);
device_init_wakeup(&pdev->dev, 0);
free_irq(kp->key_stuck_irq, NULL);
free_irq(kp->key_sense_irq, NULL);
input_unregister_device(kp->input);
platform_set_drvdata(pdev, NULL);
kfree(kp->input->keycode);
kfree(kp);
return 0;
}
#ifdef CONFIG_PM
static int pmic8058_kp_suspend(struct device *dev)
{
struct pmic8058_kp *kp = dev_get_drvdata(dev);
if (device_may_wakeup(dev) && !pmic8058_kp_disabled(kp)) {
enable_irq_wake(kp->key_sense_irq);
} else {
mutex_lock(&kp->mutex);
pmic8058_kp_disable(kp);
mutex_unlock(&kp->mutex);
}
return 0;
}
static int pmic8058_kp_resume(struct device *dev)
{
struct pmic8058_kp *kp = dev_get_drvdata(dev);
if (device_may_wakeup(dev) && !pmic8058_kp_disabled(kp)) {
disable_irq_wake(kp->key_sense_irq);
} else {
mutex_lock(&kp->mutex);
pmic8058_kp_enable(kp);
mutex_unlock(&kp->mutex);
}
return 0;
}
static struct dev_pm_ops pm8058_kp_pm_ops = {
.suspend = pmic8058_kp_suspend,
.resume = pmic8058_kp_resume,
};
#endif
static struct platform_driver pmic8058_kp_driver = {
.probe = pmic8058_kp_probe,
.remove = __devexit_p(pmic8058_kp_remove),
.driver = {
.name = "pm8058-keypad",
.owner = THIS_MODULE,
#ifdef CONFIG_PM
.pm = &pm8058_kp_pm_ops,
#endif
},
};
static int __init pmic8058_kp_init(void)
{
return platform_driver_register(&pmic8058_kp_driver);
}
module_init(pmic8058_kp_init);
static void __exit pmic8058_kp_exit(void)
{
platform_driver_unregister(&pmic8058_kp_driver);
}
/**
* gma_power_uninit - end power manager
* @dev: device to end for
*
* Undo the effects of gma_power_init
*/
void gma_power_uninit(struct drm_device *dev)
{
pm_runtime_disable(&dev->pdev->dev);
pm_runtime_set_suspended(&dev->pdev->dev);
}
static int sdhci_at91_probe(struct platform_device *pdev)
{
const struct of_device_id *match;
const struct sdhci_pltfm_data *soc_data;
struct sdhci_host *host;
struct sdhci_pltfm_host *pltfm_host;
struct sdhci_at91_priv *priv;
unsigned int caps0, caps1;
unsigned int clk_base, clk_mul;
unsigned int gck_rate, real_gck_rate;
int ret;
unsigned int preset_div;
match = of_match_device(sdhci_at91_dt_match, &pdev->dev);
if (!match)
return -EINVAL;
soc_data = match->data;
host = sdhci_pltfm_init(pdev, soc_data, sizeof(*priv));
if (IS_ERR(host))
return PTR_ERR(host);
pltfm_host = sdhci_priv(host);
priv = sdhci_pltfm_priv(pltfm_host);
priv->mainck = devm_clk_get(&pdev->dev, "baseclk");
if (IS_ERR(priv->mainck)) {
dev_err(&pdev->dev, "failed to get baseclk\n");
return PTR_ERR(priv->mainck);
}
priv->hclock = devm_clk_get(&pdev->dev, "hclock");
if (IS_ERR(priv->hclock)) {
dev_err(&pdev->dev, "failed to get hclock\n");
return PTR_ERR(priv->hclock);
}
priv->gck = devm_clk_get(&pdev->dev, "multclk");
if (IS_ERR(priv->gck)) {
dev_err(&pdev->dev, "failed to get multclk\n");
return PTR_ERR(priv->gck);
}
/*
* The mult clock is provided by as a generated clock by the PMC
* controller. In order to set the rate of gck, we have to get the
* base clock rate and the clock mult from capabilities.
*/
clk_prepare_enable(priv->hclock);
caps0 = readl(host->ioaddr + SDHCI_CAPABILITIES);
caps1 = readl(host->ioaddr + SDHCI_CAPABILITIES_1);
clk_base = (caps0 & SDHCI_CLOCK_V3_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT;
clk_mul = (caps1 & SDHCI_CLOCK_MUL_MASK) >> SDHCI_CLOCK_MUL_SHIFT;
gck_rate = clk_base * 1000000 * (clk_mul + 1);
ret = clk_set_rate(priv->gck, gck_rate);
if (ret < 0) {
dev_err(&pdev->dev, "failed to set gck");
goto hclock_disable_unprepare;
}
/*
* We need to check if we have the requested rate for gck because in
* some cases this rate could be not supported. If it happens, the rate
* is the closest one gck can provide. We have to update the value
* of clk mul.
*/
real_gck_rate = clk_get_rate(priv->gck);
if (real_gck_rate != gck_rate) {
clk_mul = real_gck_rate / (clk_base * 1000000) - 1;
caps1 &= (~SDHCI_CLOCK_MUL_MASK);
caps1 |= ((clk_mul << SDHCI_CLOCK_MUL_SHIFT) & SDHCI_CLOCK_MUL_MASK);
/* Set capabilities in r/w mode. */
writel(SDMMC_CACR_KEY | SDMMC_CACR_CAPWREN, host->ioaddr + SDMMC_CACR);
writel(caps1, host->ioaddr + SDHCI_CAPABILITIES_1);
/* Set capabilities in ro mode. */
writel(0, host->ioaddr + SDMMC_CACR);
dev_info(&pdev->dev, "update clk mul to %u as gck rate is %u Hz\n",
clk_mul, real_gck_rate);
}
/*
* We have to set preset values because it depends on the clk_mul
* value. Moreover, SDR104 is supported in a degraded mode since the
* maximum sd clock value is 120 MHz instead of 208 MHz. For that
* reason, we need to use presets to support SDR104.
*/
preset_div = DIV_ROUND_UP(real_gck_rate, 24000000) - 1;
writew(SDHCI_AT91_PRESET_COMMON_CONF | preset_div,
host->ioaddr + SDHCI_PRESET_FOR_SDR12);
preset_div = DIV_ROUND_UP(real_gck_rate, 50000000) - 1;
writew(SDHCI_AT91_PRESET_COMMON_CONF | preset_div,
host->ioaddr + SDHCI_PRESET_FOR_SDR25);
preset_div = DIV_ROUND_UP(real_gck_rate, 100000000) - 1;
writew(SDHCI_AT91_PRESET_COMMON_CONF | preset_div,
host->ioaddr + SDHCI_PRESET_FOR_SDR50);
preset_div = DIV_ROUND_UP(real_gck_rate, 120000000) - 1;
writew(SDHCI_AT91_PRESET_COMMON_CONF | preset_div,
host->ioaddr + SDHCI_PRESET_FOR_SDR104);
preset_div = DIV_ROUND_UP(real_gck_rate, 50000000) - 1;
writew(SDHCI_AT91_PRESET_COMMON_CONF | preset_div,
host->ioaddr + SDHCI_PRESET_FOR_DDR50);
clk_prepare_enable(priv->mainck);
clk_prepare_enable(priv->gck);
ret = mmc_of_parse(host->mmc);
if (ret)
goto clocks_disable_unprepare;
sdhci_get_of_property(pdev);
pm_runtime_get_noresume(&pdev->dev);
pm_runtime_set_active(&pdev->dev);
pm_runtime_enable(&pdev->dev);
pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
pm_runtime_use_autosuspend(&pdev->dev);
ret = sdhci_add_host(host);
if (ret)
goto pm_runtime_disable;
/*
* When calling sdhci_runtime_suspend_host(), the sdhci layer makes
* the assumption that all the clocks of the controller are disabled.
* It means we can't get irq from it when it is runtime suspended.
* For that reason, it is not planned to wake-up on a card detect irq
* from the controller.
* If we want to use runtime PM and to be able to wake-up on card
* insertion, we have to use a GPIO for the card detection or we can
* use polling. Be aware that using polling will resume/suspend the
* controller between each attempt.
* Disable SDHCI_QUIRK_BROKEN_CARD_DETECTION to be sure nobody tries
* to enable polling via device tree with broken-cd property.
*/
if (mmc_card_is_removable(host->mmc) &&
mmc_gpio_get_cd(host->mmc) < 0) {
host->mmc->caps |= MMC_CAP_NEEDS_POLL;
host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION;
}
pm_runtime_put_autosuspend(&pdev->dev);
return 0;
pm_runtime_disable:
pm_runtime_disable(&pdev->dev);
pm_runtime_set_suspended(&pdev->dev);
pm_runtime_put_noidle(&pdev->dev);
clocks_disable_unprepare:
clk_disable_unprepare(priv->gck);
clk_disable_unprepare(priv->mainck);
hclock_disable_unprepare:
clk_disable_unprepare(priv->hclock);
sdhci_pltfm_free(pdev);
return ret;
}
/**
* cdns_i2c_probe - Platform registration call
* @pdev: Handle to the platform device structure
*
* This function does all the memory allocation and registration for the i2c
* device. User can modify the address mode to 10 bit address mode using the
* ioctl call with option I2C_TENBIT.
*
* Return: 0 on success, negative error otherwise
*/
static int cdns_i2c_probe(struct platform_device *pdev)
{
struct resource *r_mem;
struct cdns_i2c *id;
int ret;
const struct of_device_id *match;
id = devm_kzalloc(&pdev->dev, sizeof(*id), GFP_KERNEL);
if (!id)
return -ENOMEM;
id->dev = &pdev->dev;
platform_set_drvdata(pdev, id);
match = of_match_node(cdns_i2c_of_match, pdev->dev.of_node);
if (match && match->data) {
const struct cdns_platform_data *data = match->data;
id->quirks = data->quirks;
}
r_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
id->membase = devm_ioremap_resource(&pdev->dev, r_mem);
if (IS_ERR(id->membase))
return PTR_ERR(id->membase);
id->irq = platform_get_irq(pdev, 0);
id->adap.owner = THIS_MODULE;
id->adap.dev.of_node = pdev->dev.of_node;
id->adap.algo = &cdns_i2c_algo;
id->adap.timeout = CDNS_I2C_TIMEOUT;
id->adap.retries = 3; /* Default retry value. */
id->adap.algo_data = id;
id->adap.dev.parent = &pdev->dev;
init_completion(&id->xfer_done);
snprintf(id->adap.name, sizeof(id->adap.name),
"Cadence I2C at %08lx", (unsigned long)r_mem->start);
id->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(id->clk)) {
dev_err(&pdev->dev, "input clock not found.\n");
return PTR_ERR(id->clk);
}
ret = clk_prepare_enable(id->clk);
if (ret)
dev_err(&pdev->dev, "Unable to enable clock.\n");
pm_runtime_enable(id->dev);
pm_runtime_set_autosuspend_delay(id->dev, CNDS_I2C_PM_TIMEOUT);
pm_runtime_use_autosuspend(id->dev);
pm_runtime_set_active(id->dev);
id->clk_rate_change_nb.notifier_call = cdns_i2c_clk_notifier_cb;
if (clk_notifier_register(id->clk, &id->clk_rate_change_nb))
dev_warn(&pdev->dev, "Unable to register clock notifier.\n");
id->input_clk = clk_get_rate(id->clk);
ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency",
&id->i2c_clk);
if (ret || (id->i2c_clk > CDNS_I2C_SPEED_MAX))
id->i2c_clk = CDNS_I2C_SPEED_DEFAULT;
cdns_i2c_writereg(CDNS_I2C_CR_ACK_EN | CDNS_I2C_CR_NEA | CDNS_I2C_CR_MS,
CDNS_I2C_CR_OFFSET);
ret = cdns_i2c_setclk(id->input_clk, id);
if (ret) {
dev_err(&pdev->dev, "invalid SCL clock: %u Hz\n", id->i2c_clk);
ret = -EINVAL;
goto err_clk_dis;
}
ret = devm_request_irq(&pdev->dev, id->irq, cdns_i2c_isr, 0,
DRIVER_NAME, id);
if (ret) {
dev_err(&pdev->dev, "cannot get irq %d\n", id->irq);
goto err_clk_dis;
}
ret = i2c_add_adapter(&id->adap);
if (ret < 0) {
dev_err(&pdev->dev, "reg adap failed: %d\n", ret);
goto err_clk_dis;
}
/*
* Cadence I2C controller has a bug wherein it generates
* invalid read transaction after HW timeout in master receiver mode.
* HW timeout is not used by this driver and the interrupt is disabled.
* But the feature itself cannot be disabled. Hence maximum value
* is written to this register to reduce the chances of error.
*/
cdns_i2c_writereg(CDNS_I2C_TIMEOUT_MAX, CDNS_I2C_TIME_OUT_OFFSET);
dev_info(&pdev->dev, "%u kHz mmio %08lx irq %d\n",
id->i2c_clk / 1000, (unsigned long)r_mem->start, id->irq);
return 0;
err_clk_dis:
clk_disable_unprepare(id->clk);
pm_runtime_set_suspended(&pdev->dev);
pm_runtime_disable(&pdev->dev);
return ret;
}
//[SIMT-lilening-20110804]}
static int __devinit pmic8058_vib_probe(struct platform_device *pdev)
{
struct pmic8058_vibrator_pdata *pdata = pdev->dev.platform_data;
struct pmic8058_vib *vib;
u8 val;
int rc;
struct pm8058_chip *pm_chip;
pm_chip = platform_get_drvdata(pdev);
if (pm_chip == NULL) {
dev_err(&pdev->dev, "no parent data passed in\n");
return -EFAULT;
}
if (!pdata)
return -EINVAL;
if (pdata->level_mV < VIB_MIN_LEVEL_mV ||
pdata->level_mV > VIB_MAX_LEVEL_mV)
return -EINVAL;
vib = kzalloc(sizeof(*vib), GFP_KERNEL);
if (!vib)
return -ENOMEM;
/* Enable runtime PM ops, start in ACTIVE mode */
rc = pm_runtime_set_active(&pdev->dev);
if (rc < 0)
dev_dbg(&pdev->dev, "unable to set runtime pm state\n");
pm_runtime_enable(&pdev->dev);
vib->pm_chip = pm_chip;
vib->pdata = pdata;
vib->level = pdata->level_mV / 100;
vib->dev = &pdev->dev;
spin_lock_init(&vib->lock);
INIT_WORK(&vib->work, pmic8058_vib_update);
hrtimer_init(&vib->vib_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
vib->vib_timer.function = pmic8058_vib_timer_func;
vib->timed_dev.name = "vibrator";
vib->timed_dev.get_time = pmic8058_vib_get_time;
vib->timed_dev.enable = pmic8058_vib_enable;
__dump_vib_regs(vib, "boot_vib_default");
/* operate in manual mode */
rc = pmic8058_vib_read_u8(vib, &val, VIB_DRV);
if (rc < 0)
goto err_read_vib;
val &= ~VIB_DRV_EN_MANUAL_MASK;
rc = pmic8058_vib_write_u8(vib, val, VIB_DRV);
if (rc < 0)
goto err_read_vib;
vib->reg_vib_drv = val;
rc = timed_output_dev_register(&vib->timed_dev);
if (rc < 0)
goto err_read_vib;
//[SIM-chengbin-110926] del the second vib event
#if 0
pmic8058_vib_enable(&vib->timed_dev, pdata->initial_vibrate_ms);
#endif
platform_set_drvdata(pdev, vib);
pm_runtime_set_suspended(&pdev->dev);
//[SIMT-lilening-20110804] add vibrator start voltage{
rc = device_create_file(&pdev->dev, &dev_attr_vib_set);
if(rc)
return rc;
//[SIMT-lilening-20110804]}
return 0;
err_read_vib:
pm_runtime_set_suspended(&pdev->dev);
pm_runtime_disable(&pdev->dev);
kfree(vib);
return rc;
}
static int sdhci_sprd_probe(struct platform_device *pdev)
{
struct sdhci_host *host;
struct sdhci_sprd_host *sprd_host;
struct clk *clk;
int ret = 0;
host = sdhci_pltfm_init(pdev, &sdhci_sprd_pdata, sizeof(*sprd_host));
if (IS_ERR(host))
return PTR_ERR(host);
host->dma_mask = DMA_BIT_MASK(64);
pdev->dev.dma_mask = &host->dma_mask;
host->mmc_host_ops.request = sdhci_sprd_request;
host->mmc->caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED |
MMC_CAP_ERASE | MMC_CAP_CMD23;
ret = mmc_of_parse(host->mmc);
if (ret)
goto pltfm_free;
sprd_host = TO_SPRD_HOST(host);
clk = devm_clk_get(&pdev->dev, "sdio");
if (IS_ERR(clk)) {
ret = PTR_ERR(clk);
goto pltfm_free;
}
sprd_host->clk_sdio = clk;
sprd_host->base_rate = clk_get_rate(sprd_host->clk_sdio);
if (!sprd_host->base_rate)
sprd_host->base_rate = SDHCI_SPRD_CLK_DEF_RATE;
clk = devm_clk_get(&pdev->dev, "enable");
if (IS_ERR(clk)) {
ret = PTR_ERR(clk);
goto pltfm_free;
}
sprd_host->clk_enable = clk;
ret = clk_prepare_enable(sprd_host->clk_sdio);
if (ret)
goto pltfm_free;
clk_prepare_enable(sprd_host->clk_enable);
if (ret)
goto clk_disable;
sdhci_sprd_init_config(host);
host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
sprd_host->version = ((host->version & SDHCI_VENDOR_VER_MASK) >>
SDHCI_VENDOR_VER_SHIFT);
pm_runtime_get_noresume(&pdev->dev);
pm_runtime_set_active(&pdev->dev);
pm_runtime_enable(&pdev->dev);
pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
pm_runtime_use_autosuspend(&pdev->dev);
pm_suspend_ignore_children(&pdev->dev, 1);
sdhci_enable_v4_mode(host);
ret = sdhci_setup_host(host);
if (ret)
goto pm_runtime_disable;
sprd_host->flags = host->flags;
ret = __sdhci_add_host(host);
if (ret)
goto err_cleanup_host;
pm_runtime_mark_last_busy(&pdev->dev);
pm_runtime_put_autosuspend(&pdev->dev);
return 0;
err_cleanup_host:
sdhci_cleanup_host(host);
pm_runtime_disable:
pm_runtime_disable(&pdev->dev);
pm_runtime_set_suspended(&pdev->dev);
clk_disable_unprepare(sprd_host->clk_enable);
clk_disable:
clk_disable_unprepare(sprd_host->clk_sdio);
pltfm_free:
sdhci_pltfm_free(pdev);
return ret;
}
static int __devinit msm_red_led_probe(struct platform_device *pdev)
{
const struct led_info *pdata = pdev->dev.platform_data;
struct pdm_led_data *led;
int rc;
int err;
printk(KERN_EMERG "%s \n",__func__);
if (!pdata) {
pr_err("%s : platform data is invalid\n", __func__);
return -EINVAL;
}
if (pdev->id != 0) {
pr_err("%s : id is invalid\n", __func__);
return -EINVAL;
}
led = kzalloc(sizeof(struct pdm_led_data), GFP_KERNEL);
if (!led)
return -ENOMEM;
/* Enable runtime PM ops, start in ACTIVE mode */
rc = pm_runtime_set_active(&pdev->dev);
if (rc < 0)
dev_dbg(&pdev->dev, "unable to set runtime pm state\n");
pm_runtime_enable(&pdev->dev);
//[Arima Edison] block, a workaround for current consumption test++
pmapp_red_led_init();
//[Arima Edison] block, a workaround for current consumption test--
/* Start with LED in off state */
msm_led_brightness_set_percent(led, 0);
led->cdev.brightness_set = msm_led_brightness_set;
led->cdev.name = pdata->name ? : "leds-acm-red";
rc = led_classdev_register(&pdev->dev, &led->cdev);
if (rc) {
pr_err("led class registration failed\n");
goto err_led_reg;
}
err = sysfs_create_group(&led->cdev.dev->kobj,&red_led_attribute_group);
//[Arima Edison] disable it, since indicator leds were controled by PowerManager++
#ifdef CONFIG_LED_SLEEP
#ifdef CONFIG_HAS_EARLYSUSPEND
led->early_suspend.level = EARLY_SUSPEND_LEVEL_BLANK_SCREEN +
LED_SUSPEND_LEVEL;
led->early_suspend.suspend = msm_led_red_early_suspend;
register_early_suspend(&led->early_suspend);
#endif
#endif
//[Arima Edison] disable it, since indicator leds were controled by PowerManager--
platform_set_drvdata(pdev, led);
printk(KERN_EMERG "%s OK",__func__);
return 0;
err_led_reg:
pm_runtime_set_suspended(&pdev->dev);
pm_runtime_disable(&pdev->dev);
kfree(led);
return rc;
}
static int mdss_mdp_probe(struct platform_device *pdev)
{
struct resource *res;
int rc;
struct mdss_data_type *mdata;
if (!pdev->dev.of_node) {
pr_err("MDP driver only supports device tree probe\n");
return -ENOTSUPP;
}
if (mdss_res) {
pr_err("MDP already initialized\n");
return -EINVAL;
}
mdata = devm_kzalloc(&pdev->dev, sizeof(*mdata), GFP_KERNEL);
if (mdata == NULL)
return -ENOMEM;
pdev->id = 0;
mdata->pdev = pdev;
platform_set_drvdata(pdev, mdata);
mdss_res = mdata;
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mdp_phys");
if (!res) {
pr_err("unable to get MDP base address\n");
rc = -ENOMEM;
goto probe_done;
}
mdata->mdp_reg_size = resource_size(res);
mdata->mdp_base = devm_ioremap(&pdev->dev, res->start,
mdata->mdp_reg_size);
if (unlikely(!mdata->mdp_base)) {
pr_err("unable to map MDP base\n");
rc = -ENOMEM;
goto probe_done;
}
pr_info("MDP HW Base phy_Address=0x%x virt=0x%x\n",
(int) res->start,
(int) mdata->mdp_base);
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "vbif_phys");
if (!res) {
pr_err("unable to get MDSS VBIF base address\n");
rc = -ENOMEM;
goto probe_done;
}
mdata->vbif_base = devm_ioremap(&pdev->dev, res->start,
resource_size(res));
if (unlikely(!mdata->vbif_base)) {
pr_err("unable to map MDSS VBIF base\n");
rc = -ENOMEM;
goto probe_done;
}
pr_info("MDSS VBIF HW Base phy_Address=0x%x virt=0x%x\n",
(int) res->start,
(int) mdata->vbif_base);
res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (!res) {
pr_err("unable to get MDSS irq\n");
rc = -ENOMEM;
goto probe_done;
}
mdata->irq = res->start;
mdss_mdp_hw.ptr = mdata;
/*populate hw iomem base info from device tree*/
rc = mdss_mdp_parse_dt(pdev);
if (rc) {
pr_err("unable to parse device tree\n");
goto probe_done;
}
rc = mdss_mdp_res_init(mdata);
if (rc) {
pr_err("unable to initialize mdss mdp resources\n");
goto probe_done;
}
rc = mdss_mdp_pp_init(&pdev->dev);
if (rc) {
pr_err("unable to initialize mdss pp resources\n");
goto probe_done;
}
rc = mdss_mdp_bus_scale_register(mdata);
if (rc) {
pr_err("unable to register bus scaling\n");
goto probe_done;
}
mdss_mdp_bus_scale_set_quota(AB_QUOTA, IB_QUOTA);
rc = mdss_mdp_debug_init(mdata);
if (rc) {
pr_err("unable to initialize mdp debugging\n");
goto probe_done;
}
pm_runtime_set_suspended(&pdev->dev);
pm_runtime_enable(&pdev->dev);
if (!pm_runtime_enabled(&pdev->dev))
mdss_mdp_footswitch_ctrl(mdata, true);
rc = mdss_mdp_register_sysfs(mdata);
if (rc)
pr_err("unable to register mdp sysfs nodes\n");
rc = mdss_fb_register_mdp_instance(&mdp5);
if (rc)
pr_err("unable to register mdp instance\n");
rc = mdss_register_irq(&mdss_mdp_hw);
if (rc)
pr_err("mdss_register_irq failed.\n");
probe_done:
if (IS_ERR_VALUE(rc)) {
mdss_mdp_hw.ptr = NULL;
mdss_res = NULL;
mdss_mdp_pp_term(&pdev->dev);
}
return rc;
}
static int hix5hd2_i2c_probe(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
struct hix5hd2_i2c_priv *priv;
struct resource *mem;
unsigned int freq;
int irq, ret;
priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
if (!priv)
return -ENOMEM;
if (of_property_read_u32(np, "clock-frequency", &freq)) {
/* use 100k as default value */
priv->freq = 100000;
} else {
if (freq > HIX5I2C_MAX_FREQ) {
priv->freq = HIX5I2C_MAX_FREQ;
dev_warn(priv->dev, "use max freq %d instead\n",
HIX5I2C_MAX_FREQ);
} else {
priv->freq = freq;
}
}
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
priv->regs = devm_ioremap_resource(&pdev->dev, mem);
if (IS_ERR(priv->regs))
return PTR_ERR(priv->regs);
irq = platform_get_irq(pdev, 0);
if (irq <= 0) {
dev_err(&pdev->dev, "cannot find HS-I2C IRQ\n");
return irq;
}
priv->clk = devm_clk_get(&pdev->dev, NULL);
if (IS_ERR(priv->clk)) {
dev_err(&pdev->dev, "cannot get clock\n");
return PTR_ERR(priv->clk);
}
clk_prepare_enable(priv->clk);
strlcpy(priv->adap.name, "hix5hd2-i2c", sizeof(priv->adap.name));
priv->dev = &pdev->dev;
priv->adap.owner = THIS_MODULE;
priv->adap.algo = &hix5hd2_i2c_algorithm;
priv->adap.retries = 3;
priv->adap.dev.of_node = np;
priv->adap.algo_data = priv;
priv->adap.dev.parent = &pdev->dev;
i2c_set_adapdata(&priv->adap, priv);
platform_set_drvdata(pdev, priv);
spin_lock_init(&priv->lock);
init_completion(&priv->msg_complete);
hix5hd2_i2c_init(priv);
ret = devm_request_irq(&pdev->dev, irq, hix5hd2_i2c_irq,
IRQF_NO_SUSPEND | IRQF_ONESHOT,
dev_name(&pdev->dev), priv);
if (ret != 0) {
dev_err(&pdev->dev, "cannot request HS-I2C IRQ %d\n", irq);
goto err_clk;
}
pm_suspend_ignore_children(&pdev->dev, true);
pm_runtime_set_autosuspend_delay(priv->dev, MSEC_PER_SEC);
pm_runtime_use_autosuspend(priv->dev);
pm_runtime_set_active(priv->dev);
pm_runtime_enable(priv->dev);
ret = i2c_add_adapter(&priv->adap);
if (ret < 0)
goto err_runtime;
return ret;
err_runtime:
pm_runtime_disable(priv->dev);
pm_runtime_set_suspended(priv->dev);
err_clk:
clk_disable_unprepare(priv->clk);
return ret;
}
static int __devinit msm_pdm_led_probe(struct platform_device *pdev)
{
const struct led_info *pdata = pdev->dev.platform_data;
struct pdm_led_data *led;
struct resource *res, *ioregion;
u32 tcxo_pdm_ctl;
int rc;
if (!pdata) {
pr_err("platform data is invalid\n");
return -EINVAL;
}
if (pdev->id > 2) {
pr_err("pdm id is invalid\n");
return -EINVAL;
}
led = kzalloc(sizeof(struct pdm_led_data), GFP_KERNEL);
if (!led)
return -ENOMEM;
rc = pm_runtime_set_active(&pdev->dev);
if (rc < 0)
dev_dbg(&pdev->dev, "unable to set runtime pm state\n");
pm_runtime_enable(&pdev->dev);
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
pr_err("get resource failed\n");
rc = -EINVAL;
goto err_get_res;
}
ioregion = request_mem_region(res->start, resource_size(res),
pdev->name);
if (!ioregion) {
pr_err("request for mem region failed\n");
rc = -ENOMEM;
goto err_get_res;
}
led->perph_base = ioremap(res->start, resource_size(res));
if (!led->perph_base) {
pr_err("ioremap failed\n");
rc = -ENOMEM;
goto err_ioremap;
}
led->pdm_offset = ((pdev->id) + 1) * 4;
tcxo_pdm_ctl = readl_relaxed(led->perph_base);
tcxo_pdm_ctl |= (1 << pdev->id);
writel_relaxed(tcxo_pdm_ctl, led->perph_base);
msm_led_brightness_set_percent(led, 0);
led->cdev.brightness_set = msm_led_brightness_set;
led->cdev.name = pdata->name ? : "leds-msm-pdm";
rc = led_classdev_register(&pdev->dev, &led->cdev);
if (rc) {
pr_err("led class registration failed\n");
goto err_led_reg;
}
#ifdef CONFIG_HAS_EARLYSUSPEND
led->early_suspend.level = EARLY_SUSPEND_LEVEL_BLANK_SCREEN +
LED_SUSPEND_LEVEL;
led->early_suspend.suspend = msm_led_pdm_early_suspend;
register_early_suspend(&led->early_suspend);
#endif
platform_set_drvdata(pdev, led);
return 0;
err_led_reg:
iounmap(led->perph_base);
err_ioremap:
release_mem_region(res->start, resource_size(res));
err_get_res:
pm_runtime_set_suspended(&pdev->dev);
pm_runtime_disable(&pdev->dev);
kfree(led);
return rc;
}