int main(int argc, const char **argv)
{
unsigned int srcGen = 0;
NandSimRequestProxy *device = 0;
DmaConfigProxy *dmap = 0;
NandSimIndication *deviceIndication = 0;
DmaIndication *dmaIndication = 0;
fprintf(stderr, "Main::%s %s\n", __DATE__, __TIME__);
device = new NandSimRequestProxy(IfcNames_NandSimRequest);
dmap = new DmaConfigProxy(IfcNames_DmaConfig);
DmaManager *dma = new DmaManager(dmap);
deviceIndication = new NandSimIndication(IfcNames_NandSimIndication);
dmaIndication = new DmaIndication(dma, IfcNames_DmaIndication);
fprintf(stderr, "Main::allocating memory...\n");
srcAlloc = portalAlloc(numBytes);
srcBuffer = (unsigned int *)portalMmap(srcAlloc, numBytes);
fprintf(stderr, "fd=%d, srcBuffer=%p\n", srcAlloc, srcBuffer);
portalExec_start();
for (int i = 0; i < numBytes/sizeof(srcBuffer[0]); i++)
srcBuffer[i] = srcGen++;
portalDCacheFlushInval(srcAlloc, numBytes, srcBuffer);
fprintf(stderr, "Main::flush and invalidate complete\n");
sleep(1);
unsigned int ref_srcAlloc = dma->reference(srcAlloc);
nandAlloc = portalAlloc(nandBytes);
int ref_nandAlloc = dma->reference(nandAlloc);
fprintf(stderr, "NAND alloc fd=%d ref=%d\n", nandAlloc, ref_nandAlloc);
device->configureNand(ref_nandAlloc, nandBytes);
deviceIndication->wait();
fprintf(stderr, "Main::starting write ref=%d, len=%08zx\n", ref_srcAlloc, numBytes);
device->startWrite(ref_srcAlloc, 0, 0, numBytes, 16);
deviceIndication->wait();
fprintf(stderr, "Main::starting read %08zx\n", numBytes);
device->startRead(ref_srcAlloc, 0, 0, numBytes, 16);
deviceIndication->wait();
fprintf(stderr, "Main::starting erase %08zx\n", numBytes);
device->startErase(0, numBytes);
deviceIndication->wait();
fprintf(stderr, "Main::starting read %08zx\n", numBytes);
device->startRead(ref_srcAlloc, 0, 0, numBytes, 16);
deviceIndication->wait();
return 0;
}
int main(int argc, const char **argv)
{
unsigned int srcGen = 0;
Memread2RequestProxy *device = 0;
Memread2Indication *deviceIndication = 0;
fprintf(stderr, "Main::%s %s\n", __DATE__, __TIME__);
device = new Memread2RequestProxy(IfcNames_Memread2Request);
DmaDebugRequestProxy *hostDmaDebugRequest = new DmaDebugRequestProxy(IfcNames_HostDmaDebugRequest);
MMUConfigRequestProxy *dmap = new MMUConfigRequestProxy(IfcNames_HostMMUConfigRequest);
DmaManager *dma = new DmaManager(hostDmaDebugRequest, dmap);
DmaDebugIndication *hostDmaDebugIndication = new DmaDebugIndication(dma, IfcNames_HostDmaDebugIndication);
MMUConfigIndication *hostMMUConfigIndication = new MMUConfigIndication(dma, IfcNames_HostMMUConfigIndication);
deviceIndication = new Memread2Indication(IfcNames_Memread2Indication);
fprintf(stderr, "Main::allocating memory...\n");
srcAlloc = portalAlloc(alloc_sz);
srcBuffer = (unsigned int *)portalMmap(srcAlloc, alloc_sz);
srcAlloc2 = portalAlloc(alloc_sz);
srcBuffer2 = (unsigned int *)portalMmap(srcAlloc2, alloc_sz);
portalExec_start();
for (int i = 0; i < numWords; i++){
int v = srcGen++;
srcBuffer[i] = v;
srcBuffer2[i] = v*3;
}
portalDCacheFlushInval(srcAlloc, alloc_sz, srcBuffer);
fprintf(stderr, "Main::flush and invalidate complete\n");
unsigned int ref_srcAlloc = dma->reference(srcAlloc);
fprintf(stderr, "ref_srcAlloc=%d\n", ref_srcAlloc);
unsigned int ref_srcAlloc2 = dma->reference(srcAlloc2);
fprintf(stderr, "ref_srcAlloc2=%d\n", ref_srcAlloc2);
fprintf(stderr, "Main::starting read %08x\n", numWords);
device->startRead(ref_srcAlloc, ref_srcAlloc2, 32, 16);
fprintf(stderr, "Main::sleeping\n");
while(true){
sleep(3);
device->getStateDbg();
uint64_t beats = dma->show_mem_stats(ChannelType_Read);
fprintf(stderr, " beats: %"PRIx64"\n", beats);
hostDmaDebugRequest->getStateDbg(ChannelType_Read);
}
}
int main(int argc, const char **argv)
{
unsigned int srcGen = 0;
unsigned repeatCount = 0;
fprintf(stderr, "%s %s\n", __DATE__, __TIME__);
device = new PerfRequestProxy(IfcNames_PerfRequest);
DmaDebugRequestProxy *hostDmaDebugRequest = new DmaDebugRequestProxy(IfcNames_HostDmaDebugRequest);
dmap = new MMUConfigRequestProxy(IfcNames_HostMMUConfigRequest);
DmaManager *dma = new DmaManager(hostDmaDebugRequest, dmap);
DmaDebugIndication *hostDmaDebugIndication = new DmaDebugIndication(dma, IfcNames_HostDmaDebugIndication);
MMUConfigIndication *hostMMUConfigIndication = new MMUConfigIndication(dma, IfcNames_HostMMUConfigIndication);
deviceIndication = new PerfIndication(IfcNames_PerfIndication);
fprintf(stderr, "Main::allocating memory...\n");
srcAlloc = portalAlloc(alloc_sz);
dstAlloc = portalAlloc(alloc_sz);
srcBuffer = (unsigned int *)portalMmap(srcAlloc, alloc_sz);
dstBuffer = (unsigned int *)portalMmap(dstAlloc, alloc_sz);
portalExec_start();
portalDCacheFlushInval(srcAlloc, alloc_sz, srcBuffer);
portalDCacheFlushInval(dstAlloc, alloc_sz, dstBuffer);
fprintf(stderr, "Main::flush and invalidate complete\n");
ref_srcAlloc = dma->reference(srcAlloc);
ref_dstAlloc = dma->reference(dstAlloc);
fprintf(stderr, "ref_srcAlloc %d\n", ref_srcAlloc);
fprintf(stderr, "ref_dstAlloc %d\n", ref_dstAlloc);
//fprintf(stderr, "Main::starting mempcy numWords:%d\n", 0);
//dotest(0);
for (repeatCount = 1; repeatCount <= 16; repeatCount <<= 1) {
fprintf(stderr, "Main::starting mempcy repeatCount:%d\n", repeatCount);
for (numWords = 16; numWords < (1 << 16); numWords <<= 1){
//fprintf(stderr, "Main::starting mempcy numWords:%d\n", numWords);
dotest(numWords, repeatCount);
}
}
device->getStateDbg();
fprintf(stderr, "Main::exiting\n");
}
void interface_init() {
device = new GeneralRequestProxy(IfcNames_GeneralRequest);
deviceIndication = new GeneralIndication(IfcNames_GeneralIndication);
for ( int i = 0; i < DMA_BUFFER_COUNT; i++ ) {
srcAllocs[i] = portalAlloc(walloc_sz);
dstAllocs[i] = portalAlloc(ralloc_sz);
srcBuffers[i] = (unsigned int *)portalMmap(srcAllocs[i], walloc_sz);
dstBuffers[i] = (unsigned int *)portalMmap(dstAllocs[i], ralloc_sz);
}
pthread_mutex_init(&flashReqMutex, NULL);
pthread_cond_init(&flashReqCond, NULL);
}
int main(int argc, const char **argv)
{
DmaManager *dma = platformInit();
Ddr3TestRequestProxy *testRequest = new Ddr3TestRequestProxy(IfcNames_Ddr3TestRequestS2H);
Ddr3TestIndication testIndication(IfcNames_Ddr3TestIndicationH2S);
if(sem_init(&write_sem, 1, 0)){
fprintf(stderr, "failed to init write_sem\n");
return -1;
}
if(sem_init(&read_sem, 1, 0)){
fprintf(stderr, "failed to init read_sem\n");
return -1;
}
int srcAlloc = portalAlloc(alloc_sz, 0);
int dstAlloc = portalAlloc(alloc_sz, 0);
int *srcBuffer = (int *)portalMmap(srcAlloc, alloc_sz);
int *dstBuffer = (int *)portalMmap(dstAlloc, alloc_sz);
for (int i = 0; i < 1024/4; i++) {
srcBuffer[i] = i;
fprintf(stderr, "src dram[%04x]=%08x\n", i*4, srcBuffer[i]);
}
int ref_srcAlloc = dma->reference(srcAlloc);
int ref_dstAlloc = dma->reference(dstAlloc);
if (1) {
int transferLen = 1024;
testRequest->startWriteDram(ref_srcAlloc, transferLen);
fprintf(stderr, "Started writing dram\n");
for (int i = 0; i < transferLen; i += DataBusWidth)
sem_wait(&write_sem);
testRequest->startReadDram(ref_dstAlloc, transferLen);
sem_wait(&read_sem);
}
for (int i = 0; i < 1024/4; i++) {
fprintf(stderr, "dst dram[%04x]=%08x\n", i*4, dstBuffer[i]);
}
int mismatches = 0;
for (int i = 0; i < 1024/4; i++) {
if (i != dstBuffer[i]) {
mismatches++;
fprintf(stderr, "mismatch dram[%04x]=%08x expected %08x\n", i*4, dstBuffer[i], i);
}
}
fprintf(stderr, "%d mismatches\n", mismatches);
return mismatches ? 1 : 0;
}
int main(int argc, char **argv) {
EncoderTestRequestProxy *device = new EncoderTestRequestProxy(IfcNames_EncoderTestRequestS2H);
EncoderTestIndication deviceIndication(IfcNames_EncoderTestIndicationH2S);
MemServerRequestProxy *hostMemServerRequest = new MemServerRequestProxy(IfcNames_MemServerRequestS2H);
MMURequestProxy *dmap = new MMURequestProxy(IfcNames_MMURequestS2H);
DmaManager *dma = new DmaManager(dmap);
MemServerIndication hostMemServerIndication(hostMemServerRequest, IfcNames_MemServerIndicationH2S);
MMUIndication hostMMUIndication(dma, IfcNames_MMUIndicationH2S);
const std::string path="../../data/xgmii.data";
std::ifstream traceinfo(path.c_str());
std::string line;
int srcAlloc;
srcAlloc = portalAlloc(alloc_sz, 0);
unsigned long int *srcBuffer = (unsigned long int *)portalMmap(srcAlloc, alloc_sz);
for (int i = 0; i < numWords; /*NONE*/ ) {
std::getline(traceinfo, line);
std::istringstream iss(line);
std::string first_64;
iss >> first_64;
std::string second_64;
iss >> second_64;
srcBuffer[i++] = strtoul(second_64.c_str(), NULL, 16); /*second_64 is LSB*/
srcBuffer[i++] = strtoul(first_64.c_str(), NULL, 16);
}
portalCacheFlush(srcAlloc, srcBuffer, alloc_sz, 1);
unsigned int ref_srcAlloc = dma->reference(srcAlloc);
printf( "Main::starting read %08x\n", numWords);
device->startEncoder(ref_srcAlloc, numWords, burstLen, 1);
sem_wait(&test_sem);
return 0;
}
int main(int argc, const char **argv)
{
int srcAlloc;
unsigned int *srcBuffer = 0;
MemreadRequestProxy *device = 0;
DmaConfigProxy *dmap = 0;
MemreadIndication *deviceIndication = 0;
DmaIndication *dmaIndication = 0;
fprintf(stderr, "Main::%s %s\n", __DATE__, __TIME__);
device = new MemreadRequestProxy(IfcNames_MemreadRequest);
dmap = new DmaConfigProxy(IfcNames_DmaConfig);
DmaManager *dma = new DmaManager(dmap);
deviceIndication = new MemreadIndication(IfcNames_MemreadIndication);
dmaIndication = new DmaIndication(dma, IfcNames_DmaIndication);
fprintf(stderr, "Main::allocating memory...\n");
srcAlloc = portalAlloc(alloc_sz);
srcBuffer = (unsigned int *)portalMmap(srcAlloc, alloc_sz);
portalExec_start();
for (int i = 0; i < numWords; i++){
srcBuffer[i] = i;
}
portalDCacheFlushInval(srcAlloc, alloc_sz, srcBuffer);
fprintf(stderr, "Main::flush and invalidate complete\n");
unsigned int ref_srcAlloc = dma->reference(srcAlloc);
fprintf(stderr, "ref_srcAlloc=%d\n", ref_srcAlloc);
fprintf(stderr, "Main::starting read %08x\n", numWords);
portalTimerStart(0);
int burstLen = 16;
#ifndef BSIM
int iterCnt = 64;
#else
int iterCnt = 2;
#endif
device->startRead(ref_srcAlloc, numWords, burstLen, iterCnt);
sem_wait(&test_sem);
uint64_t cycles = portalTimerLap(0);
uint64_t beats = dma->show_mem_stats(ChannelType_Read);
float read_util = (float)beats/(float)cycles;
fprintf(stderr, "memory read utilization (beats/cycle): %f\n", read_util);
MonkitFile("perf.monkit")
.setHwCycles(cycles)
.setReadBwUtil(read_util)
.writeFile();
exit(mismatchCount ? 1 : 0);
}
int initNandSim(DmaManager *hostDma)
{
NandCfgRequestProxy *nandcfgRequest = new NandCfgRequestProxy(IfcNames_NandCfgRequestS2H);
NandCfgIndication *nandcfgIndication = new NandCfgIndication(IfcNames_NandCfgIndicationH2S);
int nandBytes = 1 << 12;
int nandAlloc = portalAlloc(nandBytes, 0);
fprintf(stderr, "testnandsim::nandAlloc=%d\n", nandAlloc);
int ref_nandAlloc = hostDma->reference(nandAlloc);
fprintf(stderr, "ref_nandAlloc=%d\n", ref_nandAlloc);
fprintf(stderr, "testnandsim::NAND alloc fd=%d ref=%d\n", nandAlloc, ref_nandAlloc);
nandcfgRequest->configureNand(ref_nandAlloc, nandBytes);
nandcfgIndication->wait();
const char *filename = "../test.bin";
fprintf(stderr, "testnandsim::opening %s\n", filename);
// open up the text file and read it into an allocated memory buffer
int data_fd = open(filename, O_RDONLY);
if (data_fd < 0) {
fprintf(stderr, "%s:%d failed to open file %s errno=%d:%s\n", __FUNCTION__, __LINE__, filename, errno, strerror(errno));
return 0;
}
off_t data_len = lseek(data_fd, 0, SEEK_END);
fprintf(stderr, "%s:%d fd=%d data_len=%ld\n", __FUNCTION__, __LINE__, data_fd, data_len);
data_len = data_len & ~15; // because we are using a burst length of 16
lseek(data_fd, 0, SEEK_SET);
int dataAlloc = portalAlloc(data_len, 0);
char *data = (char *)portalMmap(dataAlloc, data_len);
ssize_t read_len = read(data_fd, data, data_len);
if(read_len != data_len) {
fprintf(stderr, "%s:%d::error reading %s %ld %ld\n", __FUNCTION__, __LINE__, filename, (long)data_len, (long) read_len);
exit(-1);
}
int ref_dataAlloc = hostDma->reference(dataAlloc);
// write the contents of data into "flash" memory
portalCacheFlush(ref_dataAlloc, data, data_len, 1);
fprintf(stderr, "testnandsim::invoking write %08x %08lx\n", ref_dataAlloc, (long)data_len);
nandcfgRequest->startWrite(ref_dataAlloc, 0, 0, data_len, 16);
nandcfgIndication->wait();
fprintf(stderr, "%s:%d finished -- data_len=%ld\n", __FUNCTION__, __LINE__, data_len);
return data_len;
}
int main(int argc, const char **argv)
{
int test_result = 0;
int srcAlloc;
unsigned int *srcBuffer = 0;
fprintf(stderr, "Main::%s %s\n", __DATE__, __TIME__);
DmaManager *dma = platformInit();
ReadTestRequestProxy *device = new ReadTestRequestProxy(IfcNames_ReadTestRequestS2H,TILE_NUMBER);
ReadTestIndication memReadIndication(IfcNames_ReadTestIndicationH2S,TILE_NUMBER);
fprintf(stderr, "Main::allocating memory...\n");
srcAlloc = portalAlloc(alloc_sz, 0);
srcBuffer = (unsigned int *)portalMmap(srcAlloc, alloc_sz);
for (int i = 0; i < numWords; i++)
srcBuffer[i] = i;
portalCacheFlush(srcAlloc, srcBuffer, alloc_sz, 1);
fprintf(stderr, "Main::flush and invalidate complete\n");
/* Test 1: check that match is ok */
unsigned int ref_srcAlloc = dma->reference(srcAlloc);
fprintf(stderr, "ref_srcAlloc=%d\n", ref_srcAlloc);
fprintf(stderr, "Main::orig_test read numWords=%d burstLen=%d iterCnt=%d\n", numWords, burstLen, iterCnt);
portalTimerStart(0);
device->startRead(ref_srcAlloc, numWords * 4, burstLen * 4, iterCnt);
sem_wait(&test_sem);
if (mismatchCount) {
fprintf(stderr, "Main::first test failed to match %d.\n", mismatchCount);
test_result++; // failed
}
platformStatistics();
/* Test 2: check that mismatch is detected */
srcBuffer[0] = -1;
srcBuffer[numWords/2] = -1;
srcBuffer[numWords-1] = -1;
portalCacheFlush(srcAlloc, srcBuffer, alloc_sz, 1);
fprintf(stderr, "Starting second read, mismatches expected\n");
mismatchCount = 0;
device->startRead(ref_srcAlloc, numWords * 4, burstLen * 4, iterCnt);
sem_wait(&test_sem);
if (mismatchCount != 3/*number of errors introduced above*/ * iterCnt) {
fprintf(stderr, "Main::second test failed to match mismatchCount=%d (expected %d) iterCnt=%d numWords=%d.\n",
mismatchCount, 3*iterCnt,
iterCnt, numWords);
test_result++; // failed
}
#if 0
MonkitFile pmf("perf.monkit");
pmf.setHwCycles(cycles)
.setReadBwUtil(read_util)
.writeFile();
#endif
return test_result;
}
char *SpikeHw::allocate_mem(size_t memsz)
{
if (!spikeHw)
spikeHw = new SpikeHw();
int memfd = portalAlloc(memsz, 1);
if (memfd < 0)
return 0;
char *buf = (char *)portalMmap(memfd, memsz);
if (buf == MAP_FAILED) {
close(memfd);
return 0;
}
fprintf(stderr, "SpikeHw::allocate_mem memsz=%lx memfd=%d buf=%p\n", memsz, memfd, buf);
spikeHw->setupDma(memfd);
return buf;
}
int main(int argc, const char **argv)
{
int totalsize = 4096;
int fd = portalAlloc(totalsize, 0);
if (fd < 0) {
fprintf(stderr, "memory alloc failed\n");
exit(-1);
}
fprintf(stderr, "allocated %d bytes, fd=%d\n", totalsize, fd);
int *mem = (int*)portalMmap(fd, totalsize);
*mem = 1;
fprintf(stderr, "Before CV_XADD: mem=%p *mem=%d\n", mem, *mem);
CV_XADD(mem, -1);
fprintf(stderr, "Before CV_XADD: *mem=%d\n", *mem);
exit(0);
}
int main(int argc, const char **argv)
{
int mismatch = 0;
uint32_t sg = 0;
int max_error = 10;
if (sem_init(&test_sem, 1, 0)) {
fprintf(stderr, "error: failed to init test_sem\n");
exit(1);
}
fprintf(stderr, "testmemwrite: start %s %s\n", __DATE__, __TIME__);
DmaManager *dma = platformInit();
MemwriteRequestProxy *device = new MemwriteRequestProxy(IfcNames_MemwriteRequestS2H);
MemwriteIndication deviceIndication(IfcNames_MemwriteIndicationH2S);
fprintf(stderr, "main::allocating memory...\n");
int dstAlloc = portalAlloc(alloc_sz, 0);
unsigned int *dstBuffer = (unsigned int *)portalMmap(dstAlloc, alloc_sz);
#ifdef FPGA0_CLOCK_FREQ
long req_freq = FPGA0_CLOCK_FREQ, freq = 0;
setClockFrequency(0, req_freq, &freq);
fprintf(stderr, "Requested FCLK[0]=%ld actually %ld\n", req_freq, freq);
#endif
unsigned int ref_dstAlloc = dma->reference(dstAlloc);
for (int i = 0; i < numWords; i++)
dstBuffer[i] = 0xDEADBEEF;
portalCacheFlush(dstAlloc, dstBuffer, alloc_sz, 1);
fprintf(stderr, "testmemwrite: flush and invalidate complete\n");
fprintf(stderr, "testmemwrite: starting write %08x\n", numWords);
portalTimerStart(0);
device->startWrite(ref_dstAlloc, 0, numWords, burstLen, iterCnt);
sem_wait(&test_sem);
for (int i = 0; i < numWords; i++) {
if (dstBuffer[i] != sg) {
mismatch++;
if (max_error-- > 0)
fprintf(stderr, "testmemwrite: [%d] actual %08x expected %08x\n", i, dstBuffer[i], sg);
}
sg++;
}
platformStatistics();
fprintf(stderr, "testmemwrite: mismatch count %d.\n", mismatch);
exit(mismatch);
}
char *FpgaDev::allocate_mem(size_t memsz)
{
int memfd = portalAlloc(memsz, 1);
if (memfd < 0)
return 0;
char *buf = (char *)portalMmap(memfd, memsz);
if (buf == MAP_FAILED) {
close(memfd);
return 0;
}
fprintf(stderr, "FpgaDev::allocate_mem memsz=%lx memfd=%d buf=%p\n", memsz, memfd, buf);
if (!mainMemFd) {
setupDma(memfd);
mainMemFd = memfd;
mainMemBuf = buf;
fprintf(stderr, "FpgaDev::allocate_mem mainMemFd=%d\n", memfd);
}
return buf;
}
int main(int argc, const char **argv)
{
ReadTestRequestProxy *device = new ReadTestRequestProxy(IfcNames_ReadTestRequestS2H);
ReadTestIndication deviceIndication(IfcNames_ReadTestIndicationH2S);
DmaManager *dma = platformInit();
int srcAlloc;
srcAlloc = portalAlloc(test_sz, 0);
unsigned int *srcBuffer = (unsigned int *)portalMmap(srcAlloc, test_sz);
for (unsigned int i = 0; i < test_sz/sizeof(unsigned int); i++)
srcBuffer[i] = i;
portalCacheFlush(srcAlloc, srcBuffer, test_sz, 1);
unsigned int ref_srcAlloc = dma->reference(srcAlloc);
printf( "Main::starting read %lx\n", test_sz);
device->startRead(ref_srcAlloc, test_sz, burstLen, 1);
sem_wait(&test_sem);
return 0;
}
void PortalMatAllocator::allocate(int dims, const int* sizes, int type, int*& refcount,
uchar*& datastart, uchar*& data, size_t* step)
{
size_t arraysize = step[0]*sizes[0];
size_t totalsize = cv::alignSize(arraysize, 4096);
int arraynum = numarrays++;
int fd = portalAlloc(totalsize, 0);
struct arrayInfo *info = &arrayInfo[arraynum];
info->fd = fd;
info->refcount = 1;
info->totalsize = totalsize;
info->data = (uchar*)portalMmap(fd, totalsize);
info->ref = 0;
data = datastart = (uchar*)info->data;
refcount = (int*)info;
fprintf(stderr, "PortalMatAllocator::allocate arraynum=%d arraysize=%ld totalsize=%ld datastart=%p refcount=%p end of data=%p\n",
arraynum, (long)arraysize, (long)totalsize, datastart, refcount, datastart+totalsize);
}
int main(int argc, char **argv) {
DtpTestRequestProxy *device = new DtpTestRequestProxy(IfcNames_DtpTestRequest);
DtpTestIndication *deviceIndication = new DtpTestIndication(IfcNames_DtpTestIndication);
MemServerRequestProxy *hostMemServerRequest = new MemServerRequestProxy(IfcNames_HostMemServerRequest);
MMURequestProxy *dmap = new MMURequestProxy(IfcNames_HostMMURequest);
DmaManager *dma = new DmaManager(dmap);
MemServerIndication *hostMemServerIndication = new MemServerIndication(hostMemServerRequest, IfcNames_HostMemServerIndication);
MMUIndication *hostMMUIndication = new MMUIndication(dma, IfcNames_HostMMUIndication);
const std::string path="../data/encoded.data2";
std::ifstream traceinfo(path.c_str());
std::string line;
int srcAlloc;
srcAlloc = portalAlloc(alloc_sz);
unsigned long int *srcBuffer = (unsigned long int *)portalMmap(srcAlloc, alloc_sz);
portalExec_start();
for (int i = 0; i < numWords; /*NONE*/ ) {
std::getline(traceinfo, line);
std::istringstream iss(line);
std::string ignored_first_64;
iss >> ignored_first_64;
std::string first_64;
iss >> first_64;
std::string ignored_second_64;
iss >> ignored_second_64;
std::string second_64;
iss >> second_64;
srcBuffer[i++] = strtoul(second_64.c_str(), NULL, 16); /*second_64 is LSB*/
srcBuffer[i++] = strtoul(first_64.c_str(), NULL, 16);
//std::cout << first_64 << second_64 << std::endl;
}
portalDCacheFlushInval(srcAlloc, alloc_sz, srcBuffer);
unsigned int ref_srcAlloc = dma->reference(srcAlloc);
printf( "Main::starting read %08x\n", numWords);
device->startDtp(ref_srcAlloc, numWords, burstLen, 1);
sem_wait(&test_sem);
return 0;
}
void PortalMatAllocator::allocate(int dims, const int* sizes, int type, int*& refcount,
uchar*& datastart, uchar*& data, size_t* step)
{
size_t arraysize = step[0]*sizes[0];
size_t totalsize = cv::alignSize(arraysize+4*sizeof(int), 4096);
int arraynum = numarrays++;
arrayFds[arraynum] = portalAlloc(totalsize);
data = datastart = (uchar*)(unsigned int *)portalMmap(arrayFds[arraynum], totalsize);
refcount = (int*)(data + arraysize);
int *parraynum = refcount+1;
*parraynum = arraynum;
int *pref = refcount+2;
*pref = 0;
int *psize = refcount+3;
*psize = totalsize;
*refcount = 1;
fprintf(stderr, "PortalMatAllocator::allocate datastart=%p arraynum=%d size=%ld\n",
datastart, arraynum, (long)totalsize);
}
int main(int argc, const char **argv)
{
size_t alloc_sz = 1024*1024;
MemwriteRequestProxy *device = new MemwriteRequestProxy(IfcNames_MemwriteRequestS2H);
MemwriteIndication deviceIndication(IfcNames_MemwriteIndicationH2S);
DmaManager *dma = platformInit();
sem_init(&done_sem, 1, 0);
int dstAlloc = portalAlloc(alloc_sz, 0);
unsigned int *dstBuffer = (unsigned int *)portalMmap(dstAlloc, alloc_sz);
for (unsigned int i = 0; i < alloc_sz/sizeof(uint32_t); i++)
dstBuffer[i] = 0xDEADBEEF;
portalCacheFlush(dstAlloc, dstBuffer, alloc_sz, 1);
fprintf(stderr, "parent::starting write\n");
unsigned int ref_dstAlloc = dma->reference(dstAlloc);
device->startWrite(ref_dstAlloc, alloc_sz, 2 * sizeof(uint32_t));
sem_wait(&done_sem);
memdump((unsigned char *)dstBuffer, 32, "MEM");
fprintf(stderr, "%s: done\n", __FUNCTION__);
}
int main(int argc, const char **argv)
{
MaxcommonsubseqRequestProxy *device = 0;
MaxcommonsubseqIndication *deviceIndication = 0;
fprintf(stderr, "%s %s\n", __DATE__, __TIME__);
device = new MaxcommonsubseqRequestProxy(IfcNames_MaxcommonsubseqRequest);
MemServerRequestProxy *hostMemServerRequest = new MemServerRequestProxy(IfcNames_HostMemServerRequest);
MMURequestProxy *dmap = new MMURequestProxy(IfcNames_HostMMURequest);
DmaManager *dma = new DmaManager(dmap);
MemServerIndication *hostMemServerIndication = new MemServerIndication(hostMemServerRequest, IfcNames_HostMemServerIndication);
MMUIndication *hostMMUIndication = new MMUIndication(dma, IfcNames_HostMMUIndication);
deviceIndication = new MaxcommonsubseqIndication(IfcNames_MaxcommonsubseqIndication);
if(sem_init(&test_sem, 1, 0)){
fprintf(stderr, "failed to init test_sem\n");
return -1;
}
portalExec_start();
fprintf(stderr, "simple tests\n");
int strAAlloc;
int strBAlloc;
int fetchAlloc;
unsigned int alloc_len = 128;
unsigned int fetch_len = alloc_len * alloc_len;
int rcA, rcB, rcFetch;
struct stat statAbuf, statBbuf, statFetchbuf;
fetchAlloc = portalAlloc(fetch_len*sizeof(uint16_t));
rcFetch = fstat(fetchAlloc, &statFetchbuf);
if (rcA < 0) perror("fstatFetch");
int *fetch = (int *)portalMmap(fetchAlloc, fetch_len * sizeof(uint16_t));
if (fetch == MAP_FAILED) perror("fetch mmap failed");
assert(fetch != MAP_FAILED);
strAAlloc = portalAlloc(alloc_len);
rcA = fstat(strAAlloc, &statAbuf);
if (rcA < 0) perror("fstatA");
char *strA = (char *)portalMmap(strAAlloc, alloc_len);
if (strA == MAP_FAILED) perror("strA mmap failed");
assert(strA != MAP_FAILED);
strBAlloc = portalAlloc(alloc_len);
rcB = fstat(strBAlloc, &statBbuf);
if (rcA < 0) perror("fstatB");
char *strB = (char *)portalMmap(strBAlloc, alloc_len);
if (strB == MAP_FAILED) perror("strB mmap failed");
assert(strB != MAP_FAILED);
/*
const char *strA_text = "___a_____b______c____";
const char *strB_text = "..a........b.c....";
*/
const char *strA_text = "012a45678b012345c7890";
const char *strB_text = "ABaDEFGHIJKbMcOPQR";
assert(strlen(strA_text) < alloc_len);
assert(strlen(strB_text) < alloc_len);
strncpy(strA, strA_text, alloc_len);
strncpy(strB, strB_text, alloc_len);
int strA_len = strlen(strA);
int strB_len = strlen(strB);
uint16_t swFetch[fetch_len];
portalTimerInit();
portalTimerStart(0);
fprintf(stderr, "elapsed time (hw cycles): %lld\n", (long long)portalTimerLap(0));
portalDCacheFlushInval(strAAlloc, alloc_len, strA);
portalDCacheFlushInval(strBAlloc, alloc_len, strB);
portalDCacheFlushInval(fetchAlloc, fetch_len*sizeof(uint16_t), fetch);
unsigned int ref_strAAlloc = dma->reference(strAAlloc);
unsigned int ref_strBAlloc = dma->reference(strBAlloc);
unsigned int ref_fetchAlloc = dma->reference(fetchAlloc);
device->setupA(ref_strAAlloc, 0, strA_len);
sem_wait(&test_sem);
device->setupB(ref_strBAlloc, 0, strB_len);
sem_wait(&test_sem);
uint64_t cycles;
uint64_t beats;
fprintf(stderr, "starting algorithm A\n");
portalTimerInit();
portalTimerStart(0);
device->start(0);
sem_wait(&test_sem);
cycles = portalTimerLap(0);
beats = hostMemServerIndication->getMemoryTraffic(ChannelType_Read);
fprintf(stderr, "hw cycles: %f\n", (float)cycles);
device->fetch(ref_fetchAlloc, 0, 0, fetch_len / 2);
sem_wait(&test_sem);
printf("fetch 1 finished \n");
device->fetch(ref_fetchAlloc, fetch_len, fetch_len / 2, fetch_len / 2);
sem_wait(&test_sem);
printf("fetch 2 finished \n");
memcpy(swFetch, fetch, fetch_len * sizeof(uint16_t));
printf(" ");
for (int j = 0; j <= strB_len; j += 1) {
printf("%4d", j);
}
printf("\n");
printf(" ");
for (int j = 0; j <= strB_len; j += 1) {
printf("%4c", strB[j-1]);
}
printf("\n");
for (int i = 0; i <= strA_len; i += 1) {
printf("%4c%4d", strA[i-1], i);
for (int j = 0; j <= strB_len; j += 1) {
printf("%4d", swFetch[(i << 7) + j] & 0xff);
}
printf("\n");
}
fprintf(stderr, "starting algorithm B, forward\n");
portalTimerInit();
portalTimerStart(0);
device->start(1);
sem_wait(&test_sem);
cycles = portalTimerLap(0);
fprintf(stderr, "hw cycles: %f\n", (float)cycles);
device->fetch(ref_fetchAlloc, 0, 0, fetch_len / 2);
sem_wait(&test_sem);
memcpy(swFetch, fetch, fetch_len * sizeof(uint16_t));
printf(" ");
for (int j = 0; j <= strB_len; j += 1) {
printf("%4d", j);
}
printf("\n");
printf(" ");
for (int j = 0; j <= strB_len; j += 1) {
printf("%4c", strB[j-1]);
}
printf("\n");
for (int i = 0; i < 1; i += 1) {
printf("%4c%4d", strA[i-1], i);
for (int j = 0; j <= strB_len; j += 1) {
printf("%4d", swFetch[(i << 7) + j] & 0xff);
}
printf("\n");
}
/* reverse argument strings */
for (int i = 0; i < strA_len; i += 1) {
strA[i] = strA_text[strA_len - i - 1];
}
for (int i = 0; i < strB_len; i += 1) {
strB[i] = strB_text[strB_len - i - 1];
}
device->setupA(ref_strAAlloc, 0, strA_len);
sem_wait(&test_sem);
device->setupB(ref_strBAlloc, 0, strB_len);
sem_wait(&test_sem);
fprintf(stderr, "starting algorithm B, backward\n");
portalTimerInit();
portalTimerStart(0);
device->start(2);
sem_wait(&test_sem);
cycles = portalTimerLap(0);
fprintf(stderr, "hw cycles: %f\n", (float)cycles);
device->fetch(ref_fetchAlloc, 0, 0, fetch_len / 2);
sem_wait(&test_sem);
memcpy(swFetch, fetch, fetch_len * sizeof(uint16_t));
printf(" ");
for (int j = 0; j <= strB_len; j += 1) {
printf("%4d", j);
}
printf("\n");
printf(" ");
for (int j = 0; j <= strB_len; j += 1) {
printf("%4c", strB[j-1]);
}
printf("\n");
for (int i = 0; i < 1; i += 1) {
printf("%4c%4d", strA[i-1], i);
for (int j = 0; j <= strB_len; j += 1) {
printf("%4d", swFetch[(i << 7) + j] & 0xff);
}
printf("\n");
}
/* forward argument strings */
for (int i = 0; i < strA_len; i += 1) {
strA[i] = strA_text[i];
}
for (int i = 0; i < strB_len; i += 1) {
strB[i] = strB_text[i];
}
device->setupA(ref_strAAlloc, 0, strA_len);
sem_wait(&test_sem);
device->setupB(ref_strBAlloc, 0, strB_len);
sem_wait(&test_sem);
fprintf(stderr, "starting algorithm C\n");
portalTimerInit();
portalTimerStart(0);
device->start(3);
sem_wait(&test_sem);
cycles = portalTimerLap(0);
fprintf(stderr, "hw cycles: %f\n", (float)cycles);
device->fetch(ref_fetchAlloc, 0, 0, fetch_len / 2);
sem_wait(&test_sem);
memcpy(swFetch, fetch, fetch_len * sizeof(uint16_t));
if (result_length > strB_len) result_length = strB_len;
printf("Algorithm C results\n");
for (int j = 0; j < result_length; j += 1) {
char c = swFetch[j] & 0xff;
printf(" %02x (%c)", 0xff & c, (isalnum(c) ? c: '_'));
}
printf("\n");
close(strAAlloc);
close(strBAlloc);
close(fetchAlloc);
}
int main(int argc, const char **argv)
{
MemServerRequestProxy *hostMemServerRequest = new MemServerRequestProxy(IfcNames_HostMemServerRequest);
MMURequestProxy *dmap = new MMURequestProxy(IfcNames_HostMMURequest);
DmaManager *dma = new DmaManager(dmap);
MemServerIndication *hostMemServerIndication = new MemServerIndication(hostMemServerRequest, IfcNames_HostMemServerIndication);
MMUIndication *hostMMUIndication = new MMUIndication(dma, IfcNames_HostMMUIndication);
fprintf(stderr, "Main::allocating memory...\n");
device = new FlashRequestProxy(IfcNames_FlashRequest);
FlashIndication *deviceIndication = new FlashIndication(IfcNames_FlashIndication);
srcAlloc = portalAlloc(srcAlloc_sz);
dstAlloc = portalAlloc(dstAlloc_sz);
srcBuffer = (unsigned int *)portalMmap(srcAlloc, srcAlloc_sz);
dstBuffer = (unsigned int *)portalMmap(dstAlloc, dstAlloc_sz);
fprintf(stderr, "dstAlloc = %x\n", dstAlloc);
fprintf(stderr, "srcAlloc = %x\n", srcAlloc);
pthread_mutex_init(&flashReqMutex, NULL);
pthread_cond_init(&flashFreeTagCond, NULL);
printf( "Done initializing hw interfaces\n" ); fflush(stdout);
portalExec_start();
printf( "Done portalExec_start\n" ); fflush(stdout);
portalDCacheFlushInval(dstAlloc, dstAlloc_sz, dstBuffer);
portalDCacheFlushInval(srcAlloc, srcAlloc_sz, srcBuffer);
ref_dstAlloc = dma->reference(dstAlloc);
ref_srcAlloc = dma->reference(srcAlloc);
for (int t = 0; t < NUM_TAGS; t++) {
readTagTable[t].busy = false;
writeTagTable[t].busy = false;
int byteOffset = t * PAGE_SIZE;
device->addDmaWriteRefs(ref_dstAlloc, byteOffset, t);
device->addDmaReadRefs(ref_srcAlloc, byteOffset, t);
readBuffers[t] = dstBuffer + byteOffset/sizeof(unsigned int);
writeBuffers[t] = srcBuffer + byteOffset/sizeof(unsigned int);
}
for (int blk=0; blk<BLOCKS_PER_CHIP; blk++) {
for (int c=0; c<CHIPS_PER_BUS; c++) {
for (int bus=0; bus< CHIPS_PER_BUS; bus++) {
flashStatus[bus][c][blk] = UNINIT;
}
}
}
for (int t = 0; t < NUM_TAGS; t++) {
for ( int i = 0; i < PAGE_SIZE/sizeof(unsigned int); i++ ) {
readBuffers[t][i] = 0;
writeBuffers[t][i] = 0;
}
}
device->start(0);
device->setDebugVals(0,0); //flag, delay
device->debugDumpReq(0);
sleep(1);
device->debugDumpReq(0);
sleep(1);
//TODO: test writes and erases
//test erases
for (int blk = 0; blk < BLOCKS_PER_CHIP; blk++){
for (int chip = 0; chip < CHIPS_PER_BUS; chip++){
for (int bus = 0; bus < NUM_BUSES; bus++){
eraseBlock(bus, chip, blk, waitIdleEraseTag());
}
}
}
while (true) {
usleep(100);
if ( getNumErasesInFlight() == 0 ) break;
}
//read back erased pages
for (int blk = 0; blk < BLOCKS_PER_CHIP; blk++){
for (int chip = 0; chip < CHIPS_PER_BUS; chip++){
for (int bus = 0; bus < NUM_BUSES; bus++){
int page = 0;
readPage(bus, chip, blk, page, waitIdleReadBuffer());
}
}
}
while (true) {
usleep(100);
if ( getNumReadsInFlight() == 0 ) break;
}
//write pages
//FIXME: in old xbsv, simulatneous DMA reads using multiple readers cause kernel panic
//Issue each bus separately for now
for (int bus = 0; bus < NUM_BUSES; bus++){
for (int blk = 0; blk < BLOCKS_PER_CHIP; blk++){
for (int chip = 0; chip < CHIPS_PER_BUS; chip++){
int page = 0;
//get free tag
int freeTag = waitIdleWriteBuffer();
//fill write memory
for (int w=0; w<PAGE_SIZE/sizeof(unsigned int); w++) {
writeBuffers[freeTag][w] = hashAddrToData(bus, chip, blk, w);
}
//send request
writePage(bus, chip, blk, page, freeTag);
}
while (true) {
usleep(100);
if ( getNumWritesInFlight() == 0 ) break;
}
}
} //each bus
timespec start, now;
clock_gettime(CLOCK_REALTIME, & start);
for (int repeat = 0; repeat < 1; repeat++){
for (int blk = 0; blk < BLOCKS_PER_CHIP; blk++){
for (int chip = 0; chip < CHIPS_PER_BUS; chip++){
for (int bus = 0; bus < NUM_BUSES; bus++){
//int blk = rand() % 1024;
//int chip = rand() % 8;
//int bus = rand() % 8;
int page = 0;
readPage(bus, chip, blk, page, waitIdleReadBuffer());
}
}
}
}
int elapsed = 0;
while (true) {
usleep(100);
if (elapsed == 0) {
elapsed=10000;
device->debugDumpReq(0);
}
else {
elapsed--;
}
if ( getNumReadsInFlight() == 0 ) break;
}
device->debugDumpReq(0);
clock_gettime(CLOCK_REALTIME, & now);
fprintf(stderr, "LOG: finished reading from page! %f\n", timespec_diff_sec(start, now) );
for ( int t = 0; t < NUM_TAGS; t++ ) {
for ( int i = 0; i < PAGE_SIZE/sizeof(unsigned int); i++ ) {
fprintf(stderr, "%x %x %x\n", t, i, readBuffers[t][i] );
}
}
if (testPass==1) {
fprintf(stderr, "LOG: TEST PASSED!\n");
}
else {
fprintf(stderr, "LOG: **ERROR: TEST FAILED!\n");
}
}
int main(int argc, const char **argv)
{
FlashRequestProxy *device = 0;
DmaConfigProxy *dmap = 0;
FlashIndication *deviceIndication = 0;
DmaIndication *dmaIndication = 0;
if(sem_init(&done_sem, 1, 0)){
fprintf(stderr, "failed to init done_sem\n");
exit(1);
}
fprintf(stderr, "%s %s\n", __DATE__, __TIME__);
device = new FlashRequestProxy(IfcNames_FlashRequest);
dmap = new DmaConfigProxy(IfcNames_DmaConfig);
DmaManager *dma = new DmaManager(dmap);
deviceIndication = new FlashIndication(IfcNames_FlashIndication);
dmaIndication = new DmaIndication(dma, IfcNames_DmaIndication);
fprintf(stderr, "Main::allocating memory...\n");
for ( int i = 0; i < DMA_BUFFER_COUNT; i++ ) {
srcAllocs[i] = portalAlloc(walloc_sz);
dstAllocs[i] = portalAlloc(ralloc_sz);
srcBuffers[i] = (unsigned int *)portalMmap(srcAllocs[i], walloc_sz);
dstBuffers[i] = (unsigned int *)portalMmap(dstAllocs[i], ralloc_sz);
}
portalExec_start();
for ( int i = 0; i < DMA_BUFFER_COUNT; i++ ) {
portalDCacheFlushInval(srcAllocs[i], walloc_sz, srcBuffers[i]);
portalDCacheFlushInval(dstAllocs[i], ralloc_sz, dstBuffers[i]);
ref_srcAllocs[i] = dma->reference(srcAllocs[i]);
ref_dstAllocs[i] = dma->reference(dstAllocs[i]);
}
// Storage system init /////////////////////////////////
curWritesInFlight = 0;
curCmdCountBudget = 0;
pthread_mutex_init(&freeListMutex, NULL);
pthread_cond_init(&freeListCond, NULL);
pthread_mutex_init(&flashReqMutex, NULL);
pthread_mutex_init(&cmdReqMutex, NULL);
pthread_cond_init(&flashReqCond, NULL);
pthread_cond_init(&cmdReqCond, NULL);
for ( int i = 0; i < DMA_BUFFER_COUNT; i++ ) {
for ( int j = 0; j < WRITE_BUFFER_WAYS; j++ ) {
int idx = i*WRITE_BUFFER_WAYS+j;
srcBufferBusy[idx] = false;
int offset = j*1024*16;
device->addWriteHostBuffer(ref_srcAllocs[i], offset, idx);
writeBuffers[idx] = srcBuffers[i] + (offset/sizeof(unsigned int));
}
}
for ( int i = 0; i < DMA_BUFFER_COUNT; i++ ) {
for ( int j = 0; j < READ_BUFFER_WAYS; j++ ) {
int idx = i*READ_BUFFER_WAYS+j;
int offset = j*1024*16;
device->addReadHostBuffer(ref_dstAllocs[i], offset, idx);
readBuffers[idx] = dstBuffers[i] + (offset/sizeof(unsigned int));
}
}
for ( int i = 0; i > TAG_COUNT; i++ ) {
readTagBusy[i] = false;
}
pthread_t ftid;
pthread_create(&ftid, NULL, return_finished_readbuffer, (void*)device);
/////////////////////////////////////////////////////////
fprintf(stderr, "Main::flush and invalidate complete\n");
clock_gettime(CLOCK_REALTIME, & deviceIndication->aurorastart);
device->sendTest(LARGE_NUMBER*1024);
for ( int j = 0; j < WRITE_BUFFER_COUNT; j++ ) {
for ( int i = 0; i < (8192+64)/4; i++ ) {
writeBuffers[j][i] = i;
}
}
for ( int j = 0; j < READ_BUFFER_COUNT; j++ ) {
for ( int i = 0; i < (8192+64)/4; i++ ) {
readBuffers[j][i] = 8192/4-i;
}
}
device->start(0);
timespec start, now;
printf( "writing pages to flash!\n" );
clock_gettime(CLOCK_REALTIME, & start);
for ( int i = 0; i < LARGE_NUMBER/4; i++ ) {
for ( int j = 0; j < 4; j++ ) {
if ( i % 1024 == 0 )
printf( "writing page %d\n", i );
writePage(device, j,0,0,i,waitIdleWriteBuffer());
}
}
printf( "waiting for writing pages to flash!\n" );
while ( getNumWritesInFlight() > 0 ) usleep(1000);
clock_gettime(CLOCK_REALTIME, & now);
printf( "finished writing to page! %f\n", timespec_diff_sec(start, now) );
printf( "wrote pages to flash!\n" );
clock_gettime(CLOCK_REALTIME, & start);
for ( int i = 0; i < LARGE_NUMBER/4; i++ ) {
for ( int j = 0; j < 4; j++ ) {
readPage(device, j,0,0,i);
if ( i % 1024 == 0 )
printf( "reading page %d\n", i );
}
}
printf( "trying reading from page!\n" );
while (true) {
/*
pthread_mutex_lock(&freeListMutex);
bufferId bid = popReadyReadBuffer();
int rrb = bid.bufidx;
while (rrb >= 0 ) {
setFinishedReadBuffer(rrb);
rrb = popReadyReadBuffer().bufidx;
}
flushFinishedReadBuffers(device);
pthread_cond_wait(&freeListCond, &freeListMutex);
pthread_mutex_unlock(&freeListMutex);
*/
usleep(100);
if ( getNumReadsInFlight() == 0 ) break;
}
clock_gettime(CLOCK_REALTIME, & now);
printf( "finished reading from page! %f\n", timespec_diff_sec(start, now) );
for ( int i = 0; i < (8192+64)/4; i++ ) {
for ( int j = 0; j < READ_BUFFER_COUNT; j++ ) {
if ( i > (8192+64)/4 - 2 )
printf( "%d %d %d\n", j, i, readBuffers[j][i] );
}
}
for ( int i = 0; i < 2048; i++ ) {
printf( "%d: %f\n", i, timecheck[i] );
}
printf( "Command buget was gone:%d \nTag was busy:%d\n", noCmdBudgetCount, noTagCount );
exit(0);
}
int main(int argc, const char **argv)
{
int myid = 0;
fprintf(stderr, "Main: myid=%d\n", myid);
MemServerRequestProxy *hostMemServerRequest = new MemServerRequestProxy(IfcNames_HostMemServerRequest);
MMURequestProxy *dmap = new MMURequestProxy(IfcNames_HostMMURequest);
DmaManager *dma = new DmaManager(dmap);
MemServerIndication *hostMemServerIndication = new MemServerIndication(hostMemServerRequest, IfcNames_HostMemServerIndication);
MMUIndication *hostMMUIndication = new MMUIndication(dma, IfcNames_HostMMUIndication);
fprintf(stderr, "Main::allocating memory...\n");
device = new FlashRequestProxy(IfcNames_FlashRequest);
FlashIndication *deviceIndication = new FlashIndication(IfcNames_FlashIndication);
srcAlloc = portalAlloc(srcAlloc_sz);
dstAlloc = portalAlloc(dstAlloc_sz);
srcBuffer = (unsigned int *)portalMmap(srcAlloc, srcAlloc_sz);
dstBuffer = (unsigned int *)portalMmap(dstAlloc, dstAlloc_sz);
fprintf(stderr, "dstAlloc = %x\n", dstAlloc);
fprintf(stderr, "srcAlloc = %x\n", srcAlloc);
pthread_mutex_init(&flashReqMutex, NULL);
pthread_cond_init(&flashFreeTagCond, NULL);
printf( "Done initializing hw interfaces\n" ); fflush(stdout);
portalExec_start();
printf( "Done portalExec_start\n" ); fflush(stdout);
portalDCacheFlushInval(dstAlloc, dstAlloc_sz, dstBuffer);
portalDCacheFlushInval(srcAlloc, srcAlloc_sz, srcBuffer);
ref_dstAlloc = dma->reference(dstAlloc);
ref_srcAlloc = dma->reference(srcAlloc);
device->setDmaWriteRef(ref_dstAlloc);
device->setDmaReadRef(ref_srcAlloc);
for (int t = 0; t < NUM_TAGS; t++) {
readTagTable[t].busy = false;
writeTagTable[t].busy = false;
int byteOffset = t * PAGE_SIZE;
printf("byteOffset=%x\n", byteOffset); fflush(stdout);
readBuffers[t] = dstBuffer + byteOffset/sizeof(unsigned int);
writeBuffers[t] = srcBuffer + byteOffset/sizeof(unsigned int);
}
for (int node=0; node<NUM_NODES; node++) {
for (int blk=0; blk<BLOCKS_PER_CHIP; blk++) {
for (int c=0; c<CHIPS_PER_BUS; c++) {
for (int bus=0; bus< CHIPS_PER_BUS; bus++) {
flashStatus[node][bus][c][blk] = UNINIT;
}
}
}
}
for (int t = 0; t < NUM_TAGS; t++) {
for ( int i = 0; i < PAGE_SIZE/sizeof(unsigned int); i++ ) {
readBuffers[t][i] = 0;
writeBuffers[t][i] = 0;
}
}
//Start ext aurora
auroraifc_start(myid);
device->start(0);
device->setDebugVals(0,0); //flag, delay
device->debugDumpReq(0);
sleep(1);
device->debugDumpReq(0);
sleep(1);
if (myid==0) {
timespec start, now;
double timeElapsed = 0;
int node = myid;
if (doerasewrites) {
//test erases
//for (int node=NUM_NODES-1; node >= 1; node--)
//for (int node=DST_NODE; node == DST_NODE; node++)
for (int blk = 0; blk < BLOCKS_PER_CHIP; blk++){
for (int chip = 0; chip < CHIPS_PER_BUS; chip++){
for (int bus = 0; bus < NUM_BUSES; bus++){
eraseBlock(node, bus, chip, blk, waitIdleEraseTag());
}
}
}
while (true) {
usleep(100);
if ( getNumErasesInFlight() == 0 ) break;
}
//read back erased pages
//for (int node=NUM_NODES-1; node >= 1; node--)
//for (int node=DST_NODE; node == DST_NODE; node++)
for (int blk = 0; blk < BLOCKS_PER_CHIP; blk++){
for (int chip = 0; chip < CHIPS_PER_BUS; chip++){
for (int bus = 0; bus < NUM_BUSES; bus++){
int page = 0;
readPage(node, bus, chip, blk, page, waitIdleReadBuffer());
}
}
}
while (true) {
usleep(100);
if ( getNumReadsInFlight() == 0 ) break;
}
//write pages
//FIXME: in old xbsv, simulatneous DMA reads using multiple readers cause kernel panic
//Issue each bus separately for now
int pagesWritten = 0;
clock_gettime(CLOCK_REALTIME, & start);
//for (int node=NUM_NODES-1; node >= 1; node--)
//for (int node=DST_NODE; node == DST_NODE; node++)
for (int blk = 0; blk < BLOCKS_PER_CHIP; blk++){
for (int chip = 0; chip < CHIPS_PER_BUS; chip++){
for (int bus = 0; bus < NUM_BUSES; bus++){
int page = 0;
//get free tag
int freeTag = waitIdleWriteBuffer();
//fill write memory; REMOVE THIS FOR PERFORMANCE TESTING!
for (int w=0; w<PAGE_SIZE/sizeof(unsigned int); w++) {
writeBuffers[freeTag][w] = hashAddrToData(node, bus, chip, blk, w);
}
//send request
writePage(node, bus, chip, blk, page, freeTag);
pagesWritten++;
}
}
}
while (true) {
usleep(100);
if ( getNumWritesInFlight() == 0 ) break;
}
clock_gettime(CLOCK_REALTIME, & now);
timeElapsed = timespec_diff_sec(start, now);
fprintf(stderr, "LOG: finished writing! time=%f, numPages=%d, bandwidth=%f MB/s\n", timeElapsed, pagesWritten, (pagesWritten*8)/timeElapsed/1024 );
} //doerasewrites
sleep(1);
int pagesRead = 0;
clock_gettime(CLOCK_REALTIME, & start);
//for (int node=NUM_NODES-1; node >= 1; node--) {
//for (int node=DST_NODE; node == DST_NODE; node++) {
for (int repeat = 0; repeat < 10; repeat++){
for (int blk = 0; blk < BLOCKS_PER_CHIP; blk++){
for (int chip = 0; chip < CHIPS_PER_BUS; chip++){
for (int bus = 0; bus < NUM_BUSES; bus++){
pagesRead++;
int page = 0;
readPage(node, bus, chip, blk, page, waitIdleReadBuffer());
}
}
}
}
//}
while (true) {
if ( getNumReadsInFlight() == 0 ) break;
usleep(100);
}
clock_gettime(CLOCK_REALTIME, & now);
timeElapsed = timespec_diff_sec(start, now);
fprintf(stderr, "LOG: finished SEQUENTIAL reads! time=%f, numPages=%d, bandwidth=%f MB/s\n", timeElapsed, pagesRead, (pagesRead*8)/timeElapsed/1024 );
sleep(1);
pagesRead=0;
clock_gettime(CLOCK_REALTIME, & start);
for (int repeat = 0; repeat < 100000; repeat++){
int bus = rand()%NUM_BUSES;
int chip = rand()%CHIPS_PER_BUS;
int blk = rand()%BLOCKS_PER_CHIP;
int page = rand()%PAGES_PER_BLOCK;
readPage(node, bus, chip, blk, page, waitIdleReadBuffer());
pagesRead++;
}
while (true) {
if ( getNumReadsInFlight() == 0 ) break;
usleep(100);
}
clock_gettime(CLOCK_REALTIME, & now);
timeElapsed = timespec_diff_sec(start, now);
fprintf(stderr, "LOG: finished RANDOM reads! time=%f, numPages=%d, bandwidth=%f MB/s\n", timeElapsed, pagesRead, (pagesRead*8)/timeElapsed/1024 );
device->debugDumpReq(0);
sleep(1);
for ( int t = 0; t < NUM_TAGS; t++ ) {
for ( int i = 0; i < PAGE_SIZE/sizeof(unsigned int); i++ ) {
fprintf(stderr, "%x %x %x\n", t, i, readBuffers[t][i] );
}
}
if (!verbose) {
fprintf(stderr, "LOG: DONE! data check skipped\n");
}
else if (testPass==1) {
fprintf(stderr, "LOG: TEST PASSED!\n");
}
else {
fprintf(stderr, "LOG: **ERROR: TEST FAILED!\n");
}
}
else {
fprintf(stderr, "Sleeping infinitely...\n");
while (true) {
device->debugDumpReq(0);
sleep(1);
}
sleep(1000000);
}
}
int main(int argc, const char **argv)
{
if(sem_init(&done_sem, 1, 0)) {
fprintf(stderr, "failed to init done_sem\n");
exit(1);
}
if(sem_init(&memcmp_sem, 1, 0)) {
fprintf(stderr, "failed to init memcmp_sem\n");
exit(1);
}
fprintf(stderr, "%s %s\n", __DATE__, __TIME__);
MemcpyRequestProxy *device = new MemcpyRequestProxy(IfcNames_MemcpyRequestS2H);
deviceIndication = new MemcpyIndication(IfcNames_MemcpyIndicationH2S);
DmaManager *dma = platformInit();
fprintf(stderr, "Main::allocating memory...\n");
srcAlloc = portalAlloc(alloc_sz, 0);
dstAlloc = portalAlloc(alloc_sz, 0);
// for(int i = 0; i < srcAlloc->header.numEntries; i++)
// fprintf(stderr, "%lx %lx\n", srcAlloc->entries[i].dma_address, srcAlloc->entries[i].length);
// for(int i = 0; i < dstAlloc->header.numEntries; i++)
// fprintf(stderr, "%lx %lx\n", dstAlloc->entries[i].dma_address, dstAlloc->entries[i].length);
srcBuffer = (unsigned int *)portalMmap(srcAlloc, alloc_sz);
dstBuffer = (unsigned int *)portalMmap(dstAlloc, alloc_sz);
for (int i = 0; i < numWords; i++) {
srcBuffer[i] = i;
dstBuffer[i] = 0x5a5abeef;
}
portalCacheFlush(srcAlloc, srcBuffer, alloc_sz, 1);
portalCacheFlush(dstAlloc, dstBuffer, alloc_sz, 1);
fprintf(stderr, "Main::flush and invalidate complete\n");
unsigned int ref_srcAlloc = dma->reference(srcAlloc);
unsigned int ref_dstAlloc = dma->reference(dstAlloc);
fprintf(stderr, "ref_srcAlloc=%d\n", ref_srcAlloc);
fprintf(stderr, "ref_dstAlloc=%d\n", ref_dstAlloc);
// unsigned int refs[2] = {ref_srcAlloc, ref_dstAlloc};
// for(int j = 0; j < 2; j++){
// unsigned int ref = refs[j];
// for(int i = 0; i < numWords; i = i+(numWords/4)){
// dmap->addrRequest(ref, i*sizeof(unsigned int));
// sleep(1);
// }
// dmap->addrRequest(ref, (1<<16)*sizeof(unsigned int));
// sleep(1);
// }
fprintf(stderr, "Main::starting memcpy numWords:%d\n", numWords);
int burstLen = 32;
#ifndef SIMULATION
int iterCnt = 128;
#else
int iterCnt = 2;
#endif
portalTimerStart(0);
device->startCopy(ref_dstAlloc, ref_srcAlloc, numWords, burstLen, iterCnt);
sem_wait(&done_sem);
platformStatistics();
//float read_util = (float)read_beats/(float)cycles;
//float write_util = (float)write_beats/(float)cycles;
//fprintf(stderr, " iters: %d\n", iterCnt);
//fprintf(stderr, "wr_beats: %"PRIx64" %08lx\n", write_beats, (long)write_beats);
//fprintf(stderr, "rd_beats: %"PRIx64" %08lx\n", read_beats, (long)read_beats);
//fprintf(stderr, "numWords: %x\n", numWords);
//fprintf(stderr, " wr_est: %"PRIx64"\n", (write_beats*2)/iterCnt);
//fprintf(stderr, " rd_est: %"PRIx64"\n", (read_beats*2)/iterCnt);
//fprintf(stderr, "memory read utilization (beats/cycle): %f\n", read_util);
//fprintf(stderr, "memory write utilization (beats/cycle): %f\n", write_util);
#if 0
MonkitFile pmf("perf.monkit");
pmf.setHwCycles(cycles)
.setReadBwUtil(read_util)
.setWriteBwUtil(write_util)
.writeFile();
fprintf(stderr, "After updating perf.monkit\n");
#endif
sem_wait(&memcmp_sem);
fprintf(stderr, "after memcmp_sem memcmp_fail=%d\n", memcmp_fail);
return memcmp_fail;
}
int main(int argc, const char **argv)
{
int srcAlloc;
int nandAlloc;
unsigned int *srcBuffer;
unsigned int ref_srcAlloc;
unsigned int ref_nandAlloc;
int rc = 0, i;
pthread_t tid = 0;
init_portal_internal(&intarr[0], IfcNames_DmaIndication, DmaIndication_handleMessage, NULL, NULL, DmaIndication_reqinfo); // fpga1
init_portal_internal(&intarr[1], IfcNames_NandSimIndication, NandSimIndication_handleMessage, NULL, NULL, NandSimIndication_reqinfo); // fpga2
init_portal_internal(&intarr[2], IfcNames_DmaConfig, NULL, NULL, NULL, DmaConfig_reqinfo); // fpga3
init_portal_internal(&intarr[3], IfcNames_NandSimRequest, NULL, NULL, NULL, NandSimRequest_reqinfo); // fpga4
sem_init(&test_sem, 0, 0);
DmaManager_init(&priv, &intarr[2]);
srcAlloc = portalAlloc(alloc_sz, 0);
if (rc){
PORTAL_PRINTF("portal alloc failed rc=%d\n", rc);
return rc;
}
PORTAL_PRINTF( "Main: creating exec thread\n");
if(pthread_create(&tid, NULL, pthread_worker, NULL)){
PORTAL_PRINTF( "error creating exec thread\n");
return -1;
}
srcBuffer = (unsigned int *)portalMmap(srcAlloc, alloc_sz);
for (i = 0; i < numWords; i++) {
srcBuffer[i] = i;
}
PORTAL_PRINTF("Test 1: check for operations\n");
portalCacheFlush(srcAlloc, srcBuffer, alloc_sz, 1);
PORTAL_PRINTF("Main: before DmaManager_reference(%u)\n", srcAlloc);
ref_srcAlloc = DmaManager_reference(&priv, srcAlloc);
nandAlloc = portalAlloc (nandBytes, 0);
ref_nandAlloc = DmaManager_reference(&priv, nandAlloc);
PORTAL_PRINTF("Main::configure NAND fd=%d ref=%d\n", nandAlloc, ref_nandAlloc);
NandSimRequest_configureNand (&intarr[3], ref_nandAlloc, nandBytes);
sem_wait(&test_sem);
PORTAL_PRINTF( "Main::starting write - begin %08zx\n", numBytes);
NandSimRequest_startWrite (&intarr[3], ref_srcAlloc, 0, 0, numBytes, 16);
PORTAL_PRINTF( "Main:: wait for semaphore\n");
sem_wait(&test_sem);
for (i = 0; i < numWords; i++) {
srcBuffer[i] = 0;
}
PORTAL_PRINTF( "Main::starting read %08zx\n", numBytes);
NandSimRequest_startRead (&intarr[3], ref_srcAlloc, 0, 0, numBytes, 16);
sem_wait(&test_sem);
PORTAL_PRINTF ("read: %u %u %u %u\n", srcBuffer[0], srcBuffer[1], srcBuffer[2], srcBuffer[3]);
PORTAL_PRINTF( "Main::starting erase %08zx\n", numBytes);
NandSimRequest_startErase (&intarr[3], 0, numBytes);
sem_wait(&test_sem);
PORTAL_PRINTF( "Main::starting read %08zx\n", numBytes);
NandSimRequest_startRead (&intarr[3], ref_srcAlloc, 0, 0, numBytes, 16);
sem_wait(&test_sem);
PORTAL_PRINTF ("read: %u %u %u %u\n", srcBuffer[0], srcBuffer[1], srcBuffer[2], srcBuffer[3]);
PORTAL_PRINTF("\n\nTest 2: check for match\n");
{
unsigned long loop = 0;
unsigned long match = 0, mismatch = 0;
while (loop < nandBytes) {
int i;
for (i = 0; i < numBytes/sizeof(srcBuffer[0]); i++) {
srcBuffer[i] = loop+i;
}
/*PORTAL_PRINTF("Main::starting write ref=%d, len=%08zx (%lu)\n", ref_srcAlloc, numBytes, loop);*/
NandSimRequest_startWrite (&intarr[3], ref_srcAlloc, 0, loop, numBytes, 16);
sem_wait(&test_sem);
loop+=numBytes;
}
loop = 0;
while (loop < nandBytes) {
int i;
/*PORTAL_PRINTF("Main::starting read %08zx (%lu)\n", numBytes, loop);*/
NandSimRequest_startRead (&intarr[3], ref_srcAlloc, 0, loop, numBytes, 16);
sem_wait(&test_sem);
for (i = 0; i < numBytes/sizeof(srcBuffer[0]); i++) {
if (srcBuffer[i] != loop+i) {
PORTAL_PRINTF("Main::mismatch [%08zx] != [%08zx]\n", loop+i, srcBuffer[i]);
mismatch++;
} else {
match++;
}
}
loop+=numBytes;
}
PORTAL_PRINTF("Main::Summary: match=%lu mismatch:%lu (%lu) (%f percent)\n",
match, mismatch, match+mismatch, (float)mismatch/(float)(match+mismatch)*100.0);
}
PORTAL_PRINTF( "Main: all done\n");
#ifdef __KERNEL__
if (tid && !kthread_stop (tid)) {
PORTAL_PRINTF ("kthread stops\n");
}
wait_for_completion(&worker_completion);
#endif
PORTAL_PRINTF ("Main: ends\n");
return 0;
}
int main(int argc, const char **argv)
{
fprintf(stderr, "Main::%s %s\n", __DATE__, __TIME__);
DmaManager *hostDma = platformInit();
MMURequestProxy *nandsimMMU = new MMURequestProxy(IfcNames_NandMMURequestS2H);
DmaManager *nandsimDma = new DmaManager(nandsimMMU);
MMUIndicationNAND nandsimMMUIndication(nandsimDma,IfcNames_NandMMUIndicationH2S);
StrstrRequestProxy *strstrRequest = new StrstrRequestProxy(IfcNames_AlgoRequestS2H);
StrstrIndication *strstrIndication = new StrstrIndication(IfcNames_AlgoIndicationH2S);
//MemServerIndicationNAND nandsimMemServerIndication(IfcNames_NandMemServerIndication);
fprintf(stderr, "Main::allocating memory...\n");
// allocate memory for strstr data
int needleAlloc = portalAlloc(numBytes, 0);
int mpNextAlloc = portalAlloc(numBytes, 0);
int ref_needleAlloc = hostDma->reference(needleAlloc);
int ref_mpNextAlloc = hostDma->reference(mpNextAlloc);
fprintf(stderr, "%08x %08x\n", ref_needleAlloc, ref_mpNextAlloc);
char *needle = (char *)portalMmap(needleAlloc, numBytes);
int *mpNext = (int *)portalMmap(mpNextAlloc, numBytes);
const char *needle_text = "ababab";
int needle_len = strlen(needle_text);
strncpy(needle, needle_text, needle_len);
compute_MP_next(needle, mpNext, needle_len);
// fprintf(stderr, "mpNext=[");
// for(int i= 0; i <= needle_len; i++)
// fprintf(stderr, "%d ", mpNext[i]);
// fprintf(stderr, "]\nneedle=[");
// for(int i= 0; i < needle_len; i++)
// fprintf(stderr, "%d ", needle[i]);
// fprintf(stderr, "]\n");
portalCacheFlush(needleAlloc, needle, numBytes, 1);
portalCacheFlush(mpNextAlloc, mpNext, numBytes, 1);
fprintf(stderr, "Main::flush and invalidate complete\n");
fprintf(stderr, "Main::waiting to connect to nandsim_exe\n");
wait_for_connect_nandsim_exe();
fprintf(stderr, "Main::connected to nandsim_exe\n");
// base of haystack in "flash" memory
// this is read from nandsim_exe, but could also come from kernel driver
int haystack_base = read_from_nandsim_exe();
int haystack_len = read_from_nandsim_exe();
fprintf(stderr, "haystack_base=%d haystack_len=%d\n", haystack_base, haystack_len);
// request the next sglist identifier from the sglistMMU hardware module
// which is used by the mem server accessing flash memory.
int id = 0;
MMURequest_idRequest(nandsimDma->priv.sglDevice, 0);
sem_wait(&nandsimDma->priv.sglIdSem);
id = nandsimDma->priv.sglId;
// pairs of ('offset','size') pointing to space in nandsim memory
// this is unsafe. To do it properly, we should get this list from
// nandsim_exe or from the kernel driver. This code here might overrun
// the backing store allocated by nandsim_exe.
RegionRef region[] = {{0, 0x100000}, {0x100000, 0x100000}};
printf("[%s:%d]\n", __FUNCTION__, __LINE__);
int ref_haystackInNandMemory = send_reference_to_portal(nandsimDma->priv.sglDevice, sizeof(region)/sizeof(region[0]), region, id);
sem_wait(&(nandsimDma->priv.confSem));
fprintf(stderr, "%08x\n", ref_haystackInNandMemory);
// at this point, ref_needleAlloc and ref_mpNextAlloc are valid sgListIds for use by
// the host memory dma hardware, and ref_haystackInNandMemory is a valid sgListId for
// use by the nandsim dma hardware
fprintf(stderr, "about to setup device %d %d\n", ref_needleAlloc, ref_mpNextAlloc);
strstrRequest->setup(ref_needleAlloc, ref_mpNextAlloc, needle_len);
fprintf(stderr, "about to invoke search %d\n", ref_haystackInNandMemory);
strstrRequest->search(ref_haystackInNandMemory, haystack_len);
strstrIndication->wait();
fprintf(stderr, "algo1_nandsim: Done %d\n", (strstrIndication->match_cnt==3));
sleep(2);
exit(!(strstrIndication->match_cnt==3));
}
int main(int argc, const char **argv)
{
int i;
int srcAlloc;
int dstAlloc;
unsigned int *srcBuffer = 0;
unsigned int *dstBuffer = 0;
FMComms1RequestProxy *device = 0;
FMComms1Indication *deviceIndication = 0;
BlueScopeEventPIORequestProxy *bluescope = 0;
BlueScopeEventPIOIndication *bluescopeIndication = 0;
fprintf(stdout, "Main::%s %s\n", __DATE__, __TIME__);
if(sem_init(&cv_sem, 1, 0)){
fprintf(stdout, "failed to init cv_sem\n");
exit(1);
}
if(sem_init(&read_sem, 1, 0)){
fprintf(stdout, "failed to init read_sem\n");
exit(1);
}
if(sem_init(&write_sem, 1, 0)){
fprintf(stdout, "failed to init write_sem\n");
exit(1);
}
device = new FMComms1RequestProxy(IfcNames_FMComms1Request);
DmaManager *dma = platformInit();
deviceIndication = new FMComms1Indication(IfcNames_FMComms1Indication);
bluescope = new BlueScopeEventPIORequestProxy(IfcNames_BlueScopeEventPIORequest);
bluescopeIndication = new BlueScopeEventPIOIndication(IfcNames_BlueScopeEventPIOIndication);
fprintf(stdout, "Main::allocating memory...\n");
srcAlloc = portalAlloc(alloc_sz, 0);
srcBuffer = (unsigned int *)portalMmap(srcAlloc, alloc_sz);
if ((char *) srcBuffer == MAP_FAILED) perror("srcBuffer mmap failed");
assert ((char *) srcBuffer != MAP_FAILED);
dstAlloc = portalAlloc(alloc_sz, 0);
dstBuffer = (unsigned int *)portalMmap(dstAlloc, alloc_sz);
if ((char *) dstBuffer == MAP_FAILED) perror("dstBuffer mmap failed");
assert ((char *) dstBuffer != MAP_FAILED);
int status;
status = setClockFrequency(0, 100000000, 0);
/* FMComms1 refclk should be 30 MHz */
status = setClockFrequency(1, 30000000, 0);
portalCacheFlush(srcAlloc, srcBuffer, alloc_sz, 1);
portalCacheFlush(dstAlloc, dstBuffer, alloc_sz, 1);
fprintf(stdout, "Main::flush and invalidate complete\n");
bluescope->doReset();
WHERE();
bluescope->setTriggerMask (0xFFFFFFFF);
WHERE();
bluescope->getCounterValue();
WHERE();
bluescope->enableIndications(1);
WHERE();
sem_wait(&cv_sem);
fprintf(stdout, "Main::initial BlueScopeEventPIO counterValue: %d\n", counter_value);
device->getReadStatus();
device->getWriteStatus();
sem_wait(&read_sem);
sem_wait(&write_sem);
fprintf(stdout, "Main::after getStateDbg\n");
unsigned int ref_srcAlloc = dma->reference(srcAlloc);
fprintf(stdout, "ref_srcAlloc=%d\n", ref_srcAlloc);
unsigned int ref_dstAlloc = dma->reference(dstAlloc);
fprintf(stdout, "ref_dstAlloc=%d\n", ref_dstAlloc);
fprintf(stdout, "Main::starting read %08x\n", numWords);
device->startRead(ref_srcAlloc, numWords, readBurstLen, 1);
device->startWrite(ref_dstAlloc, numWords, writeBurstLen, 1);
sem_wait(&read_sem);
sleep(5);
device->getReadStatus();
device->getWriteStatus();
sem_wait(&read_sem);
sem_wait(&write_sem);
sleep(5);
fprintf(stdout, "Main::stopping reads\n");
device->startRead(ref_srcAlloc, numWords, readBurstLen, 0);
fprintf(stdout, "Main::stopping writes\n");
device->startWrite(ref_dstAlloc, numWords, writeBurstLen, 0);
device->getReadStatus();
device->getWriteStatus();
sem_wait(&read_sem);
sem_wait(&write_sem);
testi2c("/dev/i2c-1", 0x58);
bluescope->getCounterValue();
fprintf(stdout, "Main::getCounter\n");
sem_wait(&cv_sem);
fprintf(stdout, "Main::final BlueScopeEventPIO counterValue: %d\n", counter_value);
fprintf(stdout, "received %d events\n", eventcount);
for (i = 0; i < eventcount; i += 1) {
fprintf(stdout, "reportEvent(0x%08x, 0x%08x)\n", events[i], timestamps[i]);
}
exit(0);
}
int runtest(int argc, const char ** argv)
{
int test_result = 0;
int srcAlloc;
unsigned int *srcBuffer = 0;
fprintf(stderr, "Main::%s %s\n", __DATE__, __TIME__);
MemreadRequestProxy *device = new MemreadRequestProxy(IfcNames_MemreadRequestS2H);
MemreadIndication deviceIndication(IfcNames_MemreadIndicationH2S);
DmaManager *dma = platformInit();
fprintf(stderr, "Main::allocating memory...\n");
srcAlloc = portalAlloc(alloc_sz, 0);
srcBuffer = (unsigned int *)portalMmap(srcAlloc, alloc_sz);
#ifdef FPGA0_CLOCK_FREQ
long req_freq = FPGA0_CLOCK_FREQ;
long freq = 0;
setClockFrequency(0, req_freq, &freq);
fprintf(stderr, "Requested FCLK[0]=%ld actually %ld\n", req_freq, freq);
#endif
for (int i = 0; i < numWords; i++){
srcBuffer[i] = i;
}
portalCacheFlush(srcAlloc, srcBuffer, alloc_sz, 1);
fprintf(stderr, "Main::flush and invalidate complete\n");
unsigned int ref_srcAlloc = dma->reference(srcAlloc);
fprintf(stderr, "ref_srcAlloc=%d\n", ref_srcAlloc);
if(true) {
fprintf(stderr, "Main::test read %08x\n", numWords);
// first attempt should get the right answer
device->startRead(ref_srcAlloc, 0, numWords, burstLen);
sem_wait(&test_sem);
if (mismatchCount) {
fprintf(stderr, "Main::first test failed to match %d.\n", mismatchCount);
test_result++; // failed
}
}
int err = 5;
switch (err){
case 0:
{
fprintf(stderr, "Main: attempt to use a de-referenced sglist\n");
dma->dereference(ref_srcAlloc);
device->startRead(ref_srcAlloc, 0, numWords, burstLen);
break;
}
case 1:
{
fprintf(stderr, "Main: attempt to use an out-of-range sglist\n");
device->startRead(ref_srcAlloc+32, 0, numWords, burstLen);
break;
}
case 2:
{
fprintf(stderr, "Main: attempt to use an invalid sglist\n");
device->startRead(ref_srcAlloc+1, 0, numWords, burstLen);
break;
}
case 3:
{
fprintf(stderr, "Main: attempt to use an invalid mmusel\n");
device->startRead(ref_srcAlloc | (1<<16), 0, numWords, burstLen);
break;
}
case 4:
{
fprintf(stderr, "Main: attempt to read off the end of the region\n");
device->startRead(ref_srcAlloc, numWords<<2, burstLen, burstLen);
break;
}
default:
{
device->startRead(ref_srcAlloc, 0, numWords, burstLen);
}
}
sem_wait(&test_sem);
if (mismatchCount) {
fprintf(stderr, "Main::first test failed to match %d.\n", mismatchCount);
test_result++; // failed
}
return test_result;
}
int main(int argc, const char **argv)
{
int srcAlloc;
unsigned int *srcBuffer;
unsigned int ref_srcAlloc;
unsigned int i;
pthread_t tid = 0;
init_portal_internal(&intarr[0], IfcNames_MMUIndicationH2S, 0, MMUIndication_handleMessage, &MMUIndication_cbTable, NULL, NULL, MMUIndication_reqinfo);// fpga1
init_portal_internal(&intarr[1], IfcNames_ReadTestIndicationH2S,0, ReadTestIndication_handleMessage, &ReadTestIndication_cbTable, NULL, NULL, ReadTestIndication_reqinfo); // fpga2
init_portal_internal(&intarr[2], IfcNames_MMURequestS2H, 0, NULL, NULL, NULL, NULL, MMURequest_reqinfo); // fpga3
init_portal_internal(&intarr[3], IfcNames_ReadTestRequestS2H,0, NULL, NULL, NULL, NULL, ReadTestRequest_reqinfo); // fpga4
sem_init(&test_sem, 0, 0);
DmaManager_init(&priv, &intarr[2]);
srcAlloc = portalAlloc(numBytes, 0);
if (srcAlloc < 0){
PORTAL_PRINTF("portal alloc failed rc=%d\n", srcAlloc);
return srcAlloc;
}
srcBuffer = (unsigned int *)portalMmap(srcAlloc, numBytes);
for (i = 0; i < numBytes/sizeof(srcBuffer[0]); i++)
srcBuffer[i] = i;
portalCacheFlush(srcAlloc, srcBuffer, numBytes, 1);
PORTAL_PRINTF( "Main: creating exec thread\n");
if(pthread_create(&tid, NULL, pthread_worker, NULL)){
PORTAL_PRINTF( "error creating exec thread\n");
return -1;
}
PORTAL_PRINTF( "Test 1: check for match\n");
PORTAL_PRINTF( "Main: before DmaManager_reference(%x)\n", srcAlloc);
ref_srcAlloc = DmaManager_reference(&priv, srcAlloc);
PORTAL_PRINTF( "Main: starting read %08x\n", numBytes);
ReadTestRequest_startRead (&intarr[3], ref_srcAlloc, numBytes, burstLen, 1);
PORTAL_PRINTF( "Main: waiting for semaphore1\n");
sem_wait(&test_sem);
PORTAL_PRINTF( "Test 2: check that mismatch is detected\n");
srcBuffer[0] = -1;
srcBuffer[numBytes/sizeof(srcBuffer[0])/2] = -1;
srcBuffer[numBytes/sizeof(srcBuffer[0])-1] = -1;
portalCacheFlush(srcAlloc, srcBuffer, numBytes, 1);
ReadTestRequest_startRead (&intarr[3], ref_srcAlloc, numBytes, burstLen, 1);
PORTAL_PRINTF( "Main: waiting for semaphore2\n");
sem_wait(&test_sem);
PORTAL_PRINTF( "Main: all done\n");
#ifdef __KERNEL__
if (tid && !kthread_stop (tid)) {
printk("kthread stops");
}
wait_for_completion(&worker_completion);
#endif
#ifdef __KERNEL__
portalmem_dmabuffer_destroy(srcAlloc);
#endif
return 0;
}
int main(int argc, const char **argv)
{
unsigned int srcGen = 0;
NandSimRequestProxy *device = 0;
NandSimIndication *deviceIndication = 0;
fprintf(stderr, "chamdoo-test\n");
fprintf(stderr, "Main::%s %s\n", __DATE__, __TIME__);
device = new NandSimRequestProxy(IfcNames_NandSimRequest);
deviceIndication = new NandSimIndication(IfcNames_NandSimIndication);
DmaDebugRequestProxy *hostDmaDebugRequest = new DmaDebugRequestProxy(IfcNames_HostDmaDebugRequest);
MMUConfigRequestProxy *dmap = new MMUConfigRequestProxy(IfcNames_HostMMUConfigRequest);
DmaManager *dma = new DmaManager(hostDmaDebugRequest, dmap);
DmaDebugIndication *hostDmaDebugIndication = new DmaDebugIndication(dma, IfcNames_HostDmaDebugIndication);
MMUConfigIndication *hostMMUConfigIndication = new MMUConfigIndication(dma, IfcNames_HostMMUConfigIndication);
fprintf(stderr, "Main::allocating memory...\n");
srcAlloc = portalAlloc(numBytes);
srcBuffer = (unsigned int *)portalMmap(srcAlloc, numBytes);
fprintf(stderr, "fd=%d, srcBuffer=%p\n", srcAlloc, srcBuffer);
portalExec_start();
for (int i = 0; i < numBytes/sizeof(srcBuffer[0]); i++)
srcBuffer[i] = srcGen++;
portalDCacheFlushInval(srcAlloc, numBytes, srcBuffer);
fprintf(stderr, "Main::flush and invalidate complete\n");
sleep(1);
unsigned int ref_srcAlloc = dma->reference(srcAlloc);
nandAlloc = portalAlloc(nandBytes);
int ref_nandAlloc = dma->reference(nandAlloc);
fprintf(stderr, "NAND alloc fd=%d ref=%d\n", nandAlloc, ref_nandAlloc);
device->configureNand(ref_nandAlloc, nandBytes);
deviceIndication->wait();
/* do tests */
unsigned long loop = 0;
unsigned long match = 0, mismatch = 0;
while (loop < nandBytes) {
int i;
for (i = 0; i < numBytes/sizeof(srcBuffer[0]); i++) {
srcBuffer[i] = loop+i;
}
fprintf(stderr, "Main::starting write ref=%d, len=%08zx (%lu)\n", ref_srcAlloc, numBytes, loop);
device->startWrite(ref_srcAlloc, 0, loop, numBytes, 16);
deviceIndication->wait();
loop+=numBytes;
}
loop = 0;
while (loop < nandBytes) {
int i;
fprintf(stderr, "Main::starting read %08zx (%lu)\n", numBytes, loop);
device->startRead(ref_srcAlloc, 0, loop, numBytes, 16);
deviceIndication->wait();
for (i = 0; i < numBytes/sizeof(srcBuffer[0]); i++) {
if (srcBuffer[i] != loop+i) {
fprintf(stderr, "Main::mismatch [%08zx] != [%08zx]\n", loop+i, srcBuffer[i]);
mismatch++;
} else {
match++;
}
}
loop+=numBytes;
}
/* end */
fprintf(stderr, "Main::Summary: match=%lu mismatch:%lu (%lu) (%f percent)\n",
match, mismatch, match+mismatch, (float)mismatch/(float)(match+mismatch)*100.0);
return (mismatch > 0);
}
int main(int argc, const char **argv)
{
int srcAlloc;
int backAlloc;
unsigned int *srcBuffer;
unsigned int ref_srcAlloc;
unsigned int *backBuffer;
unsigned int ref_backAlloc;
int rc = 0, i;
pthread_t tid = 0;
init_portal_internal(&intarr[2], IfcNames_BackingStoreMMURequest, NULL, NULL, NULL, NULL, MMURequest_reqinfo); // fpga3
init_portal_internal(&intarr[0], IfcNames_BackingStoreMMUIndication, MMUIndication_handleMessage, &MMUIndication_cbTable, NULL, NULL, MMUIndication_reqinfo); // fpga1
init_portal_internal(&intarr[3], IfcNames_NandCfgRequest, NULL, NULL, NULL, NULL, NandCfgRequest_reqinfo); // fpga4
init_portal_internal(&intarr[1], IfcNames_NandCfgIndication, NandCfgIndication_handleMessage, &NandCfgIndication_cbTable, NULL, NULL, NandCfgIndication_reqinfo); // fpga2
DmaManager_init(&priv, &intarr[2]);
sem_init(&test_sem, 0, 0);
PORTAL_PRINTF( "Main: creating exec thread - %lu\n", sizeof (unsigned int) );
if(pthread_create(&tid, NULL, pthread_worker, NULL)){
PORTAL_PRINTF( "error creating exec thread\n");
return -1;
}
backAlloc = portalAlloc (back_sz, 0);
PORTAL_PRINTF("backAlloc=%d\n", backAlloc);
ref_backAlloc = DmaManager_reference(&priv, backAlloc);
PORTAL_PRINTF("ref_backAlloc=%d\n", ref_backAlloc);
backBuffer = (unsigned int*)portalMmap(backAlloc, back_sz);
portalCacheFlush(backAlloc, backBuffer, back_sz, 1);
NandCfgRequest_configureNand (&intarr[3], ref_backAlloc, back_sz);
PORTAL_PRINTF("Main::configure NAND fd=%d ref=%d\n", backAlloc, ref_backAlloc);
sem_wait(&test_sem);
srcAlloc = portalAlloc(back_sz, 0);
srcBuffer = (unsigned int *)portalMmap(srcAlloc, back_sz);
ref_srcAlloc = DmaManager_reference(&priv, srcAlloc);
PORTAL_PRINTF("about to start write\n");
//write data to "flash" memory
strcpy((char*)srcBuffer, "acabcabacababacababababababcacabcabacababacabababc\n012345678912");
NandCfgRequest_startWrite(&intarr[3], ref_srcAlloc, 0, 0, 1024, 8);
sem_wait(&test_sem);
// at this point, if we were synchronizing with the algo_exe, we
// could tell it that it was OK to start searching
PORTAL_PRINTF ("initialization of data in \"flash\" memory complete\n");
#ifdef __KERNEL__
if (tid && !kthread_stop (tid)) {
PORTAL_PRINTF ("kthread stops\n");
}
wait_for_completion(&worker_completion);
msleep(20000);
#else
sleep(20);
#endif
#ifdef __KERNEL__
portalmem_dmabuffer_destroy(backAlloc);
portalmem_dmabuffer_destroy(srcAlloc);
#endif
PORTAL_PRINTF ("Main: ends\n");
return 0;
}