BOOT_CODE static void init_irqs(cap_t root_cnode_cap)
{
irq_t i;
for (i = 0; i <= maxIRQ; i++) {
setIRQState(IRQInactive, i);
}
setIRQState(IRQTimer, KERNEL_TIMER_IRQ);
#ifdef CONFIG_ARM_HYPERVISOR_SUPPORT
setIRQState(IRQReserved, INTERRUPT_VGIC_MAINTENANCE);
#endif
#ifdef CONFIG_ARM_SMMU
setIRQState(IRQReserved, INTERRUPT_SMMU);
#endif
#ifdef CONFIG_ARM_ENABLE_PMU_OVERFLOW_INTERRUPT
#ifdef KERNEL_PMU_IRQ
setIRQState(IRQReserved, KERNEL_PMU_IRQ);
#if (defined CONFIG_PLAT_TX1 && defined ENABLE_SMP_SUPPORT)
//SELFOUR-1252
#error "This platform doesn't support tracking CPU utilisation on multicore"
#endif /* CONFIG_PLAT_TX1 && ENABLE_SMP_SUPPORT */
#else
#error "This platform doesn't support tracking CPU utilisation feature"
#endif /* KERNEL_TIMER_IRQ */
#endif /* CONFIG_ARM_ENABLE_PMU_OVERFLOW_INTERRUPT */
#ifdef ENABLE_SMP_SUPPORT
setIRQState(IRQIPI, irq_remote_call_ipi);
setIRQState(IRQIPI, irq_reschedule_ipi);
#endif /* ENABLE_SMP_SUPPORT */
/* provide the IRQ control cap */
write_slot(SLOT_PTR(pptr_of_cap(root_cnode_cap), seL4_CapIRQControl), cap_irq_control_cap_new());
}
BOOT_CODE static void
init_irqs(cap_t root_cnode_cap)
{
irq_t i;
for (i = 0; i <= maxIRQ; i++) {
if (i == irq_timer) {
setIRQState(IRQTimer, i);
} else if (i == irq_iommu) {
setIRQState(IRQReserved, i);
} else if (i == 2 && config_set(CONFIG_IRQ_PIC)) {
/* cascaded legacy PIC */
setIRQState(IRQReserved, i);
} else if (i >= irq_isa_min && i <= irq_isa_max) {
if (config_set(CONFIG_IRQ_PIC)) {
setIRQState(IRQInactive, i);
} else {
setIRQState(IRQReserved, i);
}
} else if (i >= irq_user_min && i <= irq_user_max) {
if (config_set(CONFIG_IRQ_IOAPIC)) {
setIRQState(IRQInactive, i);
} else {
setIRQState(IRQReserved, i);
}
} else {
setIRQState(IRQReserved, i);
}
}
Arch_irqStateInit();
/* provide the IRQ control cap */
write_slot(SLOT_PTR(pptr_of_cap(root_cnode_cap), seL4_CapIRQControl), cap_irq_control_cap_new());
}
BOOT_CODE static void
init_irqs(cap_t root_cnode_cap, bool_t mask_irqs)
{
irq_t i;
for (i = 0; i <= maxIRQ; i++) {
if (i == irq_timer) {
setIRQState(IRQTimer, i);
} else if (i == irq_iommu) {
setIRQState(IRQReserved, i);
#ifdef CONFIG_IRQ_PIC
} else if (i == 2) {
/* cascaded legacy PIC */
setIRQState(IRQReserved, i);
#endif
} else if (i >= irq_controller_min && i <= irq_controller_max)
if (mask_irqs)
/* Don't use setIRQState() here because it implicitly also enables */
/* the IRQ on the interrupt controller which only node 0 is allowed to do. */
{
intStateIRQTable[i] = IRQReserved;
} else {
setIRQState(IRQInactive, i);
}
else if (i >= irq_msi_min && i <= irq_msi_max) {
setIRQState(IRQInactive, i);
}
}
/* provide the IRQ control cap */
write_slot(SLOT_PTR(pptr_of_cap(root_cnode_cap), BI_CAP_IRQ_CTRL), cap_irq_control_cap_new());
}
BOOT_CODE bool_t
provide_cap(cap_t root_cnode_cap, cap_t cap)
{
if (ndks_boot.slot_pos_cur >= ndks_boot.slot_pos_max) {
printf("Kernel init failed: ran out of cap slots\n");
return false;
}
write_slot(SLOT_PTR(pptr_of_cap(root_cnode_cap), ndks_boot.slot_pos_cur), cap);
ndks_boot.slot_pos_cur++;
return true;
}
BOOT_CODE void
create_bi_frame_cap(
cap_t root_cnode_cap,
cap_t pd_cap,
pptr_t pptr,
vptr_t vptr
)
{
cap_t cap;
/* create a cap of it and write it into the root CNode */
cap = create_mapped_it_frame_cap(pd_cap, pptr, vptr, false, false);
write_slot(SLOT_PTR(pptr_of_cap(root_cnode_cap), BI_CAP_BI_FRAME), cap);
}
BOOT_CODE cap_t
create_it_asid_pool(cap_t root_cnode_cap)
{
pptr_t ap_pptr;
cap_t ap_cap;
/* create ASID pool */
ap_pptr = alloc_region(ASID_POOL_SIZE_BITS);
if (!ap_pptr) {
printf("Kernel init failed: failed to create initial thread asid pool\n");
return cap_null_cap_new();
}
memzero(ASID_POOL_PTR(ap_pptr), 1 << ASID_POOL_SIZE_BITS);
ap_cap = cap_asid_pool_cap_new(IT_ASID >> asidLowBits, ap_pptr);
write_slot(SLOT_PTR(pptr_of_cap(root_cnode_cap), BI_CAP_IT_ASID_POOL), ap_cap);
/* create ASID control cap */
write_slot(
SLOT_PTR(pptr_of_cap(root_cnode_cap), BI_CAP_ASID_CTRL),
cap_asid_control_cap_new()
);
return ap_cap;
}
BOOT_CODE void
create_domain_cap(cap_t root_cnode_cap)
{
cap_t cap;
word_t i;
/* Check domain scheduler assumptions. */
assert(ksDomScheduleLength > 0);
for (i = 0; i < ksDomScheduleLength; i++) {
assert(ksDomSchedule[i].domain < CONFIG_NUM_DOMAINS);
assert(ksDomSchedule[i].length > 0);
}
cap = cap_domain_cap_new();
write_slot(SLOT_PTR(pptr_of_cap(root_cnode_cap), BI_CAP_DOM), cap);
}
BOOT_CODE cap_t
create_ipcbuf_frame(cap_t root_cnode_cap, cap_t pd_cap, vptr_t vptr)
{
cap_t cap;
pptr_t pptr;
/* allocate the IPC buffer frame */
pptr = alloc_region(PAGE_BITS);
if (!pptr) {
printf("Kernel init failing: could not create ipc buffer frame\n");
return cap_null_cap_new();
}
clearMemory((void*)pptr, PAGE_BITS);
/* create a cap of it and write it into the root CNode */
cap = create_mapped_it_frame_cap(pd_cap, pptr, vptr, false, false);
write_slot(SLOT_PTR(pptr_of_cap(root_cnode_cap), BI_CAP_IT_IPCBUF), cap);
return cap;
}
BOOT_CODE bool_t
init_sys_state(
cpu_id_t cpu_id,
mem_p_regs_t mem_p_regs,
dev_p_regs_t* dev_p_regs,
ui_info_t ui_info,
p_region_t boot_mem_reuse_p_reg,
/* parameters below not modeled in abstract specification */
uint32_t num_drhu,
paddr_t* drhu_list,
acpi_rmrr_list_t *rmrr_list
)
{
cap_t root_cnode_cap;
vptr_t bi_frame_vptr;
vptr_t ipcbuf_vptr;
cap_t it_vspace_cap;
cap_t it_ap_cap;
cap_t ipcbuf_cap;
pptr_t bi_frame_pptr;
create_frames_of_region_ret_t create_frames_ret;
#ifdef CONFIG_ENABLE_BENCHMARKS
vm_attributes_t buffer_attr = {{ 0 }};
word_t paddr;
pde_t pde;
#endif /* CONFIG_ENABLE_BENCHMARKS */
/* convert from physical addresses to kernel pptrs */
region_t ui_reg = paddr_to_pptr_reg(ui_info.p_reg);
region_t boot_mem_reuse_reg = paddr_to_pptr_reg(boot_mem_reuse_p_reg);
/* convert from physical addresses to userland vptrs */
v_region_t ui_v_reg;
v_region_t it_v_reg;
ui_v_reg.start = ui_info.p_reg.start - ui_info.pv_offset;
ui_v_reg.end = ui_info.p_reg.end - ui_info.pv_offset;
ipcbuf_vptr = ui_v_reg.end;
bi_frame_vptr = ipcbuf_vptr + BIT(PAGE_BITS);
/* The region of the initial thread is the user image + ipcbuf and boot info */
it_v_reg.start = ui_v_reg.start;
it_v_reg.end = bi_frame_vptr + BIT(PAGE_BITS);
init_freemem(ui_info.p_reg, mem_p_regs);
/* initialise virtual-memory-related data structures (not in abstract spec) */
if (!init_vm_state()) {
return false;
}
#ifdef CONFIG_ENABLE_BENCHMARKS
/* allocate and create the log buffer */
buffer_attr.words[0] = IA32_PAT_MT_WRITE_THROUGH;
paddr = pptr_to_paddr((void *) alloc_region(pageBitsForSize(X86_LargePage)));
/* allocate a large frame for logging */
pde = x86_make_pde_mapping(paddr, buffer_attr);
ia32KSGlobalPD[IA32_KSLOG_IDX] = pde;
/* flush the tlb */
invalidateTranslationAll();
/* if we crash here, the log isn't working */
#ifdef CONFIG_DEBUG_BUILD
#if CONFIG_MAX_NUM_TRACE_POINTS > 0
printf("Testing log\n");
ksLog[0].data = 0xdeadbeef;
printf("Wrote to ksLog %x\n", ksLog[0].data);
assert(ksLog[0].data == 0xdeadbeef);
#endif /* CONFIG_MAX_NUM_TRACE_POINTS */
#endif /* CONFIG_DEBUG_BUILD */
#endif /* CONFIG_ENABLE_BENCHMARKS */
/* create the root cnode */
root_cnode_cap = create_root_cnode();
/* create the IO port cap */
write_slot(
SLOT_PTR(pptr_of_cap(root_cnode_cap), seL4_CapIOPort),
cap_io_port_cap_new(
0, /* first port */
NUM_IO_PORTS - 1 /* last port */
)
);
/* create the cap for managing thread domains */
create_domain_cap(root_cnode_cap);
/* create the IRQ CNode */
if (!create_irq_cnode()) {
return false;
}
/* initialise the IRQ states and provide the IRQ control cap */
init_irqs(root_cnode_cap);
/* create the bootinfo frame */
bi_frame_pptr = allocate_bi_frame(0, 1, ipcbuf_vptr);
if (!bi_frame_pptr) {
return false;
}
/* Construct an initial address space with enough virtual addresses
* to cover the user image + ipc buffer and bootinfo frames */
it_vspace_cap = create_it_address_space(root_cnode_cap, it_v_reg);
if (cap_get_capType(it_vspace_cap) == cap_null_cap) {
return false;
}
/* Create and map bootinfo frame cap */
create_bi_frame_cap(
root_cnode_cap,
it_vspace_cap,
bi_frame_pptr,
bi_frame_vptr
);
/* create the initial thread's IPC buffer */
ipcbuf_cap = create_ipcbuf_frame(root_cnode_cap, it_vspace_cap, ipcbuf_vptr);
if (cap_get_capType(ipcbuf_cap) == cap_null_cap) {
return false;
}
/* create all userland image frames */
create_frames_ret =
create_frames_of_region(
root_cnode_cap,
it_vspace_cap,
ui_reg,
true,
ui_info.pv_offset
);
if (!create_frames_ret.success) {
return false;
}
ndks_boot.bi_frame->userImageFrames = create_frames_ret.region;
/* create the initial thread's ASID pool */
it_ap_cap = create_it_asid_pool(root_cnode_cap);
if (cap_get_capType(it_ap_cap) == cap_null_cap) {
return false;
}
write_it_asid_pool(it_ap_cap, it_vspace_cap);
/*
* Initialise the NULL FPU state. This is different from merely zero'ing it
* out (i.e., the NULL FPU state is non-zero), and must be performed before
* the first thread is created.
*/
resetFpu();
saveFpuState(&x86KSnullFpuState);
x86KSfpuOwner = NULL;
/* create the idle thread */
if (!create_idle_thread()) {
return false;
}
/* create the initial thread */
if (!create_initial_thread(
root_cnode_cap,
it_vspace_cap,
ui_info.v_entry,
bi_frame_vptr,
ipcbuf_vptr,
ipcbuf_cap
)) {
return false;
}
if (config_set(CONFIG_IOMMU)) {
/* initialise VTD-related data structures and the IOMMUs */
if (!vtd_init(cpu_id, num_drhu, rmrr_list)) {
return false;
}
/* write number of IOMMU PT levels into bootinfo */
ndks_boot.bi_frame->numIOPTLevels = x86KSnumIOPTLevels;
/* write IOSpace master cap */
write_slot(SLOT_PTR(pptr_of_cap(root_cnode_cap), seL4_CapIOSpace), master_iospace_cap());
} else {
ndks_boot.bi_frame->numIOPTLevels = -1;
}
/* convert the remaining free memory into UT objects and provide the caps */
if (!create_untypeds(root_cnode_cap, boot_mem_reuse_reg)) {
return false;
}
/* WARNING: alloc_region() must not be called anymore after here! */
/* create device frames */
if (!create_device_frames(root_cnode_cap, dev_p_regs)) {
return false;
}
/* finalise the bootinfo frame */
bi_finalise();
return true;
}
BOOT_CODE bool_t
init_sys_state(
cpu_id_t cpu_id,
mem_p_regs_t mem_p_regs,
ui_info_t ui_info,
p_region_t boot_mem_reuse_p_reg,
/* parameters below not modeled in abstract specification */
uint32_t num_drhu,
paddr_t* drhu_list,
acpi_rmrr_list_t *rmrr_list,
seL4_X86_BootInfo_VBE *vbe
)
{
cap_t root_cnode_cap;
vptr_t extra_bi_frame_vptr;
vptr_t bi_frame_vptr;
vptr_t ipcbuf_vptr;
cap_t it_vspace_cap;
cap_t it_ap_cap;
cap_t ipcbuf_cap;
pptr_t bi_frame_pptr;
word_t extra_bi_size = sizeof(seL4_BootInfoHeader);
region_t extra_bi_region;
pptr_t extra_bi_offset = 0;
create_frames_of_region_ret_t create_frames_ret;
create_frames_of_region_ret_t extra_bi_ret;
/* convert from physical addresses to kernel pptrs */
region_t ui_reg = paddr_to_pptr_reg(ui_info.p_reg);
region_t boot_mem_reuse_reg = paddr_to_pptr_reg(boot_mem_reuse_p_reg);
/* convert from physical addresses to userland vptrs */
v_region_t ui_v_reg;
v_region_t it_v_reg;
ui_v_reg.start = ui_info.p_reg.start - ui_info.pv_offset;
ui_v_reg.end = ui_info.p_reg.end - ui_info.pv_offset;
ipcbuf_vptr = ui_v_reg.end;
bi_frame_vptr = ipcbuf_vptr + BIT(PAGE_BITS);
extra_bi_frame_vptr = bi_frame_vptr + BIT(PAGE_BITS);
if (vbe->vbeMode != -1) {
extra_bi_size += sizeof(seL4_X86_BootInfo_VBE);
}
/* The region of the initial thread is the user image + ipcbuf and boot info */
it_v_reg.start = ui_v_reg.start;
it_v_reg.end = ROUND_UP(extra_bi_frame_vptr + extra_bi_size, PAGE_BITS);
init_freemem(ui_info.p_reg, mem_p_regs);
/* create the root cnode */
root_cnode_cap = create_root_cnode();
/* create the IO port cap */
write_slot(
SLOT_PTR(pptr_of_cap(root_cnode_cap), seL4_CapIOPort),
cap_io_port_cap_new(
0, /* first port */
NUM_IO_PORTS - 1, /* last port */
VPID_INVALID
)
);
/* create the cap for managing thread domains */
create_domain_cap(root_cnode_cap);
/* create the IRQ CNode */
if (!create_irq_cnode()) {
return false;
}
/* initialise the IRQ states and provide the IRQ control cap */
init_irqs(root_cnode_cap);
/* create the bootinfo frame */
bi_frame_pptr = allocate_bi_frame(0, ksNumCPUs, ipcbuf_vptr);
if (!bi_frame_pptr) {
return false;
}
extra_bi_region = allocate_extra_bi_region(extra_bi_size);
if (extra_bi_region.start == 0) {
return false;
}
/* populate vbe info block */
if (vbe->vbeMode != -1) {
vbe->header.id = SEL4_BOOTINFO_HEADER_X86_VBE;
vbe->header.len = sizeof(seL4_X86_BootInfo_VBE);
memcpy((void*)(extra_bi_region.start + extra_bi_offset), vbe, sizeof(seL4_X86_BootInfo_VBE));
extra_bi_offset += sizeof(seL4_X86_BootInfo_VBE);
}
/* provde a chunk for any leftover padding in the extended boot info */
seL4_BootInfoHeader padding_header;
padding_header.id = SEL4_BOOTINFO_HEADER_PADDING;
padding_header.len = (extra_bi_region.end - extra_bi_region.start) - extra_bi_offset;
memcpy((void*)(extra_bi_region.start + extra_bi_offset), &padding_header, sizeof(seL4_BootInfoHeader));
/* Construct an initial address space with enough virtual addresses
* to cover the user image + ipc buffer and bootinfo frames */
it_vspace_cap = create_it_address_space(root_cnode_cap, it_v_reg);
if (cap_get_capType(it_vspace_cap) == cap_null_cap) {
return false;
}
/* Create and map bootinfo frame cap */
create_bi_frame_cap(
root_cnode_cap,
it_vspace_cap,
bi_frame_pptr,
bi_frame_vptr
);
/* create and map extra bootinfo region */
extra_bi_ret =
create_frames_of_region(
root_cnode_cap,
it_vspace_cap,
extra_bi_region,
true,
pptr_to_paddr((void*)(extra_bi_region.start - extra_bi_frame_vptr))
);
if (!extra_bi_ret.success) {
return false;
}
ndks_boot.bi_frame->extraBIPages = extra_bi_ret.region;
/* create the initial thread's IPC buffer */
ipcbuf_cap = create_ipcbuf_frame(root_cnode_cap, it_vspace_cap, ipcbuf_vptr);
if (cap_get_capType(ipcbuf_cap) == cap_null_cap) {
return false;
}
/* create all userland image frames */
create_frames_ret =
create_frames_of_region(
root_cnode_cap,
it_vspace_cap,
ui_reg,
true,
ui_info.pv_offset
);
if (!create_frames_ret.success) {
return false;
}
ndks_boot.bi_frame->userImageFrames = create_frames_ret.region;
/* create the initial thread's ASID pool */
it_ap_cap = create_it_asid_pool(root_cnode_cap);
if (cap_get_capType(it_ap_cap) == cap_null_cap) {
return false;
}
write_it_asid_pool(it_ap_cap, it_vspace_cap);
ndks_boot.bi_frame->archInfo = tsc_init();
/* create the idle thread */
if (!create_idle_thread()) {
return false;
}
/* create the initial thread */
if (!create_initial_thread(
root_cnode_cap,
it_vspace_cap,
ui_info.v_entry,
bi_frame_vptr,
ipcbuf_vptr,
ipcbuf_cap
)) {
return false;
}
if (config_set(CONFIG_IOMMU)) {
/* initialise VTD-related data structures and the IOMMUs */
if (!vtd_init(cpu_id, num_drhu, rmrr_list)) {
return false;
}
/* write number of IOMMU PT levels into bootinfo */
ndks_boot.bi_frame->numIOPTLevels = x86KSnumIOPTLevels;
/* write IOSpace master cap */
write_slot(SLOT_PTR(pptr_of_cap(root_cnode_cap), seL4_CapIOSpace), master_iospace_cap());
} else {
ndks_boot.bi_frame->numIOPTLevels = -1;
}
/* create all of the untypeds. Both devices and kernel window memory */
if (!create_untypeds(root_cnode_cap, boot_mem_reuse_reg)) {
return false;
}
/* WARNING: alloc_region() must not be called anymore after here! */
/* finalise the bootinfo frame */
bi_finalise();
return true;
}
BOOT_CODE bool_t
create_initial_thread(
cap_t root_cnode_cap,
cap_t it_pd_cap,
vptr_t ui_v_entry,
vptr_t bi_frame_vptr,
vptr_t ipcbuf_vptr,
cap_t ipcbuf_cap
)
{
pptr_t pptr;
cap_t cap;
tcb_t* tcb;
deriveCap_ret_t dc_ret;
/* allocate TCB */
pptr = alloc_region(TCB_BLOCK_SIZE_BITS);
if (!pptr) {
printf("Kernel init failed: Unable to allocate tcb for initial thread\n");
return false;
}
memzero((void*)pptr, 1 << TCB_BLOCK_SIZE_BITS);
tcb = TCB_PTR(pptr + TCB_OFFSET);
tcb->tcbTimeSlice = CONFIG_TIME_SLICE;
Arch_initContext(&tcb->tcbArch.tcbContext);
/* derive a copy of the IPC buffer cap for inserting */
dc_ret = deriveCap(SLOT_PTR(pptr_of_cap(root_cnode_cap), BI_CAP_IT_IPCBUF), ipcbuf_cap);
if (dc_ret.status != EXCEPTION_NONE) {
printf("Failed to derive copy of IPC Buffer\n");
return false;
}
/* initialise TCB (corresponds directly to abstract specification) */
cteInsert(
root_cnode_cap,
SLOT_PTR(pptr_of_cap(root_cnode_cap), BI_CAP_IT_CNODE),
SLOT_PTR(pptr, tcbCTable)
);
cteInsert(
it_pd_cap,
SLOT_PTR(pptr_of_cap(root_cnode_cap), BI_CAP_IT_VSPACE),
SLOT_PTR(pptr, tcbVTable)
);
cteInsert(
dc_ret.cap,
SLOT_PTR(pptr_of_cap(root_cnode_cap), BI_CAP_IT_IPCBUF),
SLOT_PTR(pptr, tcbBuffer)
);
tcb->tcbIPCBuffer = ipcbuf_vptr;
setRegister(tcb, capRegister, bi_frame_vptr);
setNextPC(tcb, ui_v_entry);
/* initialise TCB */
tcb->tcbPriority = seL4_MaxPrio;
setupReplyMaster(tcb);
setThreadState(tcb, ThreadState_Running);
ksSchedulerAction = SchedulerAction_ResumeCurrentThread;
ksCurThread = ksIdleThread;
ksCurDomain = ksDomSchedule[ksDomScheduleIdx].domain;
ksDomainTime = ksDomSchedule[ksDomScheduleIdx].length;
assert(ksCurDomain < CONFIG_NUM_DOMAINS && ksDomainTime > 0);
/* initialise current thread pointer */
switchToThread(tcb); /* initialises ksCurThread */
/* create initial thread's TCB cap */
cap = cap_thread_cap_new(TCB_REF(tcb));
write_slot(SLOT_PTR(pptr_of_cap(root_cnode_cap), BI_CAP_IT_TCB), cap);
#ifdef DEBUG
setThreadName(tcb, "rootserver");
#endif
return true;
}
BOOT_CODE bool_t
init_node_state(
p_region_t avail_p_reg,
p_region_t sh_p_reg,
dev_p_regs_t* dev_p_regs,
ui_info_t ui_info,
p_region_t boot_mem_reuse_p_reg,
node_id_t node_id,
uint32_t num_nodes,
/* parameters below not modeled in abstract specification */
pdpte_t* kernel_pdpt,
pde_t* kernel_pd,
pte_t* kernel_pt
#ifdef CONFIG_IOMMU
, cpu_id_t cpu_id,
uint32_t num_drhu,
paddr_t* drhu_list,
uint32_t num_passthrough_dev,
dev_id_t* passthrough_dev_list,
uint32_t* pci_bus_used_bitmap
#endif
)
{
cap_t root_cnode_cap;
vptr_t bi_frame_vptr;
vptr_t ipcbuf_vptr;
cap_t it_vspace_cap;
cap_t it_ap_cap;
cap_t ipcbuf_cap;
pptr_t bi_frame_pptr;
create_frames_of_region_ret_t create_frames_ret;
int i;
#ifdef CONFIG_BENCHMARK
vm_attributes_t buffer_attr = {{ 0 }};
uint32_t paddr;
pde_t pde;
#endif /* CONFIG_BENCHMARK */
/* convert from physical addresses to kernel pptrs */
region_t avail_reg = paddr_to_pptr_reg(avail_p_reg);
region_t ui_reg = paddr_to_pptr_reg(ui_info.p_reg);
region_t sh_reg = paddr_to_pptr_reg(sh_p_reg);
region_t boot_mem_reuse_reg = paddr_to_pptr_reg(boot_mem_reuse_p_reg);
/* convert from physical addresses to userland vptrs */
v_region_t ui_v_reg;
v_region_t it_v_reg;
ui_v_reg.start = ui_info.p_reg.start - ui_info.pv_offset;
ui_v_reg.end = ui_info.p_reg.end - ui_info.pv_offset;
ipcbuf_vptr = ui_v_reg.end;
bi_frame_vptr = ipcbuf_vptr + BIT(PAGE_BITS);
/* The region of the initial thread is the user image + ipcbuf and boot info */
it_v_reg.start = ui_v_reg.start;
it_v_reg.end = bi_frame_vptr + BIT(PAGE_BITS);
/* make the free memory available to alloc_region() */
ndks_boot.freemem[0] = avail_reg;
for (i = 1; i < MAX_NUM_FREEMEM_REG; i++) {
ndks_boot.freemem[i] = REG_EMPTY;
}
/* initialise virtual-memory-related data structures (not in abstract spec) */
if (!init_vm_state(kernel_pdpt, kernel_pd, kernel_pt)) {
return false;
}
#ifdef CONFIG_BENCHMARK
/* allocate and create the log buffer */
buffer_attr.words[0] = IA32_PAT_MT_WRITE_THROUGH;
paddr = pptr_to_paddr((void *) alloc_region(pageBitsForSize(IA32_LargePage)));
/* allocate a large frame for logging */
pde = pde_pde_large_new(
paddr, /* page_base_address */
vm_attributes_get_ia32PATBit(buffer_attr), /* pat */
0, /* avl_cte_depth */
1, /* global */
0, /* dirty */
0, /* accessed */
vm_attributes_get_ia32PCDBit(buffer_attr), /* cache_disabled */
vm_attributes_get_ia32PWTBit(buffer_attr), /* write_through */
0, /* super_user */
1, /* read_write */
1 /* present */
);
/* TODO this shouldn't be hardcoded */
ia32KSkernelPD[IA32_KSLOG_IDX] = pde;
/* flush the tlb */
invalidatePageStructureCache();
/* if we crash here, the log isn't working */
#ifdef CONFIG_DEBUG_BUILD
printf("Testing log\n");
ksLog[0] = 0xdeadbeef;
printf("Wrote to ksLog %x\n", ksLog[0]);
assert(ksLog[0] == 0xdeadbeef);
#endif /* CONFIG_DEBUG_BUILD */
#endif /* CONFIG_BENCHMARK */
/* create the root cnode */
root_cnode_cap = create_root_cnode();
/* create the IO port cap */
write_slot(
SLOT_PTR(pptr_of_cap(root_cnode_cap), BI_CAP_IO_PORT),
cap_io_port_cap_new(
0, /* first port */
NUM_IO_PORTS - 1 /* last port */
)
);
/* create the cap for managing thread domains */
create_domain_cap(root_cnode_cap);
/* create the IRQ CNode */
if (!create_irq_cnode()) {
return false;
}
/* initialise the IRQ states and provide the IRQ control cap */
init_irqs(root_cnode_cap, node_id != 0);
/* create the bootinfo frame */
bi_frame_pptr = allocate_bi_frame(node_id, num_nodes, ipcbuf_vptr);
if (!bi_frame_pptr) {
return false;
}
/* Construct an initial address space with enough virtual addresses
* to cover the user image + ipc buffer and bootinfo frames */
it_vspace_cap = create_it_address_space(root_cnode_cap, it_v_reg);
if (cap_get_capType(it_vspace_cap) == cap_null_cap) {
return false;
}
/* Create and map bootinfo frame cap */
create_bi_frame_cap(
root_cnode_cap,
it_vspace_cap,
bi_frame_pptr,
bi_frame_vptr
);
/* create the initial thread's IPC buffer */
ipcbuf_cap = create_ipcbuf_frame(root_cnode_cap, it_vspace_cap, ipcbuf_vptr);
if (cap_get_capType(ipcbuf_cap) == cap_null_cap) {
return false;
}
/* create all userland image frames */
create_frames_ret =
create_frames_of_region(
root_cnode_cap,
it_vspace_cap,
ui_reg,
true,
ui_info.pv_offset
);
if (!create_frames_ret.success) {
return false;
}
ndks_boot.bi_frame->ui_frame_caps = create_frames_ret.region;
/* create the initial thread's ASID pool */
it_ap_cap = create_it_asid_pool(root_cnode_cap);
if (cap_get_capType(it_ap_cap) == cap_null_cap) {
return false;
}
write_it_asid_pool(it_ap_cap, it_vspace_cap);
/*
* Initialise the NULL FPU state. This is different from merely zero'ing it
* out (i.e., the NULL FPU state is non-zero), and must be performed before
* the first thread is created.
*/
resetFpu();
saveFpuState(&ia32KSnullFpuState);
ia32KSfpuOwner = NULL;
/* create the idle thread */
if (!create_idle_thread()) {
return false;
}
/* create the initial thread */
if (!create_initial_thread(
root_cnode_cap,
it_vspace_cap,
ui_info.v_entry,
bi_frame_vptr,
ipcbuf_vptr,
ipcbuf_cap
)) {
return false;
}
#ifdef CONFIG_IOMMU
/* initialise VTD-related data structures and the IOMMUs */
if (!vtd_init(cpu_id, num_drhu, pci_bus_used_bitmap, num_passthrough_dev, passthrough_dev_list)) {
return false;
}
/* write number of IOMMU PT levels into bootinfo */
ndks_boot.bi_frame->num_iopt_levels = ia32KSnumIOPTLevels;
/* write IOSpace master cap */
write_slot(SLOT_PTR(pptr_of_cap(root_cnode_cap), BI_CAP_IO_SPACE), master_iospace_cap());
#endif
/* convert the remaining free memory into UT objects and provide the caps */
if (!create_untypeds(root_cnode_cap, boot_mem_reuse_reg)) {
return false;
}
/* WARNING: alloc_region() must not be called anymore after here! */
/* create device frames */
if (!create_device_frames(root_cnode_cap, dev_p_regs)) {
return false;
}
/* create all shared frames */
create_frames_ret =
create_frames_of_region(
root_cnode_cap,
it_vspace_cap,
sh_reg,
false,
0
);
if (!create_frames_ret.success) {
return false;
}
ndks_boot.bi_frame->sh_frame_caps = create_frames_ret.region;;
/* finalise the bootinfo frame */
bi_finalise();
#ifdef DEBUG
ia32KSconsolePort = console_port_of_node(node_id);
ia32KSdebugPort = debug_port_of_node(node_id);
#endif
return true;
}
/* Create an address space for the initial thread.
* This includes page directory and page tables */
BOOT_CODE static cap_t
create_it_address_space(cap_t root_cnode_cap, v_region_t it_v_reg)
{
cap_t vspace_cap;
vptr_t vptr;
pptr_t pptr;
slot_pos_t slot_pos_before;
slot_pos_t slot_pos_after;
slot_pos_before = ndks_boot.slot_pos_cur;
if (PDPT_BITS == 0) {
cap_t pd_cap;
pptr_t pd_pptr;
/* just create single PD obj and cap */
pd_pptr = alloc_region(PD_SIZE_BITS);
if (!pd_pptr) {
return cap_null_cap_new();
}
memzero(PDE_PTR(pd_pptr), 1 << PD_SIZE_BITS);
copyGlobalMappings(PDE_PTR(pd_pptr));
pd_cap = create_it_page_directory_cap(cap_null_cap_new(), pd_pptr, 0, IT_ASID);
if (!provide_cap(root_cnode_cap, pd_cap)) {
return cap_null_cap_new();
}
write_slot(SLOT_PTR(pptr_of_cap(root_cnode_cap), BI_CAP_IT_VSPACE), pd_cap);
vspace_cap = pd_cap;
} else {
cap_t pdpt_cap;
pptr_t pdpt_pptr;
unsigned int i;
/* create a PDPT obj and cap */
pdpt_pptr = alloc_region(PDPT_SIZE_BITS);
if (!pdpt_pptr) {
return cap_null_cap_new();
}
memzero(PDPTE_PTR(pdpt_pptr), 1 << PDPT_SIZE_BITS);
pdpt_cap = cap_pdpt_cap_new(
true, /* capPDPTISMapped */
IT_ASID, /* capPDPTMappedASID */
pdpt_pptr /* capPDPTBasePtr */
);
/* create all PD objs and caps necessary to cover userland image. For simplicity
* to ensure we also cover the kernel window we create all PDs */
for (i = 0; i < BIT(PDPT_BITS); i++) {
/* The compiler is under the mistaken belief here that this shift could be
* undefined. However, in the case that it would be undefined this code path
* is not reachable because PDPT_BITS == 0 (see if statement at the top of
* this function), so to work around it we must both put in a redundant
* if statement AND place the shift in a variable. While the variable
* will get compiled away it prevents the compiler from evaluating
* the 1 << 32 as a constant when it shouldn't
* tl;dr gcc evaluates constants even if code is unreachable */
int shift = (PD_BITS + PT_BITS + PAGE_BITS);
if (shift != 32) {
vptr = i << shift;
} else {
return cap_null_cap_new();
}
pptr = alloc_region(PD_SIZE_BITS);
if (!pptr) {
return cap_null_cap_new();
}
memzero(PDE_PTR(pptr), 1 << PD_SIZE_BITS);
if (!provide_cap(root_cnode_cap,
create_it_page_directory_cap(pdpt_cap, pptr, vptr, IT_ASID))
) {
return cap_null_cap_new();
}
}
/* now that PDs exist we can copy the global mappings */
copyGlobalMappings(PDPTE_PTR(pdpt_pptr));
write_slot(SLOT_PTR(pptr_of_cap(root_cnode_cap), BI_CAP_IT_VSPACE), pdpt_cap);
vspace_cap = pdpt_cap;
}
slot_pos_after = ndks_boot.slot_pos_cur;
ndks_boot.bi_frame->ui_pd_caps = (slot_region_t) {
slot_pos_before, slot_pos_after
};
/* create all PT objs and caps necessary to cover userland image */
slot_pos_before = ndks_boot.slot_pos_cur;
for (vptr = ROUND_DOWN(it_v_reg.start, PT_BITS + PAGE_BITS);
vptr < it_v_reg.end;
vptr += BIT(PT_BITS + PAGE_BITS)) {
pptr = alloc_region(PT_SIZE_BITS);
if (!pptr) {
return cap_null_cap_new();
}
memzero(PTE_PTR(pptr), 1 << PT_SIZE_BITS);
if (!provide_cap(root_cnode_cap,
create_it_page_table_cap(vspace_cap, pptr, vptr, IT_ASID))
) {
return cap_null_cap_new();
}
}
slot_pos_after = ndks_boot.slot_pos_cur;
ndks_boot.bi_frame->ui_pt_caps = (slot_region_t) {
slot_pos_before, slot_pos_after
};
return vspace_cap;
}