void cosimWriteBlock(Core *core, uint32_t pc, uint32_t address, uint32_t mask,
const uint32_t *values)
{
uint64_t byteMask;
int lane;
byteMask = 0;
for (lane = 0; lane < NUM_VECTOR_LANES; lane++)
{
if (mask & (1 << lane))
byteMask |= 0xfull << (lane * 4);
}
cosimEventTriggered = true;
if (cosimCheckEvent != EVENT_MEM_STORE
|| cosimCheckPc != pc
|| cosimCheckAddress != (address & ~(NUM_VECTOR_LANES * 4u - 1))
|| cosimCheckMask != byteMask
|| !compareMasked(mask, cosimCheckValues, values))
{
cosimError = true;
printRegisters(core, cosimCheckThread);
printf("COSIM MISMATCH, thread %d\n", cosimCheckThread);
printf("Reference: %08x memory[%x]{%016" PRIx64 "} <= ", pc, address, byteMask);
for (lane = NUM_VECTOR_LANES - 1; lane >= 0; lane--)
printf("%08x ", values[lane]);
printf("\nHardware: ");
printCosimExpected();
return;
}
}
void cosimWriteMemory(Core *core, uint32_t pc, uint32_t address, uint32_t size,
uint32_t value)
{
uint32_t hardwareValue;
uint64_t referenceMask;
hardwareValue = cosimCheckValues[(address & CACHE_LINE_MASK) / 4];
if (size < 4)
{
uint32_t mask = (1 << (size * 8)) - 1;
hardwareValue &= mask;
value &= mask;
}
referenceMask = ((1ull << size) - 1ull) << (CACHE_LINE_MASK - (address & CACHE_LINE_MASK) - (size - 1));
cosimEventTriggered = true;
if (cosimCheckEvent != EVENT_MEM_STORE
|| cosimCheckPc != pc
|| cosimCheckAddress != (address & ~CACHE_LINE_MASK)
|| cosimCheckMask != referenceMask
|| hardwareValue != value)
{
cosimError = true;
printRegisters(core, cosimCheckThread);
printf("COSIM MISMATCH, thread %d\n", cosimCheckThread);
printf("Reference: %08x memory[%x]{%016" PRIx64 "} <= %08x\n", pc, address & ~CACHE_LINE_MASK,
referenceMask, value);
printf("Hardware: ");
printCosimExpected();
return;
}
}
void cosimSetVectorReg(Core *core, uint32_t pc, uint32_t reg, uint32_t mask,
const uint32_t *values)
{
int lane;
cosimEventTriggered = true;
if (cosimCheckEvent != EVENT_VECTOR_WRITEBACK
|| cosimCheckPc != pc
|| cosimCheckRegister != reg
|| !compareMasked(mask, cosimCheckValues, values)
|| cosimCheckMask != (mask & 0xffff))
{
cosimError = true;
printRegisters(core, cosimCheckThread);
printf("COSIM MISMATCH, thread %d\n", cosimCheckThread);
printf("Reference: %08x v%d{%04x} <= ", pc, reg, mask & 0xffff);
for (lane = NUM_VECTOR_LANES - 1; lane >= 0; lane--)
printf("%08x ", values[lane]);
printf("\n");
printf("Hardware: ");
printCosimExpected();
return;
}
}
void cosimWriteMemory(Core *core, uint32_t pc, uint32_t address, size_t size, uint32_t value)
{
uint32_t hardwareValue;
uint64_t referenceMask;
hardwareValue = cosimCheckValues[(address % 63) / 4];
if (size < 4)
{
uint32_t mask = (1 << (size * 8)) - 1;
hardwareValue &= mask;
value &= mask;
}
referenceMask = ((1ull << size) - 1ull) << (63 - (address & 63) - (size - 1));
cosimEventTriggered = 1;
if (cosimCheckEvent != kEventMemStore
|| cosimCheckPc != pc
|| cosimCheckAddress != (address & ~63)
|| cosimCheckMask != referenceMask
|| hardwareValue != value)
{
cosimError = 1;
printRegisters(core, cosimCheckThread);
printf("COSIM MISMATCH, thread %d\n", cosimCheckThread);
printf("Reference: %08x memory[%x]{%016llx} <= %08x\n", pc, address & ~63,
referenceMask, value);
printf("Hardware: ");
printCosimExpected();
return;
}
}
void cosimWriteBlock(Core *core, uint32_t pc, uint32_t address, int mask, const uint32_t values[16])
{
uint64_t byteMask;
int lane;
byteMask = 0;
for (lane = 0; lane < 16; lane++)
{
if (mask & (1 << lane))
byteMask |= 0xfLL << (lane * 4);
}
cosimEventTriggered = 1;
if (cosimCheckEvent != kEventMemStore
|| cosimCheckPc != pc
|| cosimCheckAddress != (address & ~63)
|| cosimCheckMask != byteMask
|| !compareMasked(mask, cosimCheckValues, values))
{
cosimError = 1;
printRegisters(core, cosimCheckThread);
printf("COSIM MISMATCH, thread %d\n", cosimCheckThread);
printf("Reference: %08x memory[%x]{%016llx} <= ", pc, address, byteMask);
for (lane = 15; lane >= 0; lane--)
printf("%08x ", values[lane]);
printf("\nHardware: ");
printCosimExpected();
return;
}
}
// Returns 1 if the event matched, 0 if it did not.
static int cosimStep(Core *core, uint32_t threadId)
{
int count = 0;
cosimError = false;
cosimEventTriggered = false;
for (count = 0; count < 500 && !cosimEventTriggered; count++)
singleStep(core, threadId);
if (!cosimEventTriggered)
{
printf("Simulator program in infinite loop? No event occurred. Was expecting:\n");
printCosimExpected();
}
return cosimEventTriggered && !cosimError;
}
void cosimSetScalarReg(Core *core, uint32_t pc, uint32_t reg, uint32_t value)
{
cosimEventTriggered = true;
if (cosimCheckEvent != EVENT_SCALAR_WRITEBACK
|| cosimCheckPc != pc
|| cosimCheckRegister != reg
|| cosimCheckValues[0] != value)
{
cosimError = true;
printRegisters(core, cosimCheckThread);
printf("COSIM MISMATCH, thread %d\n", cosimCheckThread);
printf("Reference: %08x s%d <= %08x\n", pc, reg, value);
printf("Hardware: ");
printCosimExpected();
return;
}
}
void cosimSetVectorReg(Core *core, uint32_t pc, int reg, int mask, const uint32_t values[16])
{
int lane;
cosimEventTriggered = 1;
if (cosimCheckEvent != kEventVectorWriteback
|| cosimCheckPc != pc
|| cosimCheckRegister != reg
|| !compareMasked(mask, cosimCheckValues, values)
|| cosimCheckMask != (mask & 0xffff))
{
cosimError = 1;
printRegisters(core, cosimCheckThread);
printf("COSIM MISMATCH, thread %d\n", cosimCheckThread);
printf("Reference: %08x v%d{%04x} <= ", pc, reg, mask & 0xffff);
for (lane = 15; lane >= 0; lane--)
printf("%08x ", values[lane]);
printf("\n");
printf("Hardware: ");
printCosimExpected();
return;
}
}
