struct intel_winsys *
intel_winsys_create_for_fd(int fd)
{
struct intel_winsys *winsys;
winsys = CALLOC_STRUCT(intel_winsys);
if (!winsys)
return NULL;
winsys->fd = fd;
winsys->bufmgr = drm_intel_bufmgr_gem_init(winsys->fd, BATCH_SZ);
if (!winsys->bufmgr) {
debug_error("failed to create GEM buffer manager");
FREE(winsys);
return NULL;
}
pipe_mutex_init(winsys->mutex);
if (!probe_winsys(winsys)) {
drm_intel_bufmgr_destroy(winsys->bufmgr);
FREE(winsys);
return NULL;
}
/*
* No need to implicitly set up a fence register for each non-linear reloc
* entry. When a fence register is needed for a reloc entry,
* drm_intel_bo_emit_reloc_fence() will be called explicitly.
*
* intel_bo_add_reloc() currently lacks "bool fenced" for this to work.
* But we never need a fence register on GEN4+ so we do not need to worry
* about it yet.
*/
drm_intel_bufmgr_gem_enable_fenced_relocs(winsys->bufmgr);
drm_intel_bufmgr_gem_enable_reuse(winsys->bufmgr);
return winsys;
}
struct intel_winsys *
intel_winsys_create_for_fd(int fd)
{
/* so that we can have enough (up to 4094) relocs per bo */
const int batch_size = sizeof(uint32_t) * 8192;
struct intel_winsys *winsys;
winsys = CALLOC_STRUCT(intel_winsys);
if (!winsys)
return NULL;
winsys->fd = fd;
winsys->bufmgr = drm_intel_bufmgr_gem_init(winsys->fd, batch_size);
if (!winsys->bufmgr) {
debug_error("failed to create GEM buffer manager");
FREE(winsys);
return NULL;
}
pipe_mutex_init(winsys->mutex);
if (!probe_winsys(winsys)) {
pipe_mutex_destroy(winsys->mutex);
drm_intel_bufmgr_destroy(winsys->bufmgr);
FREE(winsys);
return NULL;
}
/*
* No need to implicitly set up a fence register for each non-linear reloc
* entry. INTEL_RELOC_FENCE will be set on reloc entries that need them.
*/
drm_intel_bufmgr_gem_enable_fenced_relocs(winsys->bufmgr);
drm_intel_bufmgr_gem_enable_reuse(winsys->bufmgr);
return winsys;
}
