Exemplo n.º 1
0
static void __init console_config(void)
{
	char console_string[40];
	int baud = 0;
	char parity = '\0', bits = '\0', flow = '\0';
	char *s;

	if ((strstr(prom_getcmdline(), "console=")) == NULL) {
		s = prom_getenv("modetty0");
		if (s) {
			while (*s >= '0' && *s <= '9')
				baud = baud*10 + *s++ - '0';
			if (*s == ',') s++;
			if (*s) parity = *s++;
			if (*s == ',') s++;
			if (*s) bits = *s++;
			if (*s == ',') s++;
			if (*s == 'h') flow = 'r';
		}
		if (baud == 0)
			baud = 38400;
		if (parity != 'n' && parity != 'o' && parity != 'e')
			parity = 'n';
		if (bits != '7' && bits != '8')
			bits = '8';
		if (flow == '\0')
			flow = 'r';
		sprintf(console_string, " console=ttyS0,%d%c%c%c", baud, parity, bits, flow);
		strcat(prom_getcmdline(), console_string);
		pr_info("Config serial console:%s\n", console_string);
	}
}
Exemplo n.º 2
0
static void jmr3927_board_init()
{
	char *argptr;

#ifdef CONFIG_PCI
	mips_pci_io_base = JMR3927_PCIIO;
	mips_pci_io_size = JMR3927_PCIIO_SIZE;
	mips_pci_mem_base = JMR3927_PCIMEM;
	mips_pci_mem_size = JMR3927_PCIMEM_SIZE;
#endif

	tx3927_setup();

#ifdef CONFIG_VT
	conswitchp = &dummy_con;
#endif

	if (jmr3927_have_isac()) {

#ifdef CONFIG_FB_E1355
		argptr = prom_getcmdline();
		if ((argptr = strstr(argptr, "video=")) == NULL) {
			argptr = prom_getcmdline();
			strcat(argptr, " video=e1355fb:crt16h");
		}
#endif

#ifdef CONFIG_BLK_DEV_IDE
		/* overrides PCI-IDE */
#endif

#ifdef CONFIG_PC_KEYB
		//not yet kbd_ops = &jmr3927_kbd_ops;
#endif
	}
#ifdef USE_RTC_DS1742
	if (jmr3927_have_nvram()) {
		rtc_ops = &jmr3927_rtc_ops;
	}
#endif

	/* SIO0 DTR on */
	jmr3927_ioc_reg_out(0, JMR3927_IOC_DTR_ADDR);

	jmr3927_led_set(0);


	if (jmr3927_have_isac()) 
		jmr3927_io_led_set(0);
	printk("JMR-TX3927 (Rev %d) --- IOC(Rev %d) DIPSW:%d,%d,%d,%d\n",
	       jmr3927_ioc_reg_in(JMR3927_IOC_BREV_ADDR) & JMR3927_REV_MASK,
	       jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR) & JMR3927_REV_MASK,
	       jmr3927_dipsw1(), jmr3927_dipsw2(),
	       jmr3927_dipsw3(), jmr3927_dipsw4());
	if (jmr3927_have_isac())
		printk("JMI-3927IO2 --- ISAC(Rev %d) DIPSW:%01x\n",
		       jmr3927_isac_reg_in(JMR3927_ISAC_REV_ADDR) & JMR3927_REV_MASK,
		       jmr3927_io_dipsw());
}
Exemplo n.º 3
0
void __init board_setup(void)
{
	u32 pin_func;

#ifdef CONFIG_SERIAL_8250_CONSOLE
	char *argptr;
	argptr = prom_getcmdline();
	argptr = strstr(argptr, "console=");
	if (argptr == NULL) {
		argptr = prom_getcmdline();
		strcat(argptr, " console=ttyS0,115200");
	}
#endif

	alchemy_gpio1_input_enable();
	alchemy_gpio2_enable();

	/* Set multiple use pins (UART3/GPIO) to UART (it's used as UART too) */
	pin_func  = au_readl(SYS_PINFUNC) & ~SYS_PF_UR3;
	pin_func |= SYS_PF_UR3;
	au_writel(pin_func, SYS_PINFUNC);

	/* Enable UART */
	au_writel(0x01, UART3_ADDR + UART_MOD_CNTRL); /* clock enable (CE) */
	mdelay(10);
	au_writel(0x03, UART3_ADDR + UART_MOD_CNTRL); /* CE and "enable" */
	mdelay(10);

	/* Enable DTR = USB power up */
	au_writel(0x01, UART3_ADDR + UART_MCR); /* UART_MCR_DTR is 0x01??? */

#ifdef CONFIG_PCMCIA_XXS1500
	/* GPIO 0, 1, and 4 are inputs */
	alchemy_gpio_direction_input(0);
	alchemy_gpio_direction_input(1);
	alchemy_gpio_direction_input(4);

	/* GPIO2 208/9/10/11 are inputs */
	alchemy_gpio_direction_input(208);
	alchemy_gpio_direction_input(209);
	alchemy_gpio_direction_input(210);
	alchemy_gpio_direction_input(211);

	/* Turn off power */
	alchemy_gpio_direction_output(214, 0);
#endif

#ifdef CONFIG_PCI
#if defined(__MIPSEB__)
	au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG);
#else
	au_writel(0xf, Au1500_PCI_CFG);
#endif
#endif
}
Exemplo n.º 4
0
static void __init rbtx4927_mem_setup(void)
{
	char *argptr;

	if (TX4927_REV_PCODE() == 0x4927) {
		rbtx4927_clock_init();
		tx4927_setup();
	} else {
		rbtx4937_clock_init();
		tx4938_setup();
	}

	_machine_restart = toshiba_rbtx4927_restart;

#ifdef CONFIG_PCI
	txx9_alloc_pci_controller(&txx9_primary_pcic,
				  RBTX4927_PCIMEM, RBTX4927_PCIMEM_SIZE,
				  RBTX4927_PCIIO, RBTX4927_PCIIO_SIZE);
	txx9_board_pcibios_setup = tx4927_pcibios_setup;
#else
	set_io_port_base(KSEG1 + RBTX4927_ISA_IO_OFFSET);
#endif

	/* TX4927-SIO DTR on (PIO[15]) */
	gpio_request(15, "sio-dtr");
	gpio_direction_output(15, 1);

	tx4927_sio_init(0, 0);
#ifdef CONFIG_SERIAL_TXX9_CONSOLE
	argptr = prom_getcmdline();
	if (!strstr(argptr, "console="))
		strcat(argptr, " console=ttyS0,38400");
#endif
}
Exemplo n.º 5
0
void __init board_setup(void)
{
#ifdef CONFIG_SERIAL_8250_CONSOLE
	char *argptr;
	argptr = prom_getcmdline();
	argptr = strstr(argptr, "console=");
	if (argptr == NULL) {
		argptr = prom_getcmdline();
		strcat(argptr, " console=ttyS0,115200");
	}
#endif

	alchemy_gpio2_enable();

#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
	/* Enable USB power switch */
	alchemy_gpio_direction_output(204, 0);
#endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */

#ifdef CONFIG_PCI
#if defined(__MIPSEB__)
	au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG);
#else
	au_writel(0xf, Au1500_PCI_CFG);
#endif
#endif

	/* Initialize sys_pinfunc */
	au_writel(SYS_PF_NI2, SYS_PINFUNC);

	/* Initialize GPIO */
	au_writel(0xFFFFFFFF, SYS_TRIOUTCLR);
	alchemy_gpio_direction_output(0, 0);	/* Disable M66EN (PCI 66MHz) */
	alchemy_gpio_direction_output(3, 1);	/* Disable PCI CLKRUN# */
	alchemy_gpio_direction_output(1, 1);	/* Enable EXT_IO3 */
	alchemy_gpio_direction_output(5, 0);	/* Disable eth PHY TX_ER */

	/* Enable LED and set it to green */
	alchemy_gpio_direction_output(211, 1);	/* green on */
	alchemy_gpio_direction_output(212, 0);	/* red off */

	board_pci_idsel = mtx1_pci_idsel;

	printk(KERN_INFO "4G Systems MTX-1 Board\n");
}
Exemplo n.º 6
0
void __init board_setup(void)
{
#ifdef CONFIG_SERIAL_8250_CONSOLE
	char *argptr;
	argptr = prom_getcmdline();
	argptr = strstr(argptr, "console=");
	if (argptr == NULL) {
		argptr = prom_getcmdline();
		strcat(argptr, " console=ttyS0,115200");
	}
#endif

#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
	/* Enable USB power switch */
	au_writel(au_readl(GPIO2_DIR) | 0x10, GPIO2_DIR);
	au_writel(0x100000, GPIO2_OUTPUT);
#endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */

#ifdef CONFIG_PCI
#if defined(__MIPSEB__)
	au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG);
#else
	au_writel(0xf, Au1500_PCI_CFG);
#endif
#endif

	/* Initialize sys_pinfunc */
	au_writel(SYS_PF_NI2, SYS_PINFUNC);

	/* Initialize GPIO */
	au_writel(0xFFFFFFFF, SYS_TRIOUTCLR);
	au_writel(0x00000001, SYS_OUTPUTCLR); /* set M66EN (PCI 66MHz) to OFF */
	au_writel(0x00000008, SYS_OUTPUTSET); /* set PCI CLKRUN# to OFF */
	au_writel(0x00000002, SYS_OUTPUTSET); /* set EXT_IO3 ON */
	au_writel(0x00000020, SYS_OUTPUTCLR); /* set eth PHY TX_ER to OFF */

	/* Enable LED and set it to green */
	au_writel(au_readl(GPIO2_DIR) | 0x1800, GPIO2_DIR);
	au_writel(0x18000800, GPIO2_OUTPUT);

	board_pci_idsel = mtx1_pci_idsel;

	printk(KERN_INFO "4G Systems MTX-1 Board\n");
}
Exemplo n.º 7
0
void __init plat_mem_setup(void)
{
	int i;
	char* argptr;

	board_setup();  /* board specific setup */

        _machine_restart = pnx8550_machine_restart;
        _machine_halt = pnx8550_machine_halt;
        pm_power_off = pnx8550_machine_power_off;

	/* Clear the Global 2 Register, PCI Inta Output Enable Registers
	   Bit 1:Enable DAC Powerdown
	  -> 0:DACs are enabled and are working normally
	     1:DACs are powerdown
	   Bit 0:Enable of PCI inta output
	  -> 0 = Disable PCI inta output
	     1 = Enable PCI inta output
	*/
	PNX8550_GLB2_ENAB_INTA_O = 0;

	/* IO/MEM resources. */
	set_io_port_base(PNX8550_PORT_BASE);
	ioport_resource.start = 0;
	ioport_resource.end = ~0;
	iomem_resource.start = 0;
	iomem_resource.end = ~0;

	/* Request I/O space for devices on this board */
	for (i = 0; i < STANDARD_IO_RESOURCES; i++)
		request_resource(&ioport_resource, standard_io_resources + i);

	/* Place the Mode Control bit for GPIO pin 16 in primary function */
	/* Pin 16 is used by UART1, UA1_TX                                */
	outl((PNX8550_GPIO_MODE_PRIMOP << PNX8550_GPIO_MC_16_BIT) |
			(PNX8550_GPIO_MODE_PRIMOP << PNX8550_GPIO_MC_17_BIT),
			PNX8550_GPIO_MC1);

	argptr = prom_getcmdline();
	if ((argptr = strstr(argptr, "console=ttyS")) != NULL) {
		argptr += strlen("console=ttyS");
		pnx8550_console_port = *argptr == '0' ? 0 : 1;

		/* We must initialize the UART (console) before early printk */
		/* Set LCR to 8-bit and BAUD to 38400 (no 5)                */
		ip3106_lcr(UART_BASE, pnx8550_console_port) =
			PNX8XXX_UART_LCR_8BIT;
		ip3106_baud(UART_BASE, pnx8550_console_port) = 5;
	}

	return;
}
Exemplo n.º 8
0
static unsigned int __init prom_get_ramsize(void)
{
	char *argptr;
	unsigned int ramsize = 0;

	argptr = prom_getcmdline();

	if ((argptr = strstr(argptr, "ramsize=")) != NULL) {
		argptr += strlen("ramsize=");
		ramsize = simple_strtoul(&argptr[0], NULL, 0);
	}

	return ramsize;
}
Exemplo n.º 9
0
void __init kgdb_config (void)
{
	extern int (*generic_putDebugChar)(char);
	extern char (*generic_getDebugChar)(void);
	char *argptr;
	int line, speed;

	argptr = prom_getcmdline();
	if ((argptr = strstr(argptr, "kgdb=ttyS")) != NULL) {
		argptr += strlen("kgdb=ttyS");
		if (*argptr != '0' && *argptr != '1')
			printk("KGDB: Unknown serial line /dev/ttyS%c, "
			       "falling back to /dev/ttyS1\n", *argptr);
		line = *argptr == '0' ? 0 : 1;
		printk("KGDB: Using serial line /dev/ttyS%d for session\n", line);

		speed = 0;
		if (*++argptr == ',')
		{
			int c;
			while ((c = *++argptr) && ('0' <= c && c <= '9'))
				speed = speed * 10 + c - '0';
		}
#ifdef CONFIG_MIPS_ATLAS
		if (line == 1) {
			speed = saa9730_kgdb_hook(speed);
			generic_putDebugChar = saa9730_putDebugChar;
			generic_getDebugChar = saa9730_getDebugChar;
		}
		else
#endif
		{
			speed = rs_kgdb_hook(line, speed);
			generic_putDebugChar = rs_putDebugChar;
			generic_getDebugChar = rs_getDebugChar;
		}

		pr_info("KGDB: Using serial line /dev/ttyS%d at %d for "
		        "session, please connect your debugger\n",
		        line ? 1 : 0, speed);

		{
			char *s;
			for (s = "Please connect GDB to this port\r\n"; *s; )
				generic_putDebugChar (*s++);
		}

		/* Breakpoint is invoked after interrupts are initialised */
	}
}
Exemplo n.º 10
0
void __init plat_mem_setup(void)
{
	char *argptr;

	argptr = prom_getcmdline();

	/* IO/MEM resources. Which will be the addtion value in `inX' and
	 * `outX' macros defined in asm/io.h */
	set_io_port_base(0);
	ioport_resource.start	= 0x00000000;
	ioport_resource.end	= 0xffffffff;
	iomem_resource.start	= 0x00000000;
	iomem_resource.end	= 0xffffffff;

	_machine_restart = jz_restart;
	_machine_halt = jz_halt;
	pm_power_off = jz_power_off;
	jz_serial_setup();
}
Exemplo n.º 11
0
static void __init pci_clock_check(void)
{
	unsigned int __iomem *jmpr_p =
		(unsigned int *) ioremap(MALTA_JMPRS_REG, sizeof(unsigned int));
	int jmpr = (__raw_readl(jmpr_p) >> 2) & 0x07;
	static const int pciclocks[] __initdata = {
		33, 20, 25, 30, 12, 16, 37, 10
	};
	int pciclock = pciclocks[jmpr];
	char *argptr = prom_getcmdline();

	if (pciclock != 33 && !strstr(argptr, "idebus=")) {
		printk(KERN_WARNING "WARNING: PCI clock is %dMHz, "
				"setting idebus\n", pciclock);
		argptr += strlen(argptr);
		sprintf(argptr, " idebus=%d", pciclock);
		if (pciclock < 20 || pciclock > 66)
			printk(KERN_WARNING "WARNING: IDE timing "
					"calculations will be incorrect\n");
	}
}
Exemplo n.º 12
0
void __init plat_mem_setup(void)
{
	char *argptr;

	argptr = prom_getcmdline();

	/* IO/MEM resources. */
	set_io_port_base(0);
	ioport_resource.start = 0x00000000;
	ioport_resource.end = 0xffffffff;
	iomem_resource.start = 0x00000000;
	iomem_resource.end = 0xffffffff;

	_machine_restart = jz_restart;
	_machine_halt = jz_halt;
	pm_power_off = jz_power_off;

	jz_soc_setup();    /* soc specific setup */
	jz_serial_setup(); /* serial port setup */
	jz_board_setup();  /* board specific setup */
}
Exemplo n.º 13
0
static void __init rbtx4927_mem_setup(void)
{
	u32 cp0_config;
	char *argptr;

	/* enable caches -- HCP5 does this, pmon does not */
	cp0_config = read_c0_config();
	cp0_config = cp0_config & ~(TX49_CONF_IC | TX49_CONF_DC);
	write_c0_config(cp0_config);

	if (TX4927_REV_PCODE() == 0x4927) {
		rbtx4927_clock_init();
		tx4927_setup();
	} else {
		rbtx4937_clock_init();
		tx4938_setup();
	}

	_machine_restart = toshiba_rbtx4927_restart;

#ifdef CONFIG_PCI
	txx9_alloc_pci_controller(&txx9_primary_pcic,
				  RBTX4927_PCIMEM, RBTX4927_PCIMEM_SIZE,
				  RBTX4927_PCIIO, RBTX4927_PCIIO_SIZE);
	txx9_board_pcibios_setup = tx4927_pcibios_setup;
#else
	set_io_port_base(KSEG1 + RBTX4927_ISA_IO_OFFSET);
#endif

	tx4927_sio_init(0, 0);
#ifdef CONFIG_SERIAL_TXX9_CONSOLE
	argptr = prom_getcmdline();
	if (!strstr(argptr, "console="))
		strcat(argptr, " console=ttyS0,38400");
#endif
}
Exemplo n.º 14
0
void __init board_setup(void)
{
	char *argptr = NULL;
	u32 pin_func;
	rtc_ops = &no_rtc_ops;

#if 0
	/* Enable PSC1 SYNC for AC97.  Normaly done in audio driver,
	 * but it is board specific code, so put it here.
	 */
	pin_func = au_readl(SYS_PINFUNC);
	au_sync();
	pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
	au_writel(pin_func, SYS_PINFUNC);

	au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */
	au_sync();
#endif

#if defined( CONFIG_I2C_ALGO_AU1550 )
	{
	u32 freq0, clksrc;

	/* Select SMBUS in CPLD */
	bcsr->resets &= ~(BCSR_RESETS_PCS0MUX);

	pin_func = au_readl(SYS_PINFUNC);
	au_sync();
	pin_func &= ~(3<<17 | 1<<4);
	/* Set GPIOs correctly */
	pin_func |= 2<<17;
	au_writel(pin_func, SYS_PINFUNC);
	au_sync();

	/* The i2c driver depends on 50Mhz clock */
	freq0 = au_readl(SYS_FREQCTRL0);
	au_sync();
	freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
	freq0 |= (3<<SYS_FC_FRDIV1_BIT);
	/* 396Mhz / (3+1)*2 == 49.5Mhz */
	au_writel(freq0, SYS_FREQCTRL0);
	au_sync();
	freq0 |= SYS_FC_FE1;
	au_writel(freq0, SYS_FREQCTRL0);
	au_sync();

	clksrc = au_readl(SYS_CLKSRC);
	au_sync();
	clksrc &= ~0x01f00000;
	/* bit 22 is EXTCLK0 for PSC0 */
	clksrc |= (0x3 << 22);
	au_writel(clksrc, SYS_CLKSRC);
	au_sync();
	}
#endif

#ifdef CONFIG_FB_AU1200
	argptr = prom_getcmdline();
	strcat(argptr, " video=au1200fb:");
#endif

#if defined(CONFIG_BLK_DEV_IDE_AU1XXX)
	/*
	 * Iniz IDE parameters
	 */
	ide_ops = &au1xxx_ide_ops;
	au1xxx_ide_irq = PB1200_IDE_INT;
	au1xxx_ide_physbase = AU1XXX_ATA_PHYS_ADDR;
	au1xxx_ide_virtbase = KSEG1ADDR(AU1XXX_ATA_PHYS_ADDR);
	/*
	 * change PIO or PIO+Ddma
	 * check the GPIO-5 pin condition. pb1200:s18_dot */
	switch4ddma = (au_readl(SYS_PINSTATERD) & (1 << 5)) ? 1 : 0; 
#endif

	/* The Pb1200 development board uses external MUX for PSC0 to
	support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI
	*/
#if defined(CONFIG_AU1550_PSC_SPI) && defined(CONFIG_I2C_ALGO_AU1550)
	#error I2C and SPI are mutually exclusive. Both are physically connected to PSC0.\
			Refer to Pb1200/Db1200 documentation.
#elif defined( CONFIG_AU1550_PSC_SPI )
	bcsr->resets |= BCSR_RESETS_PCS0MUX;
#elif defined( CONFIG_I2C_ALGO_AU1550 )
	bcsr->resets &= (~BCSR_RESETS_PCS0MUX);
#endif
	au_sync();

#ifdef CONFIG_MIPS_PB1200
	printk("AMD Alchemy Pb1200 Board\n");
#endif
#ifdef CONFIG_MIPS_DB1200
	printk("AMD Alchemy Db1200 Board\n");
#endif

	/* Setup Pb1200 External Interrupt Controller */
	{
		extern void (*board_init_irq)(void);
		extern void _board_init_irq(void);
		board_init_irq = _board_init_irq;
	}
}
Exemplo n.º 15
0
void __init board_setup(void)
{
	u32 pin_func;
	u32 sys_freqctrl, sys_clksrc;
	char *argptr;

	argptr = prom_getcmdline();
#ifdef CONFIG_SERIAL_8250_CONSOLE
	argptr = strstr(argptr, "console=");
	if (argptr == NULL) {
		argptr = prom_getcmdline();
		strcat(argptr, " console=ttyS0,115200");
	}
#endif

#if defined(CONFIG_SOUND_AU1X00) && !defined(CONFIG_SOC_AU1000)
	/* au1000 does not support vra, au1500 and au1100 do */
	strcat(argptr, " au1000_audio=vra");
	argptr = prom_getcmdline();
#endif

	sys_clksrc = sys_freqctrl = pin_func = 0;
	/* Set AUX clock to 12 MHz * 8 = 96 MHz */
	au_writel(8, SYS_AUXPLL);
	au_writel(0, SYS_PINSTATERD);
	udelay(100);

	/* GPIO201 is input for PCMCIA card detect */
	/* GPIO203 is input for PCMCIA interrupt request */
	alchemy_gpio_direction_input(201);
	alchemy_gpio_direction_input(203);

#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)

	/* Zero and disable FREQ2 */
	sys_freqctrl = au_readl(SYS_FREQCTRL0);
	sys_freqctrl &= ~0xFFF00000;
	au_writel(sys_freqctrl, SYS_FREQCTRL0);

	/* zero and disable USBH/USBD clocks */
	sys_clksrc = au_readl(SYS_CLKSRC);
	sys_clksrc &= ~(SYS_CS_CUD | SYS_CS_DUD | SYS_CS_MUD_MASK |
			SYS_CS_CUH | SYS_CS_DUH | SYS_CS_MUH_MASK);
	au_writel(sys_clksrc, SYS_CLKSRC);

	sys_freqctrl = au_readl(SYS_FREQCTRL0);
	sys_freqctrl &= ~0xFFF00000;

	sys_clksrc = au_readl(SYS_CLKSRC);
	sys_clksrc &= ~(SYS_CS_CUD | SYS_CS_DUD | SYS_CS_MUD_MASK |
			SYS_CS_CUH | SYS_CS_DUH | SYS_CS_MUH_MASK);

	/* FREQ2 = aux/2 = 48 MHz */
	sys_freqctrl |= (0 << SYS_FC_FRDIV2_BIT) | SYS_FC_FE2 | SYS_FC_FS2;
	au_writel(sys_freqctrl, SYS_FREQCTRL0);

	/*
	 * Route 48MHz FREQ2 into USB Host and/or Device
	 */
	sys_clksrc |= SYS_CS_MUX_FQ2 << SYS_CS_MUH_BIT;
	au_writel(sys_clksrc, SYS_CLKSRC);

	pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_USB;
	/* 2nd USB port is USB host */
	pin_func |= SYS_PF_USB;
	au_writel(pin_func, SYS_PINFUNC);
#endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */

#ifdef CONFIG_PCI
	/* Setup PCI bus controller */
	au_writel(0, Au1500_PCI_CMEM);
	au_writel(0x00003fff, Au1500_CFG_BASE);
#if defined(__MIPSEB__)
	au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG);
#else
	au_writel(0xf, Au1500_PCI_CFG);
#endif
	au_writel(0xf0000000, Au1500_PCI_MWMASK_DEV);
	au_writel(0, Au1500_PCI_MWBASE_REV_CCL);
	au_writel(0x02a00356, Au1500_PCI_STATCMD);
	au_writel(0x00003c04, Au1500_PCI_HDRTYPE);
	au_writel(0x00000008, Au1500_PCI_MBAR);
	au_sync();
#endif

	/* Enable sys bus clock divider when IDLE state or no bus activity. */
	au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL);

	/* Enable the RTC if not already enabled */
	if (!(au_readl(0xac000028) & 0x20)) {
		printk(KERN_INFO "enabling clock ...\n");
		au_writel((au_readl(0xac000028) | 0x20), 0xac000028);
	}
	/* Put the clock in BCD mode */
	if (au_readl(0xac00002c) & 0x4) { /* reg B */
		au_writel(au_readl(0xac00002c) & ~0x4, 0xac00002c);
		au_sync();
	}
}
Exemplo n.º 16
0
void __init plat_setup(void)
{
	char *argptr;

	set_io_port_base(JMR3927_PORT_BASE + JMR3927_PCIIO);

	board_time_init = jmr3927_time_init;
	board_timer_setup = jmr3927_timer_setup;

	_machine_restart = jmr3927_machine_restart;
	_machine_halt = jmr3927_machine_halt;
	pm_power_off = jmr3927_machine_power_off;

	/*
	 * IO/MEM resources.
	 */
	ioport_resource.start = pci_io_resource.start;
	ioport_resource.end = pci_io_resource.end;
	iomem_resource.start = 0;
	iomem_resource.end = 0xffffffff;

	/* Reboot on panic */
	panic_timeout = 180;

	{
		unsigned int conf;
		conf = read_c0_conf();
	}

#if 1
	/* cache setup */
	{
		unsigned int conf;
#ifdef DO_ENABLE_CACHE
		int mips_ic_disable = 0, mips_dc_disable = 0;
#else
		int mips_ic_disable = 1, mips_dc_disable = 1;
#endif
#ifdef DO_WRITE_THROUGH
		int mips_config_cwfon = 0;
		int mips_config_wbon = 0;
#else
		int mips_config_cwfon = 1;
		int mips_config_wbon = 1;
#endif

		conf = read_c0_conf();
		conf &= ~(TX39_CONF_ICE | TX39_CONF_DCE | TX39_CONF_WBON | TX39_CONF_CWFON);
		conf |= mips_ic_disable ? 0 : TX39_CONF_ICE;
		conf |= mips_dc_disable ? 0 : TX39_CONF_DCE;
		conf |= mips_config_wbon ? TX39_CONF_WBON : 0;
		conf |= mips_config_cwfon ? TX39_CONF_CWFON : 0;

		write_c0_conf(conf);
		write_c0_cache(0);
	}
#endif

	/* initialize board */
	jmr3927_board_init();

	argptr = prom_getcmdline();

	if ((argptr = strstr(argptr, "toeon")) != NULL) {
			jmr3927_ccfg_toeon = 1;
	}
	argptr = prom_getcmdline();
	if ((argptr = strstr(argptr, "ip=")) == NULL) {
		argptr = prom_getcmdline();
		strcat(argptr, " ip=bootp");
	}

#ifdef CONFIG_SERIAL_TXX9
	{
		extern int early_serial_txx9_setup(struct uart_port *port);
		int i;
		struct uart_port req;
		for(i = 0; i < 2; i++) {
			memset(&req, 0, sizeof(req));
			req.line = i;
			req.iotype = UPIO_MEM;
			req.membase = (char *)TX3927_SIO_REG(i);
			req.mapbase = TX3927_SIO_REG(i);
			req.irq = i == 0 ?
				JMR3927_IRQ_IRC_SIO0 : JMR3927_IRQ_IRC_SIO1;
			if (i == 0)
				req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
			req.uartclk = JMR3927_IMCLK;
			early_serial_txx9_setup(&req);
		}
	}
#ifdef CONFIG_SERIAL_TXX9_CONSOLE
	argptr = prom_getcmdline();
	if ((argptr = strstr(argptr, "console=")) == NULL) {
		argptr = prom_getcmdline();
		strcat(argptr, " console=ttyS1,115200");
	}
#endif
#endif
}
Exemplo n.º 17
0
void __init board_setup(void)
{
	char *argptr;

	argptr = prom_getcmdline();
#ifdef CONFIG_SERIAL_8250_CONSOLE
	argptr = strstr(argptr, "console=");
	if (argptr == NULL) {
		argptr = prom_getcmdline();
		strcat(argptr, " console=ttyS0,115200");
	}
#endif
#ifdef CONFIG_FB_AU1200
	strcat(argptr, " video=au1200fb:panel:bs");
#endif

#if 0
	{
		u32 pin_func;

		/*
		 * Enable PSC1 SYNC for AC97.  Normaly done in audio driver,
		 * but it is board specific code, so put it here.
		 */
		pin_func = au_readl(SYS_PINFUNC);
		au_sync();
		pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
		au_writel(pin_func, SYS_PINFUNC);

		au_writel(0, (u32)bcsr | 0x10); /* turn off PCMCIA power */
		au_sync();
	}
#endif

#if defined(CONFIG_I2C_AU1550)
	{
		u32 freq0, clksrc;
		u32 pin_func;

		/* Select SMBus in CPLD */
		bcsr->resets &= ~BCSR_RESETS_PCS0MUX;

		pin_func = au_readl(SYS_PINFUNC);
		au_sync();
		pin_func &= ~(SYS_PINFUNC_P0A | SYS_PINFUNC_P0B);
		/* Set GPIOs correctly */
		pin_func |= 2 << 17;
		au_writel(pin_func, SYS_PINFUNC);
		au_sync();

		/* The I2C driver depends on 50 MHz clock */
		freq0 = au_readl(SYS_FREQCTRL0);
		au_sync();
		freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
		freq0 |= 3 << SYS_FC_FRDIV1_BIT;
		/* 396 MHz / (3 + 1) * 2 == 49.5 MHz */
		au_writel(freq0, SYS_FREQCTRL0);
		au_sync();
		freq0 |= SYS_FC_FE1;
		au_writel(freq0, SYS_FREQCTRL0);
		au_sync();

		clksrc = au_readl(SYS_CLKSRC);
		au_sync();
		clksrc &= ~(SYS_CS_CE0 | SYS_CS_DE0 | SYS_CS_ME0_MASK);
		/* Bit 22 is EXTCLK0 for PSC0 */
		clksrc |= SYS_CS_MUX_FQ1 << SYS_CS_ME0_BIT;
		au_writel(clksrc, SYS_CLKSRC);
		au_sync();
	}
#endif

	/*
	 * The Pb1200 development board uses external MUX for PSC0 to
	 * support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI
	 */
#ifdef CONFIG_I2C_AU1550
	bcsr->resets &= ~BCSR_RESETS_PCS0MUX;
#endif
	au_sync();

#ifdef CONFIG_MIPS_PB1200
	printk(KERN_INFO "AMD Alchemy Pb1200 Board\n");
#endif
#ifdef CONFIG_MIPS_DB1200
	printk(KERN_INFO "AMD Alchemy Db1200 Board\n");
#endif
}
Exemplo n.º 18
0
static int __init
au1000_probe1(struct net_device *dev, long ioaddr, int irq, int port_num)
{
	static unsigned version_printed = 0;
	struct au1000_private *aup = NULL;
	int i, retval = 0;
	db_dest_t *pDB, *pDBfree;
	char *pmac, *argptr;
	char ethaddr[6];

	if (!request_region(ioaddr, MAC_IOSIZE, "Au1000 ENET")) {
		 return -ENODEV;
	}

	if (version_printed++ == 0) printk(version);

	if (!dev) {
		dev = init_etherdev(0, sizeof(struct au1000_private));
	}
	if (!dev) {
		 printk (KERN_ERR "au1000 eth: init_etherdev failed\n");  
		 return -ENODEV;
	}

	printk("%s: Au1xxx ethernet found at 0x%lx, irq %d\n", 
			dev->name, ioaddr, irq);

	/* Initialize our private structure */
	if (dev->priv == NULL) {
		aup = (struct au1000_private *) 
			kmalloc(sizeof(*aup), GFP_KERNEL);
		if (aup == NULL) {
			retval = -ENOMEM;
			goto free_region;
		}
		dev->priv = aup;
	}

	aup = dev->priv;
	memset(aup, 0, sizeof(*aup));


	/* Allocate the data buffers */
	aup->vaddr = (u32)dma_alloc(MAX_BUF_SIZE * 
			(NUM_TX_BUFFS+NUM_RX_BUFFS), &aup->dma_addr);
	if (!aup->vaddr) {
		retval = -ENOMEM;
		goto free_region;
	}

	/* aup->mac is the base address of the MAC's registers */
	aup->mac = (volatile mac_reg_t *)((unsigned long)ioaddr);
	/* Setup some variables for quick register address access */
	switch (ioaddr) {
	case AU1000_ETH0_BASE:
	case AU1500_ETH0_BASE:
		/* check env variables first */
		if (!get_ethernet_addr(ethaddr)) { 
			memcpy(au1000_mac_addr, ethaddr, sizeof(dev->dev_addr));
		} else {
			/* Check command line */
			argptr = prom_getcmdline();
			if ((pmac = strstr(argptr, "ethaddr=")) == NULL) {
				printk(KERN_INFO "%s: No mac address found\n", 
						dev->name);
				/* use the hard coded mac addresses */
			} else {
				str2eaddr(ethaddr, pmac + strlen("ethaddr="));
				memcpy(au1000_mac_addr, ethaddr, 
						sizeof(dev->dev_addr));
			}
		}
		if (ioaddr == AU1000_ETH0_BASE)
			aup->enable = (volatile u32 *) 
				((unsigned long)AU1000_MAC0_ENABLE);
		else
			aup->enable = (volatile u32 *) 
				((unsigned long)AU1500_MAC0_ENABLE);
		memcpy(dev->dev_addr, au1000_mac_addr, sizeof(dev->dev_addr));
		setup_hw_rings(aup, MAC0_RX_DMA_ADDR, MAC0_TX_DMA_ADDR);
			break;
	case AU1000_ETH1_BASE:
	case AU1500_ETH1_BASE:
		if (ioaddr == AU1000_ETH1_BASE)
			aup->enable = (volatile u32 *) 
				((unsigned long)AU1000_MAC1_ENABLE);
		else
			aup->enable = (volatile u32 *) 
				((unsigned long)AU1500_MAC1_ENABLE);
		memcpy(dev->dev_addr, au1000_mac_addr, sizeof(dev->dev_addr));
		dev->dev_addr[4] += 0x10;
		setup_hw_rings(aup, MAC1_RX_DMA_ADDR, MAC1_TX_DMA_ADDR);
			break;
	default:
		printk(KERN_ERR "%s: bad ioaddr\n", dev->name);
		break;

	}

	aup->phy_addr = PHY_ADDRESS;

	/* bring the device out of reset, otherwise probing the mii
	 * will hang */
	*aup->enable = MAC_EN_CLOCK_ENABLE;
	au_sync_delay(2);
	*aup->enable = MAC_EN_RESET0 | MAC_EN_RESET1 | 
		MAC_EN_RESET2 | MAC_EN_CLOCK_ENABLE;
	au_sync_delay(2);

	if (mii_probe(dev) != 0) {
		 goto free_region;
	}

	pDBfree = NULL;
	/* setup the data buffer descriptors and attach a buffer to each one */
	pDB = aup->db;
	for (i=0; i<(NUM_TX_BUFFS+NUM_RX_BUFFS); i++) {
		pDB->pnext = pDBfree;
		pDBfree = pDB;
		pDB->vaddr = (u32 *)((unsigned)aup->vaddr + MAX_BUF_SIZE*i);
		pDB->dma_addr = (dma_addr_t)virt_to_bus(pDB->vaddr);
		pDB++;
	}
	aup->pDBfree = pDBfree;

	for (i=0; i<NUM_RX_DMA; i++) {
		pDB = GetFreeDB(aup);
		if (!pDB) goto free_region;
		aup->rx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
		aup->rx_db_inuse[i] = pDB;
	}
	for (i=0; i<NUM_TX_DMA; i++) {
		pDB = GetFreeDB(aup);
		if (!pDB) goto free_region;
		aup->tx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
		aup->tx_dma_ring[i]->len = 0;
		aup->tx_db_inuse[i] = pDB;
	}

	spin_lock_init(&aup->lock);
	dev->base_addr = ioaddr;
	dev->irq = irq;
	dev->open = au1000_open;
	dev->hard_start_xmit = au1000_tx;
	dev->stop = au1000_close;
	dev->get_stats = au1000_get_stats;
	dev->set_multicast_list = &set_rx_mode;
	dev->do_ioctl = &au1000_ioctl;
	dev->set_config = &au1000_set_config;
	dev->tx_timeout = au1000_tx_timeout;
	dev->watchdog_timeo = ETH_TX_TIMEOUT;


	/* Fill in the fields of the device structure with ethernet values. */
	ether_setup(dev);

	/* 
	 * The boot code uses the ethernet controller, so reset it to start 
	 * fresh.  au1000_init() expects that the device is in reset state.
	 */
	reset_mac(dev);
	return 0;

free_region:
	release_region(ioaddr, MAC_IOSIZE);
	unregister_netdev(dev);
	if (aup->vaddr) 
		dma_free((void *)aup->vaddr, 
				MAX_BUF_SIZE * (NUM_TX_BUFFS+NUM_RX_BUFFS));
	if (dev->priv != NULL)
		kfree(dev->priv);
	printk(KERN_ERR "%s: au1000_probe1 failed.  Returns %d\n",
	       dev->name, retval);
	kfree(dev);
	return retval;
}
Exemplo n.º 19
0
void __init rt2880_setup(void)
{
#ifdef CONFIG_KGDB
	int rs_putDebugChar(char);
	char rs_getDebugChar(void);
	int saa9730_putDebugChar(char);
	char saa9730_getDebugChar(void);
	extern int (*generic_putDebugChar)(char);
	extern char (*generic_getDebugChar)(void);
#endif
	char *argptr;

	iomem_resource.start = 0;
	iomem_resource.end= ~0;
	ioport_resource.start= 0;
	ioport_resource.end = ~0;
#ifdef CONFIG_SERIAL_CONSOLE
	argptr = prom_getcmdline();
	if ((argptr = strstr(argptr, "console=ttyS")) == NULL) {
		int i = 0;
		char *s =(char *) prom_getenv("modetty0");
		while(s[i] >= '0' && s[i] <= '9')
			i++;
#ifdef CONFIG_RALINK_MT7620
		strcpy(serial_console, "ttyS0,");
#else
		strcpy(serial_console, "ttyS1,");
#endif
		strncpy(serial_console + 6, s, i);
		printk("Config serial console: %s\n", serial_console);
		console_setup(serial_console, NULL);
	}
#endif

#ifdef CONFIG_KGDB
	argptr = prom_getcmdline();
	if ((argptr = strstr(argptr, "kgdb=ttyS")) != NULL) {
		int line;
		argptr += strlen("kgdb=ttyS");
		if (*argptr != '0' && *argptr != '1')
			printk("KGDB: Uknown serial line /dev/ttyS%c, "
			       "falling back to /dev/ttyS1\n", *argptr);
		line = *argptr == '0' ? 0 : 1;
		printk("KGDB: Using serial line /dev/ttyS%d for session\n",
		       line ? 1 : 0);

		if(line == 0) {
			rs_kgdb_hook(line);
			generic_putDebugChar = rs_putDebugChar;
			generic_getDebugChar = rs_getDebugChar;
		} else {
			saa9730_kgdb_hook();
			generic_putDebugChar = saa9730_putDebugChar;
			generic_getDebugChar = saa9730_getDebugChar;
		}

		printk("KGDB: Using serial line /dev/ttyS%d for session, "
			    "please connect your debugger\n", line ? 1 : 0);

		remote_debug = 1;
		/* Breakpoints and stuff are in surfboard_irq_setup() */
	}
#endif
	argptr = prom_getcmdline();

	if ((argptr = strstr(argptr, "nofpu")) != NULL)
		cpu_data[0].options &= ~MIPS_CPU_FPU;

	board_time_init = mips_time_init;
	mips_reboot_setup();
}
Exemplo n.º 20
0
void __init board_setup(void)
{
	char *argptr = NULL;
	u32 pin_func;

#if 0
	/* Enable PSC1 SYNC for AC97.  Normaly done in audio driver,
	 * but it is board specific code, so put it here.
	 */
	pin_func = au_readl(SYS_PINFUNC);
	au_sync();
	pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
	au_writel(pin_func, SYS_PINFUNC);

	au_writel(0, (u32)bcsr|0x10); /* turn off pcmcia power */
	au_sync();
#endif

#if defined(CONFIG_I2C_AU1550)
	{
	u32 freq0, clksrc;

	/* Select SMBUS in CPLD */
	bcsr->resets &= ~(BCSR_RESETS_PCS0MUX);

	pin_func = au_readl(SYS_PINFUNC);
	au_sync();
	pin_func &= ~(3<<17 | 1<<4);
	/* Set GPIOs correctly */
	pin_func |= 2<<17;
	au_writel(pin_func, SYS_PINFUNC);
	au_sync();

	/* The i2c driver depends on 50Mhz clock */
	freq0 = au_readl(SYS_FREQCTRL0);
	au_sync();
	freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
	freq0 |= (3<<SYS_FC_FRDIV1_BIT);
	/* 396Mhz / (3+1)*2 == 49.5Mhz */
	au_writel(freq0, SYS_FREQCTRL0);
	au_sync();
	freq0 |= SYS_FC_FE1;
	au_writel(freq0, SYS_FREQCTRL0);
	au_sync();

	clksrc = au_readl(SYS_CLKSRC);
	au_sync();
	clksrc &= ~0x01f00000;
	/* bit 22 is EXTCLK0 for PSC0 */
	clksrc |= (0x3 << 22);
	au_writel(clksrc, SYS_CLKSRC);
	au_sync();
	}
#endif

#ifdef CONFIG_FB_AU1200
	argptr = prom_getcmdline();
#ifdef CONFIG_MIPS_PB1200
	strcat(argptr, " video=au1200fb:panel:bs");
#endif
#ifdef CONFIG_MIPS_DB1200
	strcat(argptr, " video=au1200fb:panel:bs");
#endif
#endif

	/* The Pb1200 development board uses external MUX for PSC0 to
	support SMB/SPI. bcsr->resets bit 12: 0=SMB 1=SPI
	*/
#if defined(CONFIG_AU1XXX_PSC_SPI) && defined(CONFIG_I2C_AU1550)
	#error I2C and SPI are mutually exclusive. Both are physically connected to PSC0.\
			Refer to Pb1200/Db1200 documentation.
#elif defined( CONFIG_AU1XXX_PSC_SPI )
	bcsr->resets |= BCSR_RESETS_PCS0MUX;
	/*Hard Coding Value to enable Temp Sensors [bit 14] Value for SOC Au1200. Pls refer documentation*/
	  bcsr->resets =0x900f;
#elif defined( CONFIG_I2C_AU1550 )
	bcsr->resets &= (~BCSR_RESETS_PCS0MUX);
#endif
	au_sync();

#ifdef CONFIG_MIPS_PB1200
	printk("AMD Alchemy Pb1200 Board\n");
#endif
#ifdef CONFIG_MIPS_DB1200
	printk("AMD Alchemy Db1200 Board\n");
#endif

	/* Setup Pb1200 External Interrupt Controller */
	board_init_irq = _board_init_irq;
}
Exemplo n.º 21
0
static int __init ip22_setup(void)
{
	char *ctype;
#ifdef CONFIG_KGDB
	char *kgdb_ttyd;
#endif

	board_be_init = ip22_be_init;
	ip22_time_init();

	/* Init the INDY HPC I/O controller.  Need to call this before
	 * f*****g with the memory controller because it needs to know the
	 * boardID and whether this is a Guiness or a FullHouse machine.
	 */
	sgihpc_init();

	/* Init INDY memory controller. */
	sgimc_init();

#ifdef CONFIG_BOARD_SCACHE
	/* Now enable boardcaches, if any. */
	indy_sc_init();
#endif

	/* Set EISA IO port base for Indigo2 */
	set_io_port_base(KSEG1ADDR(0x00080000));

	/* ARCS console environment variable is set to "g?" for
	 * graphics console, it is set to "d" for the first serial
	 * line and "d2" for the second serial line.
	 */
	ctype = ArcGetEnvironmentVariable("console");
	if (ctype && *ctype == 'd') {
		static char options[8];
		char *baud = ArcGetEnvironmentVariable("dbaud");
		if (baud)
			strcpy(options, baud);
		add_preferred_console("ttyS", *(ctype + 1) == '2' ? 1 : 0,
				      baud ? options : NULL);
	} else if (!ctype || *ctype != 'g') {
		/* Use ARC if we don't want serial ('d') or Newport ('g'). */
		prom_flags |= PROM_FLAG_USE_AS_CONSOLE;
		add_preferred_console("arc", 0, NULL);
	}

#ifdef CONFIG_KGDB
	kgdb_ttyd = prom_getcmdline();
	if ((kgdb_ttyd = strstr(kgdb_ttyd, "kgdb=ttyd")) != NULL) {
		int line;
		kgdb_ttyd += strlen("kgdb=ttyd");
		if (*kgdb_ttyd != '1' && *kgdb_ttyd != '2')
			printk(KERN_INFO "KGDB: Uknown serial line /dev/ttyd%c"
			       ", falling back to /dev/ttyd1\n", *kgdb_ttyd);
		line = *kgdb_ttyd == '2' ? 0 : 1;
		printk(KERN_INFO "KGDB: Using serial line /dev/ttyd%d for "
		       "session\n", line ? 1 : 2);
		rs_kgdb_hook(line);

		printk(KERN_INFO "KGDB: Using serial line /dev/ttyd%d for "
		       "session, please connect your debugger\n", line ? 1:2);

		remote_debug = 1;
		/* Breakpoints and stuff are in sgi_irq_setup() */
	}
#endif

#ifdef CONFIG_VT
#ifdef CONFIG_SGI_NEWPORT_CONSOLE
	if (ctype && *ctype == 'g'){
		ULONG *gfxinfo;
		ULONG * (*__vec)(void) = (void *) (long)
			*((_PULONG *)(long)((PROMBLOCK)->pvector + 0x20));

		gfxinfo = __vec();
		sgi_gfxaddr = ((gfxinfo[1] >= 0xa0000000
			       && gfxinfo[1] <= 0xc0000000)
			       ? gfxinfo[1] - 0xa0000000 : 0);

		/* newport addresses? */
		if (sgi_gfxaddr == 0x1f0f0000 || sgi_gfxaddr == 0x1f4f0000) {
			conswitchp = &newport_con;
		}
	}
#endif
#endif

	return 0;
}
Exemplo n.º 22
0
void __init board_setup(void)
{
	u32 pin_func = 0;
	char *argptr;

	argptr = prom_getcmdline();
#ifdef CONFIG_SERIAL_8250_CONSOLE
	argptr = strstr(argptr, "console=");
	if (argptr == NULL) {
		argptr = prom_getcmdline();
		strcat(argptr, " console=ttyS0,115200");
	}
#endif

#ifdef CONFIG_FB_AU1100
	argptr = strstr(argptr, "video=");
	if (argptr == NULL) {
		argptr = prom_getcmdline();
		/* default panel */
		/*strcat(argptr, " video=au1100fb:panel:Sharp_320x240_16");*/
	}
#endif

#if defined(CONFIG_SOUND_AU1X00) && !defined(CONFIG_SOC_AU1000)
	/* au1000 does not support vra, au1500 and au1100 do */
	strcat(argptr, " au1000_audio=vra");
	argptr = prom_getcmdline();
#endif

	/* Not valid for Au1550 */
#if defined(CONFIG_IRDA) && \
   (defined(CONFIG_SOC_AU1000) || defined(CONFIG_SOC_AU1100))
	/* Set IRFIRSEL instead of GPIO15 */
	pin_func = au_readl(SYS_PINFUNC) | SYS_PF_IRF;
	au_writel(pin_func, SYS_PINFUNC);
	/* Power off until the driver is in use */
	bcsr->resets &= ~BCSR_RESETS_IRDA_MODE_MASK;
	bcsr->resets |=  BCSR_RESETS_IRDA_MODE_OFF;
	au_sync();
#endif
	bcsr->pcmcia = 0x0000; /* turn off PCMCIA power */

#ifdef CONFIG_MIPS_MIRAGE
	/* Enable GPIO[31:0] inputs */
	au_writel(0, SYS_PININPUTEN);

	/* GPIO[20] is output, tristate the other input primary GPIOs */
	au_writel(~(1 << 20), SYS_TRIOUTCLR);

	/* Set GPIO[210:208] instead of SSI_0 */
	pin_func = au_readl(SYS_PINFUNC) | SYS_PF_S0;

	/* Set GPIO[215:211] for LEDs */
	pin_func |= 5 << 2;

	/* Set GPIO[214:213] for more LEDs */
	pin_func |= 5 << 12;

	/* Set GPIO[207:200] instead of PCMCIA/LCD */
	pin_func |= SYS_PF_LCD | SYS_PF_PC;
	au_writel(pin_func, SYS_PINFUNC);

	/*
	 * Enable speaker amplifier.  This should
	 * be part of the audio driver.
	 */
	au_writel(au_readl(GPIO2_DIR) | 0x200, GPIO2_DIR);
	au_writel(0x02000200, GPIO2_OUTPUT);
#endif

	au_sync();

#ifdef CONFIG_MIPS_DB1000
	printk(KERN_INFO "AMD Alchemy Au1000/Db1000 Board\n");
#endif
#ifdef CONFIG_MIPS_DB1500
	printk(KERN_INFO "AMD Alchemy Au1500/Db1500 Board\n");
#endif
#ifdef CONFIG_MIPS_DB1100
	printk(KERN_INFO "AMD Alchemy Au1100/Db1100 Board\n");
#endif
#ifdef CONFIG_MIPS_BOSPORUS
	printk(KERN_INFO "AMD Alchemy Bosporus Board\n");
#endif
#ifdef CONFIG_MIPS_MIRAGE
	printk(KERN_INFO "AMD Alchemy Mirage Board\n");
#endif
#ifdef CONFIG_MIPS_DB1550
	printk(KERN_INFO "AMD Alchemy Au1550/Db1550 Board\n");
#endif
}
Exemplo n.º 23
0
void __init board_setup(void)
{
	u32 pin_func, static_cfg0;
	u32 sys_freqctrl, sys_clksrc;
	u32 prid = read_c0_prid();

#ifdef CONFIG_SERIAL_8250_CONSOLE
	char *argptr = prom_getcmdline();
	argptr = strstr(argptr, "console=");
	if (argptr == NULL) {
		argptr = prom_getcmdline();
		strcat(argptr, " console=ttyS0,115200");
	}
#endif

	/* Set AUX clock to 12 MHz * 8 = 96 MHz */
	au_writel(8, SYS_AUXPLL);
	au_writel(0, SYS_PINSTATERD);
	udelay(100);

#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
	/* Zero and disable FREQ2 */
	sys_freqctrl = au_readl(SYS_FREQCTRL0);
	sys_freqctrl &= ~0xFFF00000;
	au_writel(sys_freqctrl, SYS_FREQCTRL0);

	/* Zero and disable USBH/USBD clocks */
	sys_clksrc = au_readl(SYS_CLKSRC);
	sys_clksrc &= ~(SYS_CS_CUD | SYS_CS_DUD | SYS_CS_MUD_MASK |
		        SYS_CS_CUH | SYS_CS_DUH | SYS_CS_MUH_MASK);
	au_writel(sys_clksrc, SYS_CLKSRC);

	sys_freqctrl = au_readl(SYS_FREQCTRL0);
	sys_freqctrl &= ~0xFFF00000;

	sys_clksrc = au_readl(SYS_CLKSRC);
	sys_clksrc &= ~(SYS_CS_CUD | SYS_CS_DUD | SYS_CS_MUD_MASK |
		        SYS_CS_CUH | SYS_CS_DUH | SYS_CS_MUH_MASK);

	switch (prid & 0x000000FF) {
	case 0x00: /* DA */
	case 0x01: /* HA */
	case 0x02: /* HB */
		/* CPU core freq to 48 MHz to slow it way down... */
		au_writel(4, SYS_CPUPLL);

		/*
		 * Setup 48 MHz FREQ2 from CPUPLL for USB Host
		 * FRDIV2 = 3 -> div by 8 of 384 MHz -> 48 MHz
		 */
		sys_freqctrl |= (3 << SYS_FC_FRDIV2_BIT) | SYS_FC_FE2;
		au_writel(sys_freqctrl, SYS_FREQCTRL0);

		/* CPU core freq to 384 MHz */
		au_writel(0x20, SYS_CPUPLL);

		printk(KERN_INFO "Au1000: 48 MHz OHCI workaround enabled\n");
		break;

	default: /* HC and newer */
		/* FREQ2 = aux / 2 = 48 MHz */
		sys_freqctrl |= (0 << SYS_FC_FRDIV2_BIT) |
				 SYS_FC_FE2 | SYS_FC_FS2;
		au_writel(sys_freqctrl, SYS_FREQCTRL0);
		break;
	}

	/*
	 * Route 48 MHz FREQ2 into USB Host and/or Device
	 */
	sys_clksrc |= SYS_CS_MUX_FQ2 << SYS_CS_MUH_BIT;
	au_writel(sys_clksrc, SYS_CLKSRC);

	/* Configure pins GPIO[14:9] as GPIO */
	pin_func = au_readl(SYS_PINFUNC) & ~(SYS_PF_UR3 | SYS_PF_USB);

	/* 2nd USB port is USB host */
	pin_func |= SYS_PF_USB;

	au_writel(pin_func, SYS_PINFUNC);
	au_writel(0x2800, SYS_TRIOUTCLR);
	au_writel(0x0030, SYS_OUTPUTCLR);
#endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */

	/* Make GPIO 15 an input (for interrupt line) */
	pin_func = au_readl(SYS_PINFUNC) & ~SYS_PF_IRF;
	/* We don't need I2S, so make it available for GPIO[31:29] */
	pin_func |= SYS_PF_I2S;
	au_writel(pin_func, SYS_PINFUNC);

	au_writel(0x8000, SYS_TRIOUTCLR);

	static_cfg0 = au_readl(MEM_STCFG0) & ~0xc00;
	au_writel(static_cfg0, MEM_STCFG0);

	/* configure RCE2* for LCD */
	au_writel(0x00000004, MEM_STCFG2);

	/* MEM_STTIME2 */
	au_writel(0x09000000, MEM_STTIME2);

	/* Set 32-bit base address decoding for RCE2* */
	au_writel(0x10003ff0, MEM_STADDR2);

	/*
	 * PCI CPLD setup
	 * Expand CE0 to cover PCI
	 */
	au_writel(0x11803e40, MEM_STADDR1);

	/* Burst visibility on */
	au_writel(au_readl(MEM_STCFG0) | 0x1000, MEM_STCFG0);

	au_writel(0x83, MEM_STCFG1);	     /* ewait enabled, flash timing */
	au_writel(0x33030a10, MEM_STTIME1);  /* slower timing for FPGA */

	/* Setup the static bus controller */
	au_writel(0x00000002, MEM_STCFG3);  /* type = PCMCIA */
	au_writel(0x280E3D07, MEM_STTIME3); /* 250ns cycle time */
	au_writel(0x10000000, MEM_STADDR3); /* any PCMCIA select */

	/*
	 * Enable Au1000 BCLK switching - note: sed1356 must not use
	 * its BCLK (Au1000 LCLK) for any timings
	 */
	switch (prid & 0x000000FF) {
	case 0x00: /* DA */
	case 0x01: /* HA */
	case 0x02: /* HB */
		break;
	default:  /* HC and newer */
		/*
		 * Enable sys bus clock divider when IDLE state or no bus
		 * activity.
		 */
		au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL);
		break;
	}
}
Exemplo n.º 24
0
__initfunc(void sgi_setup(void))
{
#ifdef CONFIG_SERIAL_CONSOLE
	char *ctype;
#endif
#ifdef CONFIG_REMOTE_DEBUG
	char *kgdb_ttyd;
#endif


	irq_setup = sgi_irq_setup;

	/* Init the INDY HPC I/O controller.  Need to call this before
	 * f*****g with the memory controller because it needs to know the
	 * boardID and whether this is a Guiness or a FullHouse machine.
	 */
	sgihpc_init();

	/* Init INDY memory controller. */
	sgimc_init();

	/* Now enable boardcaches, if any. */
	indy_sc_init();

#ifdef CONFIG_SERIAL_CONSOLE
	/* ARCS console environment variable is set to "g?" for
	 * graphics console, it is set to "d" for the first serial
	 * line and "d2" for the second serial line.
	 */
	ctype = prom_getenv("console");
	if(*ctype == 'd') {
		if(*(ctype+1)=='2')
			console_setup ("ttyS1", NULL);
		else
			console_setup ("ttyS0", NULL);
	}
#endif

#ifdef CONFIG_REMOTE_DEBUG
	kgdb_ttyd = prom_getcmdline();
	if ((kgdb_ttyd = strstr(kgdb_ttyd, "kgdb=ttyd")) != NULL) {
		int line;
		kgdb_ttyd += strlen("kgdb=ttyd");
		if (*kgdb_ttyd != '1' && *kgdb_ttyd != '2')
			printk("KGDB: Uknown serial line /dev/ttyd%c, "
			       "falling back to /dev/ttyd1\n", *kgdb_ttyd);
		line = *kgdb_ttyd == '2' ? 0 : 1;
		printk("KGDB: Using serial line /dev/ttyd%d for session\n",
		       line ? 1 : 2);
		rs_kgdb_hook(line);

		prom_printf("KGDB: Using serial line /dev/ttyd%d for session, "
			    "please connect your debugger\n", line ? 1 : 2);

		remote_debug = 1;
		/* Breakpoints and stuff are in sgi_irq_setup() */
	}
#endif

#ifdef CONFIG_SGI_PROM_CONSOLE
	console_setup("ttyS0", NULL);
#endif
	  
	sgi_volume_set(simple_strtoul(prom_getenv("volume"), NULL, 10));

#ifdef CONFIG_VT
#ifdef CONFIG_SGI_NEWPORT_CONSOLE
	conswitchp = &newport_con;
#else
	conswitchp = &dummy_con;
#endif
#endif

	rtc_ops = &indy_rtc_ops;
	kbd_ops = &sgi_kbd_ops;
#ifdef CONFIG_PSMOUSE
	aux_device_present = 0xaa;
#endif
#ifdef CONFIG_VIDEO_VINO
	init_vino();
#endif
}
Exemplo n.º 25
0
static struct net_device *
au1000_probe(u32 ioaddr, int irq, int port_num)
{
	static unsigned version_printed = 0;
	struct au1000_private *aup = NULL;
	struct net_device *dev = NULL;
	db_dest_t *pDB, *pDBfree;
	char *pmac, *argptr;
	char ethaddr[6];
	int i, err;

	if (!request_region(ioaddr, MAC_IOSIZE, "Au1x00 ENET"))
		return NULL;

	if (version_printed++ == 0) 
		printk(version);

	dev = alloc_etherdev(sizeof(struct au1000_private));
	if (!dev) {
		printk (KERN_ERR "au1000 eth: alloc_etherdev failed\n");  
		return NULL;
	}

	if ((err = register_netdev(dev))) {
		printk(KERN_ERR "Au1x_eth Cannot register net device err %d\n",
				err);
		kfree(dev);
		return NULL;
	}

	printk("%s: Au1x Ethernet found at 0x%x, irq %d\n", 
			dev->name, ioaddr, irq);

	aup = dev->priv;

	/* Allocate the data buffers */
	aup->vaddr = (u32)dma_alloc(MAX_BUF_SIZE * 
			(NUM_TX_BUFFS+NUM_RX_BUFFS), &aup->dma_addr);
	if (!aup->vaddr) {
		kfree(dev);
		release_region(ioaddr, MAC_IOSIZE);
		return NULL;
	}

	/* aup->mac is the base address of the MAC's registers */
	aup->mac = (volatile mac_reg_t *)((unsigned long)ioaddr);
	/* Setup some variables for quick register address access */
	if (ioaddr == iflist[0].base_addr)
	{
		/* check env variables first */
		if (!get_ethernet_addr(ethaddr)) { 
			memcpy(au1000_mac_addr, ethaddr, sizeof(dev->dev_addr));
		} else {
			/* Check command line */
			argptr = prom_getcmdline();
			if ((pmac = strstr(argptr, "ethaddr=")) == NULL) {
				printk(KERN_INFO "%s: No mac address found\n", 
						dev->name);
				/* use the hard coded mac addresses */
			} else {
				str2eaddr(ethaddr, pmac + strlen("ethaddr="));
				memcpy(au1000_mac_addr, ethaddr, 
						sizeof(dev->dev_addr));
			}
		}
			aup->enable = (volatile u32 *) 
				((unsigned long)iflist[0].macen_addr);
		memcpy(dev->dev_addr, au1000_mac_addr, sizeof(dev->dev_addr));
		setup_hw_rings(aup, MAC0_RX_DMA_ADDR, MAC0_TX_DMA_ADDR);
		aup->mac_id = 0;
		au_macs[0] = aup;
	}
		else
	if (ioaddr == iflist[1].base_addr)
	{
			aup->enable = (volatile u32 *) 
				((unsigned long)iflist[1].macen_addr);
		memcpy(dev->dev_addr, au1000_mac_addr, sizeof(dev->dev_addr));
		dev->dev_addr[4] += 0x10;
		setup_hw_rings(aup, MAC1_RX_DMA_ADDR, MAC1_TX_DMA_ADDR);
		aup->mac_id = 1;
		au_macs[1] = aup;
	}
	else
	{
		printk(KERN_ERR "%s: bad ioaddr\n", dev->name);
	}

	/* bring the device out of reset, otherwise probing the mii
	 * will hang */
	*aup->enable = MAC_EN_CLOCK_ENABLE;
	au_sync_delay(2);
	*aup->enable = MAC_EN_RESET0 | MAC_EN_RESET1 | 
		MAC_EN_RESET2 | MAC_EN_CLOCK_ENABLE;
	au_sync_delay(2);

	aup->mii = kmalloc(sizeof(struct mii_phy), GFP_KERNEL);
	if (!aup->mii) {
		printk(KERN_ERR "%s: out of memory\n", dev->name);
		goto err_out;
	}
	aup->mii->mii_control_reg = 0;
	aup->mii->mii_data_reg = 0;

	if (mii_probe(dev) != 0) {
		goto err_out;
	}

	pDBfree = NULL;
	/* setup the data buffer descriptors and attach a buffer to each one */
	pDB = aup->db;
	for (i = 0; i < (NUM_TX_BUFFS+NUM_RX_BUFFS); i++) {
		pDB->pnext = pDBfree;
		pDBfree = pDB;
		pDB->vaddr = (u32 *)((unsigned)aup->vaddr + MAX_BUF_SIZE*i);
		pDB->dma_addr = (dma_addr_t)virt_to_bus(pDB->vaddr);
		pDB++;
	}
	aup->pDBfree = pDBfree;

	for (i = 0; i < NUM_RX_DMA; i++) {
		pDB = GetFreeDB(aup);
		if (!pDB) {
			goto err_out;
		}
		aup->rx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
		aup->rx_db_inuse[i] = pDB;
	}
	for (i = 0; i < NUM_TX_DMA; i++) {
		pDB = GetFreeDB(aup);
		if (!pDB) {
			goto err_out;
		}
		aup->tx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
		aup->tx_dma_ring[i]->len = 0;
		aup->tx_db_inuse[i] = pDB;
	}

	spin_lock_init(&aup->lock);
	dev->base_addr = ioaddr;
	dev->irq = irq;
	dev->open = au1000_open;
	dev->hard_start_xmit = au1000_tx;
	dev->stop = au1000_close;
	dev->get_stats = au1000_get_stats;
	dev->set_multicast_list = &set_rx_mode;
	dev->do_ioctl = &au1000_ioctl;
	dev->set_config = &au1000_set_config;
	dev->tx_timeout = au1000_tx_timeout;
	dev->watchdog_timeo = ETH_TX_TIMEOUT;

	/* 
	 * The boot code uses the ethernet controller, so reset it to start 
	 * fresh.  au1000_init() expects that the device is in reset state.
	 */
	reset_mac(dev);

	return dev;

err_out:
	/* here we should have a valid dev plus aup-> register addresses
	 * so we can reset the mac properly.*/
	reset_mac(dev);
	if (aup->mii)
		kfree(aup->mii);
	for (i = 0; i < NUM_RX_DMA; i++) {
		if (aup->rx_db_inuse[i])
			ReleaseDB(aup, aup->rx_db_inuse[i]);
	}
	for (i = 0; i < NUM_TX_DMA; i++) {
		if (aup->tx_db_inuse[i])
			ReleaseDB(aup, aup->tx_db_inuse[i]);
	}
	dma_free((void *)aup->vaddr, MAX_BUF_SIZE * 
			(NUM_TX_BUFFS+NUM_RX_BUFFS));
	unregister_netdev(dev);
	kfree(dev);
	release_region(ioaddr, MAC_IOSIZE);
	return NULL;
}
Exemplo n.º 26
0
void __init jmr3927_setup(void)
{
	extern int panic_timeout;
	char *argptr;

	irq_setup = jmr3927_irq_setup;
	mips_io_port_base = JMR3927_PORT_BASE + JMR3927_PCIIO;

	board_time_init = jmr3927_time_init;
	board_timer_setup = jmr3927_timer_setup;

	_machine_restart = jmr3927_machine_restart;
	_machine_halt = jmr3927_machine_halt;
	_machine_power_off = jmr3927_machine_power_off;

	/*
	 * IO/MEM resources. 
	 */
	ioport_resource.start = pci_io_resource.start;
	ioport_resource.end = pci_io_resource.end;
	iomem_resource.start = pci_mem_resource.start;
	iomem_resource.end = pci_mem_resource.end;
	
	/* Reboot on panic */
	panic_timeout = 180;

	{
		unsigned int conf;
		conf = read_32bit_cp0_register(CP0_CONF);
	}

#if 1
	/* cache setup */
	{
		unsigned int conf;
#ifdef DO_ENABLE_CACHE
		int mips_ic_disable = 0, mips_dc_disable = 0;
#else
		int mips_ic_disable = 1, mips_dc_disable = 1;
#endif
#ifdef DO_WRITE_THROUGH
		int mips_config_cwfon = 0;
		int mips_config_wbon = 0;
#else
		int mips_config_cwfon = 1;
		int mips_config_wbon = 1;
#endif

		conf = read_32bit_cp0_register(CP0_CONF);
		conf &= ~(TX39_CONF_ICE | TX39_CONF_DCE | TX39_CONF_WBON | TX39_CONF_CWFON);
		conf |= mips_ic_disable ? 0 : TX39_CONF_ICE;
		conf |= mips_dc_disable ? 0 : TX39_CONF_DCE;
		conf |= mips_config_wbon ? TX39_CONF_WBON : 0;
		conf |= mips_config_cwfon ? TX39_CONF_CWFON : 0;

		write_32bit_cp0_register(CP0_CONF, conf);
		write_32bit_cp0_register(CP0_TX39_CACHE, 0);
	}
#endif

	/* initialize board */
	jmr3927_board_init();

	argptr = prom_getcmdline();

	if ((argptr = strstr(argptr, "toeon")) != NULL) {
			jmr3927_ccfg_toeon = 1;
	}
	argptr = prom_getcmdline();
	if ((argptr = strstr(argptr, "ip=")) == NULL) {
		argptr = prom_getcmdline();
		strcat(argptr, " ip=bootp");
	}

#ifdef CONFIG_TXX927_SERIAL_CONSOLE
	argptr = prom_getcmdline();
	if ((argptr = strstr(argptr, "console=")) == NULL) {
		argptr = prom_getcmdline();
		strcat(argptr, " console=ttyS1,115200");
	}
#endif                                             
}
void __init ti_avalanche_setup(void)
{
#ifdef CONFIG_REMOTE_DEBUG
        int rs_putDebugChar(char);
        char rs_getDebugChar(void);
        //      int saa9730_putDebugChar(char);
        //      char saa9730_getDebugChar(void);
        int evm3_putDebugChar(char);
        int evm3_getDebugChar(void);
        extern int (*putDebugChar)(char);
        extern char (*getDebugChar)(void);
#endif
        char *argptr;
        static char *nfs_ptr;
        static char *ip_ptr;

        // JAH_TBD
        //      ioport_resource.end = 0x7fffffff;

#ifdef CONFIG_SERIAL_CONSOLE
        argptr = prom_getcmdline();
        if ((argptr = strstr(argptr, "console=ttyS0")) == NULL) {
                int i = 0;
                char *s = prom_getenv("modetty0");
                while(s[i] >= '0' && s[i] <= '9')
                        i++;
                strcpy(serial_console, "ttyS0,");
                strncpy(serial_console + 6, s, i);
                prom_printf("Config serial console: %s\n", serial_console);
                console_setup(serial_console);
        }
#endif  /* CONFIG_SERIAL_CONSOLE */

#ifdef CONFIG_REMOTE_DEBUG
        argptr = prom_getcmdline();
        if ((argptr = strstr(argptr, "kgdb=ttyS")) != NULL) {
                int line;
                argptr += strlen("kgdb=ttyS");
                if (*argptr != '0' && *argptr != '1')
                        printk("KGDB: Uknown serial line /dev/ttyS%c, "
                               "falling back to /dev/ttyS1\n", *argptr);
                line = *argptr == '0' ? 0 : 1;
                printk("KGDB: Using serial line /dev/ttyS%d for session\n",
                       line ? 1 : 0);

                rs_kgdb_hook(line);
                putDebugChar = rs_putDebugChar;
                getDebugChar = rs_getDebugChar;

                prom_printf("KGDB: Using serial line /dev/ttyS%d for session, "
                            "please connect your debugger\n", line ? 1 : 0);

                remote_debug = 1;
                /* Breakpoints and stuff are in atlas_irq_setup() */
        }
#endif
        argptr = prom_getcmdline();

        if ((argptr = strstr(argptr, "nofpu")) != NULL)
                mips_cpu.options &= ~MIPS_CPU_FPU;


        /*
         * Add nfsroot and IP enviroment variables to the cmdline.
         * these are stored in the ADAM2 enviroment space in the
         * following manner:
         *
         *  for nfsroot:
         *    nfsroot=[<server-ip>:]<root-dir>[,<nfs-options>]
         *
         *
         *  for ipaddress
         *    ip=<client-ip>:<server-ip>:<gw-ip>:<netmask>:<hostname>:<device>:<autoconf>
         *
         *  Note that if the Adam2 enviroment contains nfs set to "yes" the
         *  following code will also add the root=/dev/nfs automatically.
         *
         *    (see Documentation/nfsroot.txt for more information)
         */

        argptr = prom_getcmdline();

        nfs_ptr = prom_getenv("nfs");
        if(nfs_ptr)
          {
            if(!strncmp(nfs_ptr,"yes",3))
              {
                strcat(argptr,"root=/dev/nfs ");
                argptr = prom_getcmdline();
                nfs_ptr = prom_getenv("nfsroot");
                strcat(argptr,nfs_ptr);
                strcat(argptr," ");
              }
          }

        ip_ptr = prom_getenv("linuxip");
        argptr = prom_getcmdline();

        if(ip_ptr)
          {
          strcat(argptr,ip_ptr);
          }

        avalanche_soc_platform_init();

#if defined(CONFIG_MIPS_EVM3)
        rtc_ops = &evm3_rtc_ops;
#else
        rtc_ops = &no_rtc_ops;
#endif /* CONFIG_MIPS_EVM3 */

        mips_reboot_setup();
}
void __init it8172_setup(void)
{
	unsigned short dsr;
	char *argptr;
	u32 it_ver;

	argptr = prom_getcmdline();
#ifdef CONFIG_SERIAL_CONSOLE
	if ((argptr = strstr(argptr, "console=")) == NULL) {
		argptr = prom_getcmdline();
		strcat(argptr, " console=ttyS0,115200");
	}
#endif

	clear_c0_status(ST0_FR);

	board_time_init = it8172_time_init;
	board_timer_setup = it8172_timer_setup;

	_machine_restart = it8172_restart;
	_machine_halt = it8172_halt;
	_machine_power_off = it8172_power_off;

	/*
	* IO/MEM resources.
	*
	* revisit this area.
	*/
	set_io_port_base(KSEG1);
	ioport_resource.start = it8172_resources.pci_io.start;
	ioport_resource.end = it8172_resources.pci_io.end;
#ifdef CONFIG_IT8172_REVC
	iomem_resource.start = it8172_resources.pci_mem.start;
	iomem_resource.end = it8172_resources.pci_mem.end;
#else
	iomem_resource.start = it8172_resources.pci_mem0.start;
	iomem_resource.end = it8172_resources.pci_mem3.end;
#endif

#ifdef CONFIG_BLK_DEV_INITRD
	ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0);
#endif

	/*
	 * Pull enabled devices out of standby
	 */
	IT_IO_READ16(IT_PM_DSR, dsr);
#ifdef CONFIG_SOUND_IT8172
	dsr &= ~IT_PM_DSR_ACSB;
#else
	dsr |= IT_PM_DSR_ACSB;
#endif
#ifdef CONFIG_BLK_DEV_IT8172
	dsr &= ~IT_PM_DSR_IDESB;
	ide_ops = &std_ide_ops;
#else
	dsr |= IT_PM_DSR_IDESB;
#endif
	IT_IO_WRITE16(IT_PM_DSR, dsr);

#ifdef CONFIG_FB
	conswitchp = &dummy_con;
#endif

	InitLPCInterface();

#ifdef CONFIG_MIPS_ITE8172
	if (SearchIT8712()) {
		printk("Found IT8712 Super IO\n");
		// enable IT8712 serial port
		LPCSetConfig(LDN_SERIAL1, 0x30, 0x01); /* enable */
		LPCSetConfig(LDN_SERIAL1, 0x23, 0x01); /* clock selection */
#ifdef CONFIG_PC_KEYB
		if (init_8712_keyboard()) {
			printk("Unable to initialize keyboard\n");
			LPCSetConfig(LDN_KEYBOARD, 0x30, 0x0); /* disable keyboard */
		}
		else {
			LPCSetConfig(LDN_KEYBOARD, 0x30, 0x1); /* enable keyboard */
			LPCSetConfig(LDN_KEYBOARD, 0xf0, 0x2);
			LPCSetConfig(LDN_KEYBOARD, 0x71, 0x3);

			LPCSetConfig(LDN_MOUSE, 0x30, 0x1); /* enable mouse */

			LPCSetConfig(0x4, 0x30, 0x1);
			LPCSetConfig(0x4, 0xf4, LPCGetConfig(0x4, 0xf4) | 0x80);

			if ((LPCGetConfig(LDN_KEYBOARD, 0x30) == 0) ||
					(LPCGetConfig(LDN_MOUSE, 0x30) == 0))
				printk("Error: keyboard or mouse not enabled\n");

			kbd_ops = &std_kbd_ops;
		}
#endif
	}
	else {
		printk("IT8712 Super IO not found\n");
	}
#endif

#ifdef CONFIG_IT8172_CIR
	{
		unsigned long data;
		//printk("Enabling CIR0\n");
		IT_IO_READ16(IT_PM_DSR, data);
		data &= ~IT_PM_DSR_CIR0SB;
		IT_IO_WRITE16(IT_PM_DSR, data);
		//printk("DSR register: %x\n", (unsigned)IT_IO_READ16(IT_PM_DSR, data));
	}
#endif
#ifdef CONFIG_IT8172_SCR0
	{
		unsigned i;
		/* Enable Smart Card Reader 0 */
		/* First power it up */
		IT_IO_READ16(IT_PM_DSR, i);
		i &= ~IT_PM_DSR_SCR0SB;
		IT_IO_WRITE16(IT_PM_DSR, i);
		/* Then initialize its registers */
		outb(( IT_SCR_SFR_GATE_UART_OFF     << IT_SCR_SFR_GATE_UART_BIT
		      |IT_SCR_SFR_FET_CHARGE_213_US << IT_SCR_SFR_FET_CHARGE_BIT
		      |IT_SCR_SFR_CARD_FREQ_3_5_MHZ << IT_SCR_SFR_CARD_FREQ_BIT
		      |IT_SCR_SFR_FET_ACTIVE_INVERT << IT_SCR_SFR_FET_ACTIVE_BIT
		      |IT_SCR_SFR_ENABLE_ON         << IT_SCR_SFR_ENABLE_BIT),
		     IT8172_PCI_IO_BASE + IT_SCR0_BASE + IT_SCR_SFR);
		outb(IT_SCR_SCDR_RESET_MODE_ASYNC << IT_SCR_SCDR_RESET_MODE_BIT,
		     IT8172_PCI_IO_BASE + IT_SCR0_BASE + IT_SCR_SCDR);
	}
#endif /* CONFIG_IT8172_SCR0 */
#ifdef CONFIG_IT8172_SCR1
	{
		unsigned i;
		/* Enable Smart Card Reader 1 */
		/* First power it up */
		IT_IO_READ16(IT_PM_DSR, i);
		i &= ~IT_PM_DSR_SCR1SB;
		IT_IO_WRITE16(IT_PM_DSR, i);
		/* Then initialize its registers */
		outb(( IT_SCR_SFR_GATE_UART_OFF     << IT_SCR_SFR_GATE_UART_BIT
		      |IT_SCR_SFR_FET_CHARGE_213_US << IT_SCR_SFR_FET_CHARGE_BIT
		      |IT_SCR_SFR_CARD_FREQ_3_5_MHZ << IT_SCR_SFR_CARD_FREQ_BIT
		      |IT_SCR_SFR_FET_ACTIVE_INVERT << IT_SCR_SFR_FET_ACTIVE_BIT
		      |IT_SCR_SFR_ENABLE_ON         << IT_SCR_SFR_ENABLE_BIT),
		     IT8172_PCI_IO_BASE + IT_SCR1_BASE + IT_SCR_SFR);
		outb(IT_SCR_SCDR_RESET_MODE_ASYNC << IT_SCR_SCDR_RESET_MODE_BIT,
		     IT8172_PCI_IO_BASE + IT_SCR1_BASE + IT_SCR_SCDR);
	}
#endif /* CONFIG_IT8172_SCR1 */
}
Exemplo n.º 29
0
void __init au1500_setup(void)
{
    char *argptr;
    u32 pin_func, static_cfg0;
    u32 sys_freqctrl, sys_clksrc;

    argptr = prom_getcmdline();

    /* NOTE: The memory map is established by YAMON 2.08+ */

    /* Various early Au1500 Errata corrected by this */
    set_cp0_config(1<<19); /* Config[OD] */

#ifdef CONFIG_AU1000_SERIAL_CONSOLE
    if ((argptr = strstr(argptr, "console=")) == NULL) {
        argptr = prom_getcmdline();
        strcat(argptr, " console=ttyS0,115200");
    }
#endif

#ifdef CONFIG_SOUND_AU1000
    strcat(argptr, " au1000_audio=vra");
    argptr = prom_getcmdline();
#endif

    _machine_restart = au1000_restart;
    _machine_halt = au1000_halt;
    _machine_power_off = au1000_power_off;

    // IO/MEM resources.
    set_io_port_base(0);
    ioport_resource.start = 0x10000000;
    ioport_resource.end = 0xffffffff;
    iomem_resource.start = 0x10000000;
    iomem_resource.end = 0xffffffff;

#ifdef CONFIG_BLK_DEV_INITRD
    ROOT_DEV = MKDEV(RAMDISK_MAJOR, 0);
    initrd_start = (unsigned long)&__rd_start;
    initrd_end = (unsigned long)&__rd_end;
#endif

    // set AUX clock to 12MHz * 8 = 96 MHz
    au_writel(8, SYS_AUXPLL);
    au_writel(0, SYS_PINSTATERD);
    udelay(100);

#if defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1000_USB_DEVICE)
#ifdef CONFIG_USB_OHCI
    if ((argptr = strstr(argptr, "usb_ohci=")) == NULL) {
        char usb_args[80];
        argptr = prom_getcmdline();
        memset(usb_args, 0, sizeof(usb_args));
        sprintf(usb_args, " usb_ohci=base:0x%x,len:0x%x,irq:%d",
                USB_OHCI_BASE, USB_OHCI_LEN, AU1000_USB_HOST_INT);
        strcat(argptr, usb_args);
    }
#endif

    /* zero and disable FREQ2 */
    sys_freqctrl = au_readl(SYS_FREQCTRL0);
    sys_freqctrl &= ~0xFFF00000;
    au_writel(sys_freqctrl, SYS_FREQCTRL0);

    /* zero and disable USBH/USBD clocks */
    sys_clksrc = au_readl(SYS_CLKSRC);
    sys_clksrc &= ~0x00007FE0;
    au_writel(sys_clksrc, SYS_CLKSRC);

    sys_freqctrl = au_readl(SYS_FREQCTRL0);
    sys_freqctrl &= ~0xFFF00000;

    sys_clksrc = au_readl(SYS_CLKSRC);
    sys_clksrc &= ~0x00007FE0;

    // FREQ2 = aux/2 = 48 MHz
    sys_freqctrl |= ((0<<22) | (1<<21) | (1<<20));
    au_writel(sys_freqctrl, SYS_FREQCTRL0);

    /*
     * Route 48MHz FREQ2 into USB Host and/or Device
     */
#ifdef CONFIG_USB_OHCI
    sys_clksrc |= ((4<<12) | (0<<11) | (0<<10));
#endif
#ifdef CONFIG_AU1000_USB_DEVICE
    sys_clksrc |= ((4<<7) | (0<<6) | (0<<5));
#endif
    au_writel(sys_clksrc, SYS_CLKSRC);


    pin_func = au_readl(SYS_PINFUNC) & (u32)(~0x8000);
#ifndef CONFIG_AU1000_USB_DEVICE
    // 2nd USB port is USB host
    pin_func |= 0x8000;
#endif
    au_writel(pin_func, SYS_PINFUNC);
#endif // defined (CONFIG_USB_OHCI) || defined (CONFIG_AU1000_USB_DEVICE)


#ifdef CONFIG_USB_OHCI
    // enable host controller and wait for reset done
    au_writel(0x08, USB_HOST_CONFIG);
    udelay(1000);
    au_writel(0x0c, USB_HOST_CONFIG);
    udelay(1000);
    au_readl(USB_HOST_CONFIG);
    while (!(au_readl(USB_HOST_CONFIG) & 0x10))
        ;
    au_readl(USB_HOST_CONFIG);
#endif

#ifdef CONFIG_FB
    conswitchp = &dummy_con;
#endif

#ifdef CONFIG_FB_E1356
    if ((argptr = strstr(argptr, "video=")) == NULL) {
        argptr = prom_getcmdline();
        strcat(argptr, " video=e1356fb:system:pb1500");
    }
#elif defined (CONFIG_FB_XPERT98)
    if ((argptr = strstr(argptr, "video=")) == NULL) {
        argptr = prom_getcmdline();
        strcat(argptr, " video=atyfb:1024x768-8@70");
    }
#endif // CONFIG_FB_E1356

#ifndef CONFIG_SERIAL_NONSTANDARD
    /* don't touch the default serial console */
    au_writel(0, UART0_ADDR + UART_CLK);
#endif
    au_writel(0, UART3_ADDR + UART_CLK);

#ifdef CONFIG_BLK_DEV_IDE
    ide_ops = &std_ide_ops;
#endif

#ifdef CONFIG_PCI
    // Setup PCI bus controller
    au_writel(0, Au1500_PCI_CMEM);
    au_writel(0x00003fff, Au1500_CFG_BASE);
#if defined(__MIPSEB__)
    au_writel(0xf | (2<<6) | (1<<4), Au1500_PCI_CFG);
#else
    au_writel(0xf, Au1500_PCI_CFG);
#endif
    au_writel(0xf0000000, Au1500_PCI_MWMASK_DEV);
    au_writel(0, Au1500_PCI_MWBASE_REV_CCL);
    au_writel(0x02a00356, Au1500_PCI_STATCMD);
    au_writel(0x00003c04, Au1500_PCI_HDRTYPE);
    au_writel(0x00000008, Au1500_PCI_MBAR);
    au_sync();
#endif

    while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_E0S);
    au_writel(SYS_CNTRL_E0 | SYS_CNTRL_EN0, SYS_COUNTER_CNTRL);
    au_sync();
    while (au_readl(SYS_COUNTER_CNTRL) & SYS_CNTRL_T0S);
    au_writel(0, SYS_TOYTRIM);

    /* Enable BCLK switching */
    au_writel(0x00000060, 0xb190003c);

#ifdef CONFIG_RTC
    rtc_ops = &pb1500_rtc_ops;
    // Enable the RTC if not already enabled
    if (!(au_readl(0xac000028) & 0x20)) {
        printk("enabling clock ...\n");
        au_writel((au_readl(0xac000028) | 0x20), 0xac000028);
    }
    // Put the clock in BCD mode
    if (readl(0xac00002C) & 0x4) { /* reg B */
        au_writel(au_readl(0xac00002c) & ~0x4, 0xac00002c);
        au_sync();
    }
#endif
}
Exemplo n.º 30
0
void __init atlas_setup(void)
{
#ifdef CONFIG_REMOTE_DEBUG
	int rs_putDebugChar(char);
	char rs_getDebugChar(void);
	int saa9730_putDebugChar(char);
	char saa9730_getDebugChar(void);
	extern int (*generic_putDebugChar)(char);
	extern char (*generic_getDebugChar)(void);
#endif
	char *argptr;

	ioport_resource.end = 0x7fffffff;

#ifdef CONFIG_SERIAL_CONSOLE
	argptr = prom_getcmdline();
	if ((argptr = strstr(argptr, "console=ttyS0")) == NULL) {
		int i = 0;
		char *s = prom_getenv("modetty0");
		while(s[i] >= '0' && s[i] <= '9')
			i++;
		strcpy(serial_console, "ttyS0,");
		strncpy(serial_console + 6, s, i);
		prom_printf("Config serial console: %s\n", serial_console);
		console_setup(serial_console, NULL);
	}
#endif

#ifdef CONFIG_REMOTE_DEBUG
	argptr = prom_getcmdline();
	if ((argptr = strstr(argptr, "kgdb=ttyS")) != NULL) {
		int line;
		argptr += strlen("kgdb=ttyS");
		if (*argptr != '0' && *argptr != '1')
			printk("KGDB: Uknown serial line /dev/ttyS%c, "
			       "falling back to /dev/ttyS1\n", *argptr);
		line = *argptr == '0' ? 0 : 1;
		printk("KGDB: Using serial line /dev/ttyS%d for session\n",
		       line ? 1 : 0);

		if(line == 0) {
			rs_kgdb_hook(line);
			generic_putDebugChar = rs_putDebugChar;
			generic_getDebugChar = rs_getDebugChar;
		} else {
			saa9730_kgdb_hook();
			generic_putDebugChar = saa9730_putDebugChar;
			generic_getDebugChar = saa9730_getDebugChar;
		}

		prom_printf("KGDB: Using serial line /dev/ttyS%d for session, "
			    "please connect your debugger\n", line ? 1 : 0);

		remote_debug = 1;
		/* Breakpoints and stuff are in atlas_irq_setup() */
	}
#endif
	argptr = prom_getcmdline();

	if ((argptr = strstr(argptr, "nofpu")) != NULL)
		mips_cpu.options &= ~MIPS_CPU_FPU;

	rtc_ops = &atlas_rtc_ops;
	board_time_init = mips_time_init;
	board_timer_setup = mips_timer_setup;
	rtc_get_time = mips_rtc_get_time;

	mips_reboot_setup();
}