static uint16_t tnetw1130_read1w(tnetw1130_t *s, hwaddr addr) { uint16_t value = 0; assert(addr < TNETW1130_MEM1_SIZE); value = reg_read16(s->mem1, addr); TRACE(TNETW, logout("addr %s = 0x%04x\n", tnetw1130_regname1(addr), value)); return value; }
static uint16_t tnetw1130_read1w(pci_tnetw1130_t * d, target_phys_addr_t addr) { tnetw1130_t *s = &d->tnetw1130; uint16_t value = 0; assert(addr < TNETW1130_MEM1_SIZE); value = reg_read16(s->mem1, addr); TRACE(TNETW, logout("addr %s = 0x%04x\n", tnetw1130_regname1(addr), value)); return value; }
static uint16_t tnetw1130_read0w(tnetw1130_t *s, hwaddr addr) { uint16_t value = 0; if (addr < TNETW1130_MEM0_SIZE) { value = reg_read16(s->mem0, addr); } if (0) { } else if (addr == TNETW1130_SOFT_RESET) { } else if (addr == TNETW1130_IRQ_STATUS_NON_DES) { /* !!! set after eCPU start */ value = s->irq_status; } else if (addr == TNETW1130_EE_START) { } else if (addr == TNETW1130_ECPU_CTRL) { } else if (addr == TNETW1130_EEPROM_CTL) { value = 0; } else if (addr == TNETW1130_EEPROM_INFORMATION) { value = (RADIO_RADIA_16 << 8) + 0x01; } TRACE(TNETW, logout("addr %s = 0x%04x\n", tnetw1130_regname(addr), value)); return value; }
static void tnetw1130_cmd(tnetw1130_t *s) { uint16_t cmd = reg_read16(s->mem1, CMD_MAILBOX); s->irq_status |= HOST_INT_CMD_COMPLETE; reg_write16(s->mem1, CMD_MAILBOX + 2, 0x0001); switch (cmd) { case ACX1xx_CMD_RESET: /* 0x00 */ tnetw1130_cmd_reset(s); break; case ACX1xx_CMD_INTERROGATE: /* 0x01 */ tnetw1130_cmd_interrogate(s); break; case ACX1xx_CMD_CONFIGURE: /* 0x02 */ case ACX1xx_CMD_CONFIG_TIM: /* 0x0a */ case ACX1xx_CMD_CONFIG_BEACON: /* 0x13 */ case ACX1xx_CMD_CONFIG_PROBE_RESPONSE: /* 0x14 */ case ACX1xx_CMD_CONFIG_NULL_DATA: /* 0x15 */ case ACX1xx_CMD_CONFIG_PROBE_REQUEST: /* 0x16 */ break; } }
static void tnetw1130_write0w(pci_tnetw1130_t * d, target_phys_addr_t addr, uint16_t value) { tnetw1130_t *s = &d->tnetw1130; if (addr < TNETW1130_MEM0_SIZE) { reg_write16(s->mem0, addr, value); } else { UNEXPECTED(); } if (addr == TNETW1130_SOFT_RESET) { if (value & 1) { TRACE(TNETW, logout("soft reset\n")); } } else if (addr == TNETW1130_INT_TRIG) { if (value == 1) { TRACE(TNETW, logout("trigger interrupt, status, cmd = %s\n", tnetw1130_cmdname(reg_read16(s->mem1, CMD_MAILBOX)))); tnetw1130_cmd(s); } else { UNEXPECTED(); } } else if (addr == TNETW1130_IRQ_ACK) { /* !!! must reset irq */ s->irq_status &= ~value; } else if (addr == TNETW1130_EE_START) { if (value & 1) { TRACE(TNETW, logout("start burst read from EEPROM\n")); } } else if (addr == TNETW1130_ECPU_CTRL) { if (value & 1) { TRACE(TNETW, logout("halt eCPU\n")); //~ reg_write16(s->mem0, addr, value & ~1); } else { TRACE(TNETW, logout("start eCPU\n")); s->irq_status |= HOST_INT_FCS_THRESHOLD; } } TRACE(TNETW, logout("addr %s = 0x%04x\n", tnetw1130_regname(addr), value)); }