void m68705_device::interrupt()
{
if (m_pending_interrupts & M68705_INT_MASK)
{
if ((CC & IFLAG) == 0)
{
pushword(m_pc);
pushbyte(m_x);
pushbyte(m_a);
pushbyte(m_cc);
SEI;
standard_irq_callback(0);
if (BIT(m_pending_interrupts, M68705_IRQ_LINE))
{
LOGINT("servicing /INT interrupt\n");
m_pending_interrupts &= ~(1 << M68705_IRQ_LINE);
rm16(M68705_VECTOR_INT, m_pc);
}
else if (BIT(m_pending_interrupts, M68705_INT_TIMER))
{
LOGINT("servicing timer/counter interrupt\n");
rm16(M68705_VECTOR_TIMER, m_pc);
}
else
{
throw emu_fatalerror("Unknown pending interrupt");
}
m_icount -= 11;
burn_cycles(11);
}
}
}
void m68705_device::device_reset()
{
m6805_base_device::device_reset();
// reset digital I/O
port_ddr_w<0>(space(AS_PROGRAM), 0, 0x00, 0xff);
port_ddr_w<1>(space(AS_PROGRAM), 0, 0x00, 0xff);
port_ddr_w<2>(space(AS_PROGRAM), 0, 0x00, 0xff);
port_ddr_w<3>(space(AS_PROGRAM), 0, 0x00, 0xff);
// reset timer/counter
u8 const options(get_mask_options());
m_prescaler = 0x7f;
m_tdr = 0xff;
m_tcr = BIT(options, 6) ? (0x58 | (options & 0x27)) : (0x40 | (m_tcr & 0x37));
// reset EPROM control
m_pcr |= 0xfb; // b2 (/VPON) is driven by external input and hence unaffected by reset
if (CLEAR_LINE != m_vihtp)
{
LOG("loading bootstrap vector\n");
rm16(M68705_VECTOR_BOOTSTRAP, m_pc);
}
else
{
LOG("loading reset vector\n");
rm16(M68705_VECTOR_RESET, m_pc);
}
}
void hd63705_device::device_reset()
{
m6805_base_device::device_reset();
m_s.w.l = SP_MASK;
rm16(0x1ffe, m_pc);
}
void m68hc05eg_device::interrupt_vector()
{
if (BIT(m_pending_interrupts, M68HC05EG_INT_IRQ))
{
m_pending_interrupts &= ~(1 << M68HC05EG_INT_IRQ);
rm16(0x1ffa, m_pc);
}
else if (BIT(m_pending_interrupts, M68HC05EG_INT_TIMER))
{
m_pending_interrupts &= ~(1 << M68HC05EG_INT_TIMER);
rm16(0x1ff8, m_pc);
}
else if (BIT(m_pending_interrupts, M68HC05EG_INT_CPI))
{
m_pending_interrupts &= ~(1 << M68HC05EG_INT_CPI);
rm16(0x1ff6, m_pc);
}
}
void hd63705_device::interrupt_vector()
{
/* Need to add emulation of other interrupt sources here KW-2/4/99 */
/* This is just a quick patch for Namco System 2 operation */
if ((m_pending_interrupts & (1 << HD63705_INT_IRQ1)) != 0)
{
m_pending_interrupts &= ~(1 << HD63705_INT_IRQ1);
rm16(0x1ff8, m_pc);
}
else if ((m_pending_interrupts & (1 << HD63705_INT_IRQ2)) != 0)
{
m_pending_interrupts &= ~(1 << HD63705_INT_IRQ2);
rm16(0x1fec, m_pc);
}
else if ((m_pending_interrupts & (1 << HD63705_INT_ADCONV)) != 0)
{
m_pending_interrupts &= ~(1 << HD63705_INT_ADCONV);
rm16(0x1fea, m_pc);
}
else if ((m_pending_interrupts & (1 << HD63705_INT_TIMER1)) != 0)
{
m_pending_interrupts &= ~(1 << HD63705_INT_TIMER1);
rm16(0x1ff6, m_pc);
}
else if ((m_pending_interrupts & (1 << HD63705_INT_TIMER2)) != 0)
{
m_pending_interrupts &= ~(1 << HD63705_INT_TIMER2);
rm16(0x1ff4, m_pc);
}
else if ((m_pending_interrupts & (1 << HD63705_INT_TIMER3)) != 0)
{
m_pending_interrupts &= ~(1<<HD63705_INT_TIMER3);
rm16(0x1ff2, m_pc);
}
else if ((m_pending_interrupts & (1 << HD63705_INT_PCI)) != 0)
{
m_pending_interrupts &= ~(1 << HD63705_INT_PCI);
rm16(0x1ff0, m_pc);
}
else if ((m_pending_interrupts & (1 << HD63705_INT_SCI)) != 0)
{
m_pending_interrupts &= ~(1 << HD63705_INT_SCI);
rm16(0x1fee, m_pc);
}
}
/* Generate interrupts */
void m6805_base_device::interrupt()
{
/* the 6805 latches interrupt requests internally, so we don't clear */
/* pending_interrupts until the interrupt is taken, no matter what the */
/* external IRQ pin does. */
if (BIT(m_pending_interrupts, HD63705_INT_NMI))
{
pushword(m_pc);
pushbyte(m_x);
pushbyte(m_a);
pushbyte(m_cc);
SEI;
/* no vectors supported, just do the callback to clear irq_state if needed */
standard_irq_callback(0);
rm16(0x1ffc, m_pc);
m_pending_interrupts &= ~(1 << HD63705_INT_NMI);
m_icount -= 11;
burn_cycles(11);
}
else if ((m_pending_interrupts & ((1 << M6805_IRQ_LINE) | HD63705_INT_MASK)) != 0)
{
if ((CC & IFLAG) == 0)
{
/* standard IRQ */
pushword(m_pc);
pushbyte(m_x);
pushbyte(m_a);
pushbyte(m_cc);
SEI;
/* no vectors supported, just do the callback to clear irq_state if needed */
standard_irq_callback(0);
interrupt_vector();
m_pending_interrupts &= ~(1 << M6805_IRQ_LINE);
m_icount -= 11;
burn_cycles(11);
}
}
}
void m6805_base_device::device_reset()
{
m_ea.w.l = 0;
m_pc.w.l = 0;
m_s.w.l = SP_MASK;
m_a = 0;
m_x = 0;
m_cc = 0;
m_pending_interrupts = 0;
m_nmi_state = 0;
m_program = &space(AS_PROGRAM);
m_direct = &m_program->direct();
/* IRQ disabled */
SEI;
rm16(0xfffe, m_pc);
}
void m68hc05eg_device::device_reset()
{
m6805_base_device::device_reset();
rm16(0x1ffe, m_pc);
}
void m6805_base_device::interrupt_vector()
{
rm16(0xfffa, m_pc);
}