Exemplo n.º 1
0
int rt2x00soc_probe(struct platform_device *pdev, const struct rt2x00_ops *ops)
{
	struct ieee80211_hw *hw;
	struct rt2x00_dev *rt2x00dev;
	int retval;

	hw = ieee80211_alloc_hw(sizeof(struct rt2x00_dev), ops->hw);
	if (!hw) {
		ERROR_PROBE("Failed to allocate hardware.\n");
		return -ENOMEM;
	}

	platform_set_drvdata(pdev, hw);

	rt2x00dev = hw->priv;
	rt2x00dev->dev = &pdev->dev;
	rt2x00dev->ops = ops;
	rt2x00dev->hw = hw;
	rt2x00dev->irq = platform_get_irq(pdev, 0);
	rt2x00dev->name = pdev->dev.driver->name;
	set_bit(REQUIRE_EEPROM_FILE, &rt2x00dev->cap_flags);

	rt2x00_set_chip_intf(rt2x00dev, RT2X00_CHIP_INTF_SOC);

	retval = rt2x00soc_alloc_reg(rt2x00dev);
	if (retval)
		goto exit_free_device;

	retval = rt2x00lib_probe_dev(rt2x00dev);
	if (retval)
		goto exit_free_reg;

	return 0;

exit_free_reg:
	rt2x00soc_free_reg(rt2x00dev);

exit_free_device:
	ieee80211_free_hw(hw);

	return retval;
}
Exemplo n.º 2
0
int rt2x00pci_probe(struct pci_dev *pci_dev, const struct rt2x00_ops *ops)
{
    struct ieee80211_hw *hw;
    struct rt2x00_dev *rt2x00dev;
    int retval;
    u16 chip;

    retval = pci_enable_device(pci_dev);
    if (retval) {
        rt2x00_probe_err("Enable device failed\n");
        return retval;
    }

    retval = pci_request_regions(pci_dev, pci_name(pci_dev));
    if (retval) {
        rt2x00_probe_err("PCI request regions failed\n");
        goto exit_disable_device;
    }

    pci_set_master(pci_dev);

    if (pci_set_mwi(pci_dev))
        rt2x00_probe_err("MWI not available\n");

    if (dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(32))) {
        rt2x00_probe_err("PCI DMA not supported\n");
        retval = -EIO;
        goto exit_release_regions;
    }

    hw = ieee80211_alloc_hw(sizeof(struct rt2x00_dev), ops->hw);
    if (!hw) {
        rt2x00_probe_err("Failed to allocate hardware\n");
        retval = -ENOMEM;
        goto exit_release_regions;
    }

    pci_set_drvdata(pci_dev, hw);

    rt2x00dev = hw->priv;
    rt2x00dev->dev = &pci_dev->dev;
    rt2x00dev->ops = ops;
    rt2x00dev->hw = hw;
    rt2x00dev->irq = pci_dev->irq;
    rt2x00dev->name = ops->name;

    if (pci_is_pcie(pci_dev))
        rt2x00_set_chip_intf(rt2x00dev, RT2X00_CHIP_INTF_PCIE);
    else
        rt2x00_set_chip_intf(rt2x00dev, RT2X00_CHIP_INTF_PCI);

    retval = rt2x00pci_alloc_reg(rt2x00dev);
    if (retval)
        goto exit_free_device;

    /*
     * Because rt3290 chip use different efuse offset to read efuse data.
     * So before read efuse it need to indicate it is the
     * rt3290 or not.
     */
    pci_read_config_word(pci_dev, PCI_DEVICE_ID, &chip);
    rt2x00dev->chip.rt = chip;

    retval = rt2x00lib_probe_dev(rt2x00dev);
    if (retval)
        goto exit_free_reg;

    return 0;

exit_free_reg:
    rt2x00pci_free_reg(rt2x00dev);

exit_free_device:
    ieee80211_free_hw(hw);

exit_release_regions:
    pci_clear_mwi(pci_dev);
    pci_release_regions(pci_dev);

exit_disable_device:
    pci_disable_device(pci_dev);

    return retval;
}
Exemplo n.º 3
0
int rt2x00pci_probe(struct pci_dev *pci_dev, const struct rt2x00_ops *ops)
{
	struct ieee80211_hw *hw;
	struct rt2x00_dev *rt2x00dev;
	int retval;
	u16 chip;

	retval = pci_enable_device(pci_dev);
	if (retval) {
		rt2x00_probe_err("Enable device failed\n");
		return retval;
	}

	retval = pci_request_regions(pci_dev, pci_name(pci_dev));
	if (retval) {
		rt2x00_probe_err("PCI request regions failed\n");
		goto exit_disable_device;
	}

	pci_set_master(pci_dev);

	if (pci_set_mwi(pci_dev))
		rt2x00_probe_err("MWI not available\n");

	if (dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(32))) {
		rt2x00_probe_err("PCI DMA not supported\n");
		retval = -EIO;
		goto exit_release_regions;
	}

	hw = ieee80211_alloc_hw(sizeof(struct rt2x00_dev), ops->hw);
	if (!hw) {
		rt2x00_probe_err("Failed to allocate hardware\n");
		retval = -ENOMEM;
		goto exit_release_regions;
	}

	pci_set_drvdata(pci_dev, hw);

	rt2x00dev = hw->priv;
	rt2x00dev->dev = &pci_dev->dev;
	rt2x00dev->ops = ops;
	rt2x00dev->hw = hw;
	rt2x00dev->irq = pci_dev->irq;
	rt2x00dev->name = pci_name(pci_dev);

	if (pci_is_pcie(pci_dev))
		rt2x00_set_chip_intf(rt2x00dev, RT2X00_CHIP_INTF_PCIE);
	else
		rt2x00_set_chip_intf(rt2x00dev, RT2X00_CHIP_INTF_PCI);

	retval = rt2x00pci_alloc_reg(rt2x00dev);
	if (retval)
		goto exit_free_device;

	/*
	 * Because rt3290 chip use different efuse offset to read efuse data.
	 * So before read efuse it need to indicate it is the
	 * rt3290 or not.
	 */
	pci_read_config_word(pci_dev, PCI_DEVICE_ID, &chip);
	rt2x00dev->chip.rt = chip;

	if (rt2x00_rt(rt2x00dev, MT7630))
		MT76x0_WLAN_ChipOnOff(rt2x00dev, 1, 1);
	
	retval = rt2x00lib_probe_dev(rt2x00dev);
	if (retval)
		goto exit_free_reg;

	if (rt2x00_rt(rt2x00dev, MT7630))
	{
		rt2x00dev->TXWISize=20;
		rt2x00dev->bscan=0;

		NdisAllocateSpinLock(rt2x00dev, &rt2x00dev->CtrlRingLock);
		NdisAllocateSpinLock(rt2x00dev, &rt2x00dev->CalLock);
		retval = RTMPAllocTxRxRingMemory(rt2x00dev);
		if (retval != NDIS_STATUS_SUCCESS)
			goto exit_free_reg;
	}

	
	return 0;

exit_free_reg:
	rt2x00pci_free_reg(rt2x00dev);

exit_free_device:
	ieee80211_free_hw(hw);

exit_release_regions:
	pci_release_regions(pci_dev);

exit_disable_device:
	pci_disable_device(pci_dev);

	pci_set_drvdata(pci_dev, NULL);

	return retval;
}