static rt_size_t read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
{
int addr;
struct rt_i2c_bus_device* bus;
rt_uint8_t buf[1];
struct rt_i2c_msg msg[2];
/* prepare data */
pos = pos*at24cxx_device.attr.page_size;
addr = at24cxx_device.attr.chip_addr + (pos/256);
buf[0] = (pos%256);
bus = at24cxx_device.bus;
/* read operation */
lock(&at24cxx_device);
msg[0].addr = addr;
msg[0].buf = buf;
msg[0].len = 1;
msg[0].flags = RT_I2C_WR;
msg[1].addr = addr;
msg[1].buf = buffer;
msg[1].len = size*at24cxx_device.attr.page_size;
msg[1].flags = RT_I2C_RD;
rt_i2c_transfer(bus, msg, 2);
unlock(&at24cxx_device);
return size;
}
static rt_err_t i2c_bus_device_control(rt_device_t dev, rt_uint8_t cmd, void *args)
{
rt_err_t ret;
struct rt_i2c_bus* bus;
struct rt_i2c_priv_data *priv_data;
struct rt_i2c_device *i2c_device = dev->user_data;
bus = i2c_device->bus;
RT_ASSERT(bus != RT_NULL);
RT_ASSERT(i2c_device != RT_NULL);
switch (cmd)
{
case RT_I2C_DEV_CTRL_10BIT: /* set 10-bit addr mode */
i2c_device->flags |= RT_I2C_ADDR_10BIT;
break;
case RT_I2C_DEV_CTRL_ADDR:
i2c_device->addr = *(rt_uint16_t *)args;
break;
case RT_I2C_DEV_CTRL_TIMEOUT:
bus->timeout = *(rt_uint32_t *)args;
break;
case RT_I2C_DEV_CTRL_RW:
priv_data = (struct rt_i2c_priv_data *)args;
ret = rt_i2c_transfer(bus, priv_data->msgs, priv_data->number);
if (ret < 0)
{
return -RT_EIO;
}
break;
default: break;
}
return RT_EOK;
}
rt_size_t rt_i2c_master_send(struct rt_i2c_bus_device *bus,
rt_uint16_t addr,
rt_uint16_t flags,
const rt_uint8_t *buf,
rt_uint32_t count)
{
rt_size_t ret;
struct rt_i2c_msg msg;
msg.addr = addr;
msg.flags = flags & RT_I2C_ADDR_10BIT;
msg.len = count;
msg.buf = (rt_uint8_t *)buf;
ret = rt_i2c_transfer(bus, &msg, 1);
return (ret > 0) ? count : ret;
}
int MPU6050::read_buffer(rt_uint8_t reg, rt_uint8_t* value, rt_size_t size)
{
struct rt_i2c_msg msgs[2];
msgs[0].addr = this->i2c_addr;
msgs[0].flags = RT_I2C_WR;
msgs[0].buf = ®
msgs[0].len = 1;
msgs[1].addr = this->i2c_addr;
msgs[1].flags = RT_I2C_RD; /* Read from slave */
msgs[1].buf = (rt_uint8_t *)value;
msgs[1].len = size;
if (rt_i2c_transfer(this->i2c_bus, msgs, 2) == 2)
return RT_EOK;
return -RT_ERROR;
}
int MPU6050::write_reg(rt_uint8_t reg, rt_uint8_t value)
{
struct rt_i2c_msg msgs[2];
msgs[0].addr = this->i2c_addr;
msgs[0].flags = RT_I2C_WR;
msgs[0].buf = ®
msgs[0].len = 1;
msgs[1].addr = this->i2c_addr;
msgs[1].flags = RT_I2C_WR | RT_I2C_NO_START;
msgs[1].buf = (rt_uint8_t *)&value;
msgs[1].len = 1;
if (rt_i2c_transfer(this->i2c_bus, msgs, 2) == 2)
return RT_EOK;
return -RT_ERROR;
}
rt_size_t rt_i2c_master_recv(struct rt_i2c_bus_device *bus,
rt_uint16_t addr,
rt_uint16_t flags,
rt_uint8_t *buf,
rt_uint32_t count)
{
rt_size_t ret;
struct rt_i2c_msg msg;
RT_ASSERT(bus != RT_NULL);
msg.addr = addr;
msg.flags = flags & RT_I2C_ADDR_10BIT;
msg.flags |= RT_I2C_RD;
msg.len = count;
msg.buf = buf;
ret = rt_i2c_transfer(bus, &msg, 1);
return (ret > 0) ? count : ret;
}
static int _ft5406_read(unsigned char cmd,
void *buf,
size_t len)
{
struct rt_i2c_msg msgs[2];
msgs[0].addr = FT5206_TS_ADDR;
msgs[0].flags = RT_I2C_WR;
msgs[0].buf = &cmd;
msgs[0].len = sizeof(cmd);
msgs[1].addr = FT5206_TS_ADDR;
msgs[1].flags = RT_I2C_RD;
msgs[1].buf = buf;
msgs[1].len = len;
if (rt_i2c_transfer(_i2c_bus, msgs, 2) == 2)
return len;
else
return -1;
}
static rt_size_t write_page(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
{
int addr,i;
rt_uint8_t *p = (void*)buffer;
struct rt_i2c_bus_device* bus;
rt_uint8_t buf[1];
struct rt_i2c_msg msg[2];
for(i=0;i<size;i++)
{
/* prepare data */
p = (rt_uint8_t*)buffer + i*at24cxx_device.attr.page_size;
pos = pos + i;
pos = pos*at24cxx_device.attr.page_size;
addr = at24cxx_device.attr.chip_addr + (pos/256);
buf[0] = (pos%256); /* sub addr */
bus = at24cxx_device.bus;
/* write operation */
lock(&at24cxx_device);
msg[0].addr = addr;
msg[0].buf = buf;
msg[0].len = 1;
msg[0].flags = RT_I2C_WR;
msg[1].addr = addr;
msg[1].buf = p;
msg[1].len = at24cxx_device.attr.page_size;
msg[1].flags = RT_I2C_WR|RT_I2C_NO_START;
rt_i2c_transfer(bus, msg, 2);
unlock(&at24cxx_device);
/* delay some time to let EEPORM idle */
rt_thread_delay(1);
}
return size;
}
rt_err_t i2c_register_write(struct rt_i2c_bus_device *bus,
rt_uint16_t daddr,
rt_uint8_t raddr,
void *buffer,
rt_size_t count)
{
rt_int32_t ret;
rt_tick_t tick=rt_tick_get();
#ifdef NO_RT_DEVICE
rt_uint8_t * pBuffer=(rt_uint8_t *)buffer;
rt_mutex_take(&I2C1_mutex,RT_WAITING_FOREVER);
rt_enter_critical();
I2C_GenerateSTART(I2C1, ENABLE);
/* Test on EV5 and clear it */
while(!I2C_CheckEvent(I2C1, I2C_EVENT_MASTER_MODE_SELECT))
CHECKTIME(tick);
/* Send MPU6050 address for write */
I2C_Send7bitAddress(I2C1, daddr, I2C_Direction_Transmitter);
/* Test on EV6 and clear it */
while(!I2C_CheckEvent(I2C1, I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED))
CHECKTIME(tick);
/* Send the MPU6050's internal address to write to */
I2C_SendData(I2C1, raddr);
/* Test on EV8 and clear it */
while(!I2C_CheckEvent(I2C1, I2C_EVENT_MASTER_BYTE_TRANSMITTED))
CHECKTIME(tick);
/* Send the byte to be written */
I2C_SendData(I2C1, *pBuffer);
/* Test on EV8 and clear it */
while(!I2C_CheckEvent(I2C1, I2C_EVENT_MASTER_BYTE_TRANSMITTED))
CHECKTIME(tick);
/* Send STOP condition */
I2C_GenerateSTOP(I2C1, ENABLE);
rt_exit_critical();
rt_mutex_release(&I2C1_mutex);
#else
struct rt_i2c_msg msgs[2];
rt_err_t err;
RT_ASSERT(bus != RT_NULL);
RT_ASSERT(buffer != RT_NULL);
if(count>1)
{
msgs[0].addr=daddr;
msgs[0].buf=&raddr;
msgs[0].len=1;
msgs[0].flags=RT_I2C_WR;
msgs[1].addr=daddr;
msgs[1].buf=buffer;
msgs[1].len=count;
msgs[1].flags=RT_I2C_WR|RT_I2C_NO_START;
err=rt_i2c_transfer(bus,msgs,2);
}
else
{
rt_uint8_t data[2];
data[0]=raddr;
data[1]=*((rt_uint8_t *)buffer);
msgs[0].addr=daddr;
msgs[0].buf=data;
msgs[0].len=2;
msgs[0].flags=RT_I2C_WR;
err=rt_i2c_transfer(bus,msgs,1);
}
#endif
return RT_EOK;
out:
#ifdef NO_RT_DEVICE
// I2C_GenerateSTOP(I2C1, ENABLE);
rt_exit_critical();
rt_mutex_release(&I2C1_mutex);
#endif
return ret;
}
rt_err_t i2c_register_read(struct rt_i2c_bus_device *bus,
rt_uint16_t daddr,
rt_uint8_t raddr,
void *buffer,
rt_size_t count)
{
rt_int32_t ret;
rt_tick_t tick=rt_tick_get();
#ifdef NO_RT_DEVICE
rt_uint16_t NumByteToRead=count;
rt_uint8_t * pBuffer=(rt_uint8_t *)buffer;
rt_mutex_take(&I2C1_mutex,RT_WAITING_FOREVER);
rt_enter_critical();
/* While the bus is busy */
while(I2C_GetFlagStatus(I2C1, I2C_FLAG_BUSY))
CHECKTIME(tick);
/* Send START condition */
I2C_GenerateSTART(I2C1, ENABLE);
/* Test on EV5 and clear it */
while(!I2C_CheckEvent(I2C1, I2C_EVENT_MASTER_MODE_SELECT))
CHECKTIME(tick);
/* Send MPU6050 address for write */
I2C_Send7bitAddress(I2C1, daddr, I2C_Direction_Transmitter);
/* Test on EV6 and clear it */
while(!I2C_CheckEvent(I2C1, I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED))
CHECKTIME(tick);
/* Clear EV6 by setting again the PE bit */
I2C_Cmd(I2C1, ENABLE);
/* Send the MPU6050's internal address to write to */
I2C_SendData(I2C1, raddr);
/* Test on EV8 and clear it */
while(!I2C_CheckEvent(I2C1, I2C_EVENT_MASTER_BYTE_TRANSMITTED))
CHECKTIME(tick);
/* Send STRAT condition a second time */
I2C_GenerateSTART(I2C1, ENABLE);
/* Test on EV5 and clear it */
while(!I2C_CheckEvent(I2C1, I2C_EVENT_MASTER_MODE_SELECT))
CHECKTIME(tick);
/* Send MPU6050 address for read */
I2C_Send7bitAddress(I2C1, daddr, I2C_Direction_Receiver);
/* Test on EV6 and clear it */
while(!I2C_CheckEvent(I2C1, I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED))
CHECKTIME(tick);
/* While there is data to be read */
while(NumByteToRead)
{
if(NumByteToRead == 1)
{
/* Disable Acknowledgement */
I2C_AcknowledgeConfig(I2C1, DISABLE);
/* Send STOP Condition */
I2C_GenerateSTOP(I2C1, ENABLE);
}
/* Test on EV7 and clear it */
while(!I2C_CheckEvent(I2C1, I2C_EVENT_MASTER_BYTE_RECEIVED))
CHECKTIME(tick);
{
/* Read a byte from the MPU6050 */
*pBuffer = I2C_ReceiveData(I2C1);
/* Point to the next location where the byte read will be saved */
pBuffer++;
/* Decrement the read bytes counter */
NumByteToRead--;
}
}
/* Enable Acknowledgement to be ready for another reception */
I2C_AcknowledgeConfig(I2C1, ENABLE);
// EXT_CRT_SECTION();
rt_exit_critical();
rt_mutex_release(&I2C1_mutex);
#else
struct rt_i2c_msg msgs[2];
RT_ASSERT(bus != RT_NULL);
RT_ASSERT(buffer != RT_NULL);
msgs[0].addr=daddr;
msgs[0].buf=&raddr;
msgs[0].len=1;
msgs[0].flags=RT_I2C_WR|I2C_RA;
msgs[1].addr=daddr;
msgs[1].buf=buffer;
msgs[1].len=count;
msgs[1].flags=RT_I2C_RD|RT_I2C_NO_READ_ACK;
err=rt_i2c_transfer(bus,msgs,2);
#endif
return RT_EOK;
out:
#ifdef NO_RT_DEVICE
// I2C_GenerateSTOP(I2C1, ENABLE);
rt_exit_critical();
rt_mutex_release(&I2C1_mutex);
#endif
return ret;
}
