void board_led_initialize(void)
{
/* Configure LED PIOs for output */
sam_configpio(PIO_BLUE);
sam_configpio(PIO_RED);
}
void sam_ledinit(void)
{
/* Configure LED PIOs for output */
sam_configpio(PIO_BLUE);
sam_configpio(PIO_RED);
}
void sam_ledinit(void)
{
/* Configure LED PIOs for output */
sam_configpio(PIO_LED_USER);
sam_configpio(PIO_LED_POWER);
}
void board_userled_initialize(void)
{
/* Configure LED PIOs for output */
sam_configpio(PIO_LED_USER);
sam_configpio(PIO_LED_POWER);
}
void board_led_initialize(void)
{
/* Configure LED PIOs for output */
sam_configpio(PIO_BLUE);
#ifndef CONFIG_SAMA5D3xEK_NOREDLED
sam_configpio(PIO_RED);
#endif
}
void weak_function sam_netinitialize(void)
{
#ifdef CONFIG_SAMA5_EMAC0
phyinfo("Configuring %08x\n", PIO_INT_ETH0);
sam_configpio(PIO_INT_ETH0);
#endif
#ifdef CONFIG_SAMA5_EMAC1
phyinfo("Configuring %08x\n", PIO_INT_ETH1);
sam_configpio(PIO_INT_ETH1);
#endif
}
int sam_ajoy_initialization(void)
{
int ret;
int fd;
int i;
/* NOTE: The ADC driver was initialized earlier in the bring-up sequence. */
/* Open the ADC driver for reading. */
fd = open("/dev/adc0", O_RDONLY);
if (fd < 0)
{
int errcode = get_errno();
ierr("ERROR: Failed to open /dev/adc0: %d\n", errcode);
return -errcode;
}
/* Detach the file structure from the file descriptor so that it can be
* used on any thread.
*/
ret = file_detach(fd, &g_adcfile);
if (ret < 0)
{
ierr("ERROR: Failed to detach from file descriptor: %d\n", ret);
(void)close(fd);
return ret;
}
/* Configure the GPIO pins as interrupting inputs. */
for (i = 0; i < AJOY_NGPIOS; i++)
{
/* Configure the PIO as an input */
sam_configpio(g_joypio[i]);
/* Configure PIO interrupts, attach the interrupt handler, but leave
* the interrupt disabled.
*/
sam_pioirq(g_joypio[i]);
(void)irq_attach(g_joyirq[i], ajoy_interrupt);
sam_pioirqdisable(g_joyirq[i]);
}
/* Register the joystick device as /dev/ajoy0 */
ret = ajoy_register("/dev/ajoy0", &g_ajoylower);
if (ret < 0)
{
ierr("ERROR: ajoy_register failed: %d\n", ret);
file_close_detached(&g_adcfile);
}
return ret;
}
void weak_function sam_netinitialize(void)
{
#ifdef CONFIG_SAMA5_EMACA
/* Ethernet 10/100 (EMAC A) Port
*
* The main board contains a MICREL PHY device (KSZ8051) operating at 10/100 Mbps.
* The board supports MII and RMII interface modes.
*
* The two independent PHY devices embedded on CM and MB boards are connected to
* independent RJ-45 connectors with built-in magnetic and status LEDs.
*
* At the De-Assertion of Reset:
* PHY ADD[2:0]:001
* CONFIG[2:0]:001,Mode:RMII
* Duplex Mode:Half Duplex
* Isolate Mode:Disable
* Speed Mode:100Mbps
* Nway Auto-Negotiation:Enable
*
* The KSZ8051 PHY interrupt is available on PE30 INT_ETH1
*/
phydbg("Configuring %08x\n", PIO_INT_ETH1);
sam_configpio(PIO_INT_ETH1);
#endif
#ifdef CONFIG_SAMA5_GMAC
/* Tri-Speed Ethernet PHY
*
* The SAMA5D3 series-CM board is equipped with a MICREL PHY devices (MICREL
* KSZ9021/31) operating at 10/100/1000 Mbps. The board supports RGMII interface
* mode. The Ethernet interface consists of 4 pairs of low voltage differential
* pair signals designated from GRX± and GTx± plus control signals for link
* activity indicators. These signals can be used to connect to a 10/100/1000
* BaseT RJ45 connector integrated on the main board.
*
* The KSZ9021/31 interrupt is available on PB35 INT_GETH0
*/
phydbg("Configuring %08x\n", PIO_INT_ETH0);
sam_configpio(PIO_INT_ETH0);
#endif
}
void weak_function sam_spidev_initialize(void)
{
#ifdef CONFIG_SAMA5_SPI0
#ifdef CONFIG_MTD_AT25
/* The AT25 serial FLASH connects using NPCS0 */
sam_configpio(PIO_AT25_NPCS0);
#endif
#endif
#ifdef CONFIG_SAMA5_SPI1
#endif
}
void weak_function sam_usbinitialize(void)
{
#ifdef HAVE_USBDEV
/* Configure Port A to support the USB device function */
sam_configpio(PIO_USBA_VBUS_SENSE); /* VBUS sense */
/* TODO: Configure an interrupt on VBUS sense */
#endif
#ifdef HAVE_USBHOST
#ifdef CONFIG_SAMA5_UHPHS_RHPORT1
/* Configure Port A to support the USB OHCI/EHCI function */
#ifdef PIO_USBA_VBUS_ENABLE /* SAMA5D3-Xplained has no port A VBUS enable */
sam_configpio(PIO_USBA_VBUS_ENABLE); /* VBUS enable, initially OFF */
#endif
#endif
#ifdef CONFIG_SAMA5_UHPHS_RHPORT2
/* Configure Port B to support the USB OHCI/EHCI function */
sam_configpio(PIO_USBB_VBUS_ENABLE); /* VBUS enable, initially OFF */
#endif
#ifdef CONFIG_SAMA5_UHPHS_RHPORT3
/* Configure Port C to support the USB OHCI/EHCI function */
sam_configpio(PIO_USBC_VBUS_ENABLE); /* VBUS enable, initially OFF */
#endif
#if defined(CONFIG_SAMA5_UHPHS_RHPORT2) || defined(CONFIG_SAMA5_UHPHS_RHPORT3)
/* Configure Port B/C VBUS overrcurrent detection */
sam_configpio(PIO_USBBC_VBUS_OVERCURRENT); /* VBUS overcurrent */
#endif
#endif /* HAVE_USBHOST */
}
int board_nandflash_config(int cs)
{
uint32_t regval;
/* The Embest and Ronetix CM boards and one Hynix NAND HY27UF(08/16)2G2B
* Series NAND (MT29F2G08ABAEAWP). This part has a capacity of 256Mx8bit
* () with spare 8Mx8 bit capacity. The device contains 2048 blocks, composed
* by 64 x 2112 byte pages. The effective size is approximately 256MiB.
*
* NAND is available on CS3.
*/
if (cs == HSMC_CS3)
{
/* Make sure that the SMC peripheral is enabled. */
sam_hsmc_enableclk();
/* Configure the SMC */
regval = HSMC_SETUP_NWE_SETUP(1) | HSMC_SETUP_NCS_WRSETUP(1) |
HSMC_SETUP_NRD_SETUP(2) | HSMC_SETUP_NCS_RDSETUP(1);
putreg32(regval, SAM_HSMC_SETUP(HSMC_CS3));
regval = HSMC_PULSE_NWE_PULSE(5) | HSMC_PULSE_NCS_WRPULSE(7) |
HSMC_PULSE_NRD_PULSE(5) | HSMC_PULSE_NCS_RDPULSE(7);
putreg32(regval, SAM_HSMC_PULSE(HSMC_CS3));
regval = HSMC_CYCLE_NWE_CYCLE(8) | HSMC_CYCLE_NRD_CYCLE(9);
putreg32(regval, SAM_HSMC_CYCLE(HSMC_CS3));
regval = HSMC_TIMINGS_TCLR(3) | HSMC_TIMINGS_TADL(10) |
HSMC_TIMINGS_TAR(3) | HSMC_TIMINGS_TRR(4) |
HSMC_TIMINGS_TWB(5) | HSMC_TIMINGS_RBNSEL(3) |
HSMC_TIMINGS_NFSEL;
putreg32(regval, SAM_HSMC_TIMINGS(HSMC_CS3));
regval = HSMC_MODE_READMODE | HSMC_MODE_WRITEMODE |
HSMC_MODE_BIT_8 | HSMC_MODE_TDFCYCLES(1);
putreg32(regval, SAM_HSMC_MODE(HSMC_CS3));
/* Configure NAND PIO pins
*
* NAND Interface:
*
* NCS3/NANDCE - Dedicated pin; no configuration needed
* NANDCLE - PE21
* NANDALE - PE22
* NRD/NANDOE - Dedicated pin; no configuration needed
* NWE/NANDWE - Dedicated pin; no configuration needed
* NANDRDY - Dedicated pin; no configuration needed
* M_EBI_D0-7 - Dedicated pins; no configuration needed
*/
sam_configpio(PIO_HSMC_NANDALE);
sam_configpio(PIO_HSMC_NANDCLE);
return OK;
}
return -ENODEV;
}
void board_button_initialize(void)
{
(void)sam_configpio(PIO_USER1);
}
static inline int ov2640_camera_initialize(void)
{
FAR struct i2c_dev_s *i2c;
uint32_t actual;
int ret;
/* Get the I2C driver that interfaces with the camers (OV2640_BUS)*/
i2c = up_i2cinitialize(OV2640_BUS);
if (!i2c)
{
gdbg("ERROR: Failed to initialize TWI%d\n", OV2640_BUS);
return EXIT_FAILURE;
}
/* Enable clocking to the ISI peripheral */
sam_isi_enableclk();
/* Configure OV2640 pins
*
* ISI:
* - HSYNC, VSYNC, PCK
* - 8 data bits for 8-bit color
* PCK
* - PCK1 provides OV2640 system clock
*/
sam_configpio(PIO_ISI_HSYNC);
sam_configpio(PIO_ISI_VSYNC);
sam_configpio(PIO_ISI_PCK);
sam_configpio(PIO_ISI_D0);
sam_configpio(PIO_ISI_D1);
sam_configpio(PIO_ISI_D2);
sam_configpio(PIO_ISI_D3);
sam_configpio(PIO_ISI_D4);
sam_configpio(PIO_ISI_D5);
sam_configpio(PIO_ISI_D6);
sam_configpio(PIO_ISI_D7);
sam_configpio(PIO_PMC_PCK1);
/* Configure and enable the PCK1 output */
actual = sam_pck_configure(PCK1, OV2640_FREQUENCY);
gvdbg("Desired PCK1 frequency: %ld Actual: %ld\n",
(long)OV2640_FREQUENCY, (long)actual);
sam_pck_enable(PCK1, true);
/* Configure the ISI peripheral */
#warning Missing Logic
/* Initialize the OV2640 camera */
ret = ov2640_initialize(i2c);
if (ret < 0)
{
gdbg("ERROR: Failed to initialize the OV2640: %d\n", ret);
return EXIT_FAILURE;
}
return EXIT_FAILURE;
}
int sam_isi_initialize(void)
{
int ret;
/* Configure PIO pins for the ISI (outputs) */
/* Data pins */
(void)sam_configpio(PIO_ISI_D0);
(void)sam_configpio(PIO_ISI_D1);
(void)sam_configpio(PIO_ISI_D2);
(void)sam_configpio(PIO_ISI_D3);
(void)sam_configpio(PIO_ISI_D4);
(void)sam_configpio(PIO_ISI_D5);
(void)sam_configpio(PIO_ISI_D6);
(void)sam_configpio(PIO_ISI_D7);
(void)sam_configpio(PIO_ISI_D8);
(void)sam_configpio(PIO_ISI_D9);
(void)sam_configpio(PIO_ISI_D10);
(void)sam_configpio(PIO_ISI_D11);
/* Horizontal and vertical sync pins (inputs) */
(void)sam_configpio(PIO_ISI_HSYNC);
(void)sam_configpio(PIO_ISI_VSYNC);
/* Pixel clock input (ISI_PCK, not to be confused with the processor clock
* (PCK) or the programmable clock (PCK).
*
* NOTE: "Several parts of the ISI controller use the pixel clock provided
* by the image sensor (ISI_PCK). Thus the user must first program the
* image sensor to provide this clock (ISI_PCK) before programming the
* Image Sensor Controller."
*/
(void)sam_configpio(PIO_ISI_PCK);
/* Configure ISI_MCK programmable clock output.
*
* REVISIT: Might this not be needed before the image sensor is
* initialized?
*/
g_isi.actual = sam_pck_configure(ISI_PCKID, PCKSRC_MCK, CONFIG_ISI_MCKFREQ);
ginfo("PCK%d frequency=%d actual=%d\n",
ISI_PCKID, CONFIG_ISI_MCKFREQ, g_isi.actual);
/* Enable the MCK (output) */
sam_pck_enable(ISI_PCKID, true);
/* Configure the pixel clock */
#warning Missing logic
/* Configure color */
#warning Missing logic
/* Configure decimation */
#warning Missing logic
/* Configure DMA */
#warning Missing logic
}
void up_buttoninit(void)
{
(void)sam_configpio(PIO_USER1);
}
void board_autoled_initialize(void)
{
/* Configure LED PIOs for output */
sam_configpio(PIO_LED_GREEN);
}
void sam_lowsetup(void)
{
/* Enable clocking for all selected UART/USARTs (USARTs may not
* necessarily be configured as UARTs).
*/
#ifdef CONFIG_SAMA5_UART0
sam_uart0_enableclk();
#endif
#ifdef CONFIG_SAMA5_UART1
sam_uart1_enableclk();
#endif
#ifdef CONFIG_SAMA5_UART2
sam_uart2_enableclk();
#endif
#ifdef CONFIG_SAMA5_UART3
sam_uart3_enableclk();
#endif
#ifdef CONFIG_SAMA5_UART4
sam_uart4_enableclk();
#endif
#ifdef CONFIG_USART0_SERIALDRIVER
sam_usart0_enableclk();
#endif
#ifdef CONFIG_SAMA5_USART1
sam_usart1_enableclk();
#endif
#ifdef CONFIG_SAMA5_USART2
sam_usart2_enableclk();
#endif
#ifdef CONFIG_SAMA5_USART3
sam_usart3_enableclk();
#endif
#ifdef CONFIG_SAMA5_FLEXCOM0
sam_flexcom0_enableclk();
#endif
#ifdef CONFIG_SAMA5_FLEXCOM1
sam_flexcom1_enableclk();
#endif
#ifdef CONFIG_SAMA5_FLEXCOM2
sam_flexcom2_enableclk();
#endif
#ifdef CONFIG_SAMA5_FLEXCOM3
sam_flexcom3_enableclk();
#endif
#ifdef CONFIG_SAMA5_FLEXCOM4
sam_flexcom4_enableclk();
#endif
/* Configure UART pins for all selected UART/USARTs. USARTs pins are
* only configured if the USART is also configured as as a UART.
*/
#ifdef CONFIG_SAMA5_UART0
(void)sam_configpio(PIO_UART0_RXD);
(void)sam_configpio(PIO_UART0_TXD);
#endif
#ifdef CONFIG_SAMA5_UART1
(void)sam_configpio(PIO_UART1_RXD);
(void)sam_configpio(PIO_UART1_TXD);
#endif
#ifdef CONFIG_SAMA5_UART2
(void)sam_configpio(PIO_UART2_RXD);
(void)sam_configpio(PIO_UART2_TXD);
#endif
#ifdef CONFIG_SAMA5_UART3
(void)sam_configpio(PIO_UART3_RXD);
(void)sam_configpio(PIO_UART3_TXD);
#endif
#ifdef CONFIG_SAMA5_UART4
(void)sam_configpio(PIO_UART4_RXD);
(void)sam_configpio(PIO_UART4_TXD);
#endif
#if defined(CONFIG_USART0_SERIALDRIVER) && defined(CONFIG_SAMA5_USART0)
(void)sam_configpio(PIO_USART0_RXD);
(void)sam_configpio(PIO_USART0_TXD);
#ifdef CONFIG_USART0_OFLOWCONTROL
(void)sam_configpio(PIO_USART0_CTS);
#endif
#ifdef CONFIG_USART0_IFLOWCONTROL
(void)sam_configpio(PIO_USART0_RTS);
#endif
#endif
#if defined(CONFIG_USART1_SERIALDRIVER) && defined(CONFIG_SAMA5_USART1)
(void)sam_configpio(PIO_USART1_RXD);
(void)sam_configpio(PIO_USART1_TXD);
#ifdef CONFIG_USART1_OFLOWCONTROL
(void)sam_configpio(PIO_USART1_CTS);
#endif
#ifdef CONFIG_USART1_IFLOWCONTROL
(void)sam_configpio(PIO_USART1_RTS);
#endif
#endif
#if defined(CONFIG_USART2_SERIALDRIVER) && defined(CONFIG_SAMA5_USART2)
(void)sam_configpio(PIO_USART2_RXD);
(void)sam_configpio(PIO_USART2_TXD);
#ifdef CONFIG_USART2_OFLOWCONTROL
(void)sam_configpio(PIO_USART2_CTS);
#endif
#ifdef CONFIG_USART2_IFLOWCONTROL
(void)sam_configpio(PIO_USART2_RTS);
#endif
#endif
#if defined(CONFIG_USART3_SERIALDRIVER) && defined(CONFIG_SAMA5_USART3)
(void)sam_configpio(PIO_USART3_RXD);
(void)sam_configpio(PIO_USART3_TXD);
#ifdef CONFIG_USART3_OFLOWCONTROL
(void)sam_configpio(PIO_USART3_CTS);
#endif
#ifdef CONFIG_USART3_IFLOWCONTROL
(void)sam_configpio(PIO_USART3_RTS);
#endif
#endif
#if defined(CONFIG_USART4_SERIALDRIVER) && defined(CONFIG_SAMA5_USART4)
(void)sam_configpio(PIO_USART4_RXD);
(void)sam_configpio(PIO_USART4_TXD);
#ifdef CONFIG_USART4_OFLOWCONTROL
(void)sam_configpio(PIO_USART4_CTS);
#endif
#ifdef CONFIG_USART4_IFLOWCONTROL
(void)sam_configpio(PIO_USART4_RTS);
#endif
#endif
/* For Flexcom USARTs:
*
* FLEXCOM_IO0 = TXD
* FLEXCOM_IO1 = RXD
* FLEXCOM_IO2 = SCK
* FLEXCOM_IO3 = CTS
* FLEXCOM_IO4 = RTS
*/
#if defined(CONFIG_USART0_SERIALDRIVER) && defined(CONFIG_SAMA5_FLEXCOM0_USART)
(void)sam_configpio(PIO_FLEXCOM0_IO0);
(void)sam_configpio(PIO_FLEXCOM0_IO1);
#ifdef CONFIG_USART0_OFLOWCONTROL
(void)sam_configpio(PIO_FLEXCOM0_IO3);
#endif
#ifdef CONFIG_USART0_IFLOWCONTROL
(void)sam_configpio(PIO_FLEXCOM0_IO4);
#endif
#endif
#if defined(CONFIG_USART1_SERIALDRIVER) && defined(CONFIG_SAMA5_FLEXCOM1_USART)
(void)sam_configpio(PIO_FLEXCOM1_IO0);
(void)sam_configpio(PIO_FLEXCOM1_IO1);
#ifdef CONFIG_USART1_OFLOWCONTROL
(void)sam_configpio(PIO_FLEXCOM1_IO3);
#endif
#ifdef CONFIG_USART1_IFLOWCONTROL
(void)sam_configpio(PIO_FLEXCOM1_IO4);
#endif
#endif
#if defined(CONFIG_USART2_SERIALDRIVER) && defined(CONFIG_SAMA5_FLEXCOM2_USART)
(void)sam_configpio(PIO_FLEXCOM2_IO0);
(void)sam_configpio(PIO_FLEXCOM2_IO1);
#ifdef CONFIG_USART2_OFLOWCONTROL
(void)sam_configpio(PIO_FLEXCOM2_IO3);
#endif
#ifdef CONFIG_USART2_IFLOWCONTROL
(void)sam_configpio(PIO_FLEXCOM2_IO4);
#endif
#endif
#if defined(CONFIG_USART3_SERIALDRIVER) && defined(CONFIG_SAMA5_FLEXCOM3_USART)
(void)sam_configpio(PIO_FLEXCOM3_IO0);
(void)sam_configpio(PIO_FLEXCOM3_IO1);
#ifdef CONFIG_USART3_OFLOWCONTROL
(void)sam_configpio(PIO_FLEXCOM3_IO3);
#endif
#ifdef CONFIG_USART3_IFLOWCONTROL
(void)sam_configpio(PIO_FLEXCOM3_IO4);
#endif
#endif
#if defined(CONFIG_USART4_SERIALDRIVER) && defined(CONFIG_SAMA5_FLEXCOM4_USART)
(void)sam_configpio(PIO_FLEXCOM4_IO0);
(void)sam_configpio(PIO_FLEXCOM4_IO1);
#ifdef CONFIG_USART4_OFLOWCONTROL
(void)sam_configpio(PIO_FLEXCOM4_IO3);
#endif
#ifdef CONFIG_USART4_IFLOWCONTROL
(void)sam_configpio(PIO_FLEXCOM4_IO4);
#endif
#endif
/* Configure the console (only) */
#if (defined(SAMA5_HAVE_UART_CONSOLE) || defined(SAMA5_HAVE_USART_CONSOLE)) && \
!defined(SUPPRESS_CONSOLE_CONFIG)
/* Reset and disable receiver and transmitter */
putreg32((UART_CR_RSTRX | UART_CR_RSTTX | UART_CR_RXDIS | UART_CR_TXDIS),
SAM_CONSOLE_VBASE + SAM_UART_CR_OFFSET);
/* Disable all interrupts */
putreg32(0xffffffff, SAM_CONSOLE_VBASE + SAM_UART_IDR_OFFSET);
/* Set up the mode register */
putreg32(MR_VALUE, SAM_CONSOLE_VBASE + SAM_UART_MR_OFFSET);
/* Configure the console baud. NOTE: Oversampling by 8 is not supported.
* This may limit BAUD rates for lower USART clocks.
*/
putreg32(((SAM_USART_CLOCK + (SAM_CONSOLE_BAUD << 3)) / (SAM_CONSOLE_BAUD << 4)),
SAM_CONSOLE_VBASE + SAM_UART_BRGR_OFFSET);
/* Enable receiver & transmitter */
putreg32((UART_CR_RXEN | UART_CR_TXEN),
SAM_CONSOLE_VBASE + SAM_UART_CR_OFFSET);
#elif defined(SAMA5_HAVE_FLEXCOM_CONSOLE) && !defined(SUPPRESS_CONSOLE_CONFIG)
/* Select USART mode for the Flexcom */
putreg32(FLEX_MR_OPMODE_USART, SAM_CONSOLE_VBASE + SAM_FLEX_MR_OFFSET);
/* Reset and disable receiver and transmitter */
putreg32((FLEXUS_CR_RSTRX | FLEXUS_CR_RSTTX | FLEXUS_CR_RXDIS | FLEXUS_CR_TXDIS),
SAM_CONSOLE_VBASE + SAM_FLEXUS_CR_OFFSET);
/* Disable all interrupts */
putreg32(0xffffffff, SAM_CONSOLE_VBASE + SAM_FLEXUS_IDR_OFFSET);
/* Set up the mode register */
putreg32(MR_VALUE, SAM_CONSOLE_VBASE + SAM_FLEXUS_MR_OFFSET);
/* Configure the console baud. NOTE: Oversampling by 8 is not supported.
* This may limit BAUD rates for lower USART clocks.
*/
putreg32(((SAM_USART_CLOCK + (SAM_CONSOLE_BAUD << 3)) / (SAM_CONSOLE_BAUD << 4)),
SAM_CONSOLE_VBASE + SAM_FLEXUS_BRGR_OFFSET);
/* Enable receiver & transmitter */
putreg32((FLEXUS_CR_RXEN | FLEXUS_CR_TXEN),
SAM_CONSOLE_VBASE + SAM_FLEXUS_CR_OFFSET);
#endif
#ifdef CONFIG_SAMA5_DBGU
/* Initialize the DBGU (might be the serial console) */
sam_dbgu_initialize();
#endif
}
