static void
squidboy(Apic* apic)
{
// iprint("Hello Squidboy\n");
machinit();
mmuinit();
cpuidentify();
cpuidprint();
checkmtrr();
lock(&mprdthilock);
mprdthi |= (1<<apic->apicno)<<24;
unlock(&mprdthilock);
lapicinit(apic);
lapiconline();
syncclock();
timersinit();
fpoff();
lock(&active);
active.machs |= 1<<m->machno;
unlock(&active);
while(!active.thunderbirdsarego)
microdelay(100);
schedinit();
}
void
main(void)
{
memset(edata, 0, (ulong)end-(ulong)edata);
conf.nmach = 1;
machinit();
confinit();
xinit();
trapinit();
mmuinit();
plan9iniinit();
hwintrinit();
clockinit();
timerinit();
console();
quotefmtinstall();
printinit();
cpuidprint();
print("\nPlan 9 from Bell Labs\n");
procinit0();
initseg();
timersinit();
links();
chandevreset();
pageinit();
swapinit();
sharedseginit();
fpsave(&initfp);
initfp.fpscr = 0;
userinit();
schedinit();
}
static void
squidboy(Apic* apic)
{
// iprint("Hello Squidboy\n");
machinit();
fpsavealloc();
mmuinit();
cpuidentify();
cpuidprint();
checkmtrr();
apic->online = 1;
coherence();
lapicinit(apic);
lapiconline();
syncclock();
timersinit();
fpoff();
lock(&active);
active.machs |= 1<<m->machno;
unlock(&active);
while(!active.thunderbirdsarego)
microdelay(100);
schedinit();
}
void
main(void)
{
cgapost(0);
mach0init();
options();
ioinit();
i8250console();
quotefmtinstall();
screeninit();
print("\nPlan 9\n");
trapinit0();
mmuinit0();
kbdinit();
i8253init();
cpuidentify();
meminit();
confinit();
archinit();
if(!isa20on())
panic("bootstrap didn't leave a20 address line enabled");
xinit();
if(i8237alloc != nil)
i8237alloc();
trapinit();
printinit();
cpuidprint();
mmuinit();
fpsavealloc();
if(arch->intrinit) /* launches other processors on an mp */
arch->intrinit();
timersinit();
mathinit();
kbdenable();
if(arch->clockenable)
arch->clockenable();
procinit0();
initseg();
if(delaylink){
bootlinks();
pcimatch(0, 0, 0);
}else
links();
conf.monitor = 1;
chandevreset();
cgapost(0xcd);
pageinit();
i8253link();
swapinit();
userinit();
active.thunderbirdsarego = 1;
cgapost(0x99);
schedinit();
}
void
main(void)
{
extern char edata[], end[];
uint rev;
okay(1);
m = (Mach*)MACHADDR;
memset(edata, 0, end - edata); /* clear bss */
machinit();
mmuinit1();
optionsinit("/boot/boot boot");
quotefmtinstall();
ataginit((Atag*)BOOTARGS);
confinit(); /* figures out amount of memory */
xinit();
uartconsinit();
screeninit();
print("\nPlan 9 from Bell Labs\n");
rev = getfirmware();
print("firmware: rev %d\n", rev);
if(rev < Minfirmrev){
print("Sorry, firmware (start.elf) must be at least rev %d (%s)\n",
Minfirmrev, Minfirmdate);
for(;;)
;
}
trapinit();
clockinit();
printinit();
timersinit();
cpuidprint();
archreset();
procinit0();
initseg();
links();
chandevreset(); /* most devices are discovered here */
pageinit();
swapinit();
userinit();
gpiomeminit();
schedinit();
assert(0); /* shouldn't have returned */
}
void
main(void)
{
machinit();
trapinit();
quotefmtinstall();
confinit();
xinit();
mmuinit();
intrinit();
clockinit();
printinit();
screeninit();
ioinit();
doc("ioinit...");
ns16552install();
poolsizeinit();
doc("ns16552install...");
kbdinit();
doc("kbdinit...");
cacheinit();
doc("cacheinit...");
procinit();
doc("procinit...");
putphys(MID, 0x1F<<16); /* enable arbitration */
links();
doc("links");
chandevreset();
doc("chandevreset...");
print("\nInferno Operating System\n");
print("%s-%s \n\n",VERSION, conffile);
print("JIT Compilation Mode = %d\n",cflag);
userinit();
doc("userinit...");
/* clear pending processor interrupts */
putphys(PROCINTCLR, (~0<<17)|(1<<15));
print("berore schedinit\n");
schedinit();
}
void
main(void)
{
hwrpb = (Hwrpb*)0x10000000;
hwrpb = (Hwrpb*)(KZERO|hwrpb->phys);
arginit();
machinit();
options();
ioinit();
clockinit();
confinit();
archinit();
xinit();
memholes();
if(i8237alloc != nil)
i8237alloc();
mmuinit();
if(arch->coreinit)
arch->coreinit();
trapinit();
screeninit();
printinit();
/* it's now safe to print */
/* dumpopts(); /* DEBUG */
i8250console();
quotefmtinstall();
print("\nPlan 9\n");
cpuidprint();
if(arch->corehello)
arch->corehello();
procinit0();
initseg();
timersinit();
links();
chandevreset();
pageinit();
swapinit();
savefpregs(&initfp);
initfp.fpstatus = 0x68028000;
userinit();
schedinit();
}
void
main(void)
{
machinit();
options();
archinit();
quotefmtinstall();
confinit();
cpminit();
xinit();
poolsizeinit();
trapinit();
mmuinit();
printinit();
uartinstall();
serialconsole();
doc("screeninit");
screeninit();
doc("kbdinit");
kbdinit();
doc("clockinit");
clockinit();
doc("procinit");
procinit();
cpuidprint();
doc("links");
links();
doc("chandevreset");
chandevreset();
eve = strdup("inferno");
print("\nInferno %s\n", VERSION);
print("Vita Nuova\n");
print("conf %s (%lud) jit %d\n\n",conffile, kerndate, cflag);
doc("userinit");
userinit();
doc("schedinit");
schedinit();
}
void
main(void)
{
mmuinvalidate();
/* zero out bss */
memset(edata, 0, end-edata);
/* point to Mach structure */
m = (Mach*)MACHADDR;
memset(m, 0, sizeof(Mach));
m->ticks = 1;
active.machs = 1;
rs232power(1);
quotefmtinstall();
iprint("\nPlan 9 bitsy kernel\n");
confinit();
xinit();
mmuinit();
machinit();
trapinit();
sa1110_uartsetup(1);
dmainit();
screeninit();
printinit(); /* from here on, print works, before this we need iprint */
clockinit();
procinit0();
initseg();
links();
chandevreset();
pageinit();
swapinit();
userinit();
powerinit();
schedinit();
}
/*
* called on a cpu other than 0 from cpureset in l.s,
* from _vrst in lexception.s.
* mmu and l1 (and system-wide l2) caches and coherency (smpon) are on,
* but interrupts are disabled.
* our mmu is using an exact copy of cpu0's l1 page table
* as it was after userinit ran.
*/
void
cpustart(void)
{
int ms;
ulong *evp;
Power *pwr;
up = nil;
if (active.machs & (1<<m->machno)) {
serialputc('?');
serialputc('r');
panic("cpu%d: resetting after start", m->machno);
}
assert(m->machno != 0);
errata();
cortexa9cachecfg();
memdiag(&testmem);
machinit(); /* bumps nmach, adds bit to machs */
machoff(m->machno); /* not ready to go yet */
/* clock signals and scu are system-wide and already on */
clockshutdown(); /* kill any watch-dog timer */
trapinit();
clockinit(); /* sets loop delay */
timersinit();
cpuidprint();
/*
* notify cpu0 that we're up so it can proceed to l1diag.
*/
evp = (ulong *)soc.exceptvec; /* magic */
*evp = m->machno;
coherence();
l1diag(); /* contend with other cpus to verify sanity */
/*
* pwr->noiopwr == 0
* pwr->detect == 0x1ff (default, all disabled)
*/
pwr = (Power *)soc.power;
assert(pwr->gatests == MASK(7)); /* everything has power */
/*
* 8169 has to initialise before we get past this, thus cpu0
* has to schedule processes first.
*/
if (Debug)
iprint("cpu%d: waiting for 8169\n", m->machno);
for (ms = 0; !l1ptstable.word && ms < 5000; ms += 10) {
delay(10);
cachedinvse(&l1ptstable.word, sizeof l1ptstable.word);
}
if (!l1ptstable.word)
iprint("cpu%d: 8169 unreasonably slow; proceeding\n", m->machno);
/* now safe to copy cpu0's l1 pt in mmuinit */
mmuinit(); /* update our l1 pt from cpu0's */
fpon();
machon(m->machno); /* now ready to go and be scheduled */
if (Debug)
iprint("cpu%d: scheding\n", m->machno);
schedinit();
panic("cpu%d: schedinit returned", m->machno);
}
/*
* entered from l.s with mmu enabled.
*
* we may have to realign the data segment; apparently 5l -H0 -R4096
* does not pad the text segment. on the other hand, we may have been
* loaded by another kernel.
*
* be careful not to touch the data segment until we know it's aligned.
*/
void
main(Mach* mach)
{
extern char bdata[], edata[], end[], etext[];
static ulong vfy = 0xcafebabe;
m = mach;
if (vfy != 0xcafebabe)
memmove(bdata, etext, edata - bdata);
if (vfy != 0xcafebabe) {
wave('?');
panic("misaligned data segment");
}
memset(edata, 0, end - edata); /* zero bss */
vfy = 0;
wave('9');
machinit();
archreset();
mmuinit();
optionsinit("/boot/boot boot");
quotefmtinstall();
archconsole();
wave(' ');
/* want plan9.ini to be able to affect memory sizing in confinit */
plan9iniinit(); /* before we step on plan9.ini in low memory */
/* set memsize before xinit */
confinit();
/* xinit would print if it could */
xinit();
/*
* Printinit will cause the first malloc call.
* (printinit->qopen->malloc) unless any of the
* above (like clockintr) do an irqenable, which
* will call malloc.
* If the system dies here it's probably due
* to malloc(->xalloc) not being initialised
* correctly, or the data segment is misaligned
* (it's amazing how far you can get with
* things like that completely broken).
*
* (Should be) boilerplate from here on.
*/
trapinit();
clockinit();
printinit();
uartkirkwoodconsole();
/* only now can we print */
print("from Bell Labs\n\n");
#ifdef CRYPTOSANDBOX
print("sandbox: 64K at physical %#lux, mapped to 0xf10b0000\n",
PADDR((uintptr)sandbox & ~(BY2PG-1)));
#endif
archconfinit();
cpuidprint();
timersinit();
procinit0();
initseg();
links();
chandevreset(); /* most devices are discovered here */
spiprobe();
pageinit();
swapinit();
userinit();
schedinit();
panic("schedinit returned");
}
void
main(void)
{
// int i;
extern char bdata[], edata[], end[], etext[];
static ulong vfy = 0xcafebabe;
/* l.s has already printed "Plan 9 from Be" */
// m = mach; /* now done in l.s */
/* realign data seg; apparently -H0 -R4096 does not pad the text seg */
if (vfy != 0xcafebabe) {
// wave('<'); wave('-');
memmove(bdata, etext, edata - bdata);
}
/*
* once data segment is in place, always zero bss since we may
* have been loaded by another Plan 9 kernel.
*/
memset(edata, 0, end - edata); /* zero BSS */
cacheuwbinv();
l2cacheuwbinv();
if (vfy != 0xcafebabe)
panic("data segment misaligned");
vfy = 0;
wave('l');
machinit();
mmuinit();
optionsinit("/boot/boot boot");
quotefmtinstall();
/* want plan9.ini to be able to affect memory sizing in confinit */
plan9iniinit(); /* before we step on plan9.ini in low memory */
trapinit(); /* so confinit can probe memory to size it */
confinit(); /* figures out amount of memory */
/* xinit prints (if it can), so finish up the banner here. */
delay(500);
iprint("l Labs\n\n");
delay(500);
xinit();
mainmem->flags |= POOL_ANTAGONISM /* | POOL_PARANOIA */ ;
/*
* Printinit will cause the first malloc call.
* (printinit->qopen->malloc) unless any of the
* above (like clockinit) do an irqenable, which
* will call malloc.
* If the system dies here it's probably due
* to malloc(->xalloc) not being initialised
* correctly, or the data segment is misaligned
* (it's amazing how far you can get with
* things like that completely broken).
*
* (Should be) boilerplate from here on.
*/
archreset(); /* configure clock signals */
clockinit(); /* start clocks */
timersinit();
watchdoginit();
delay(250); /* let uart catch up */
printinit();
// kbdenable();
cpuidprint();
// chkmissing();
procinit0();
initseg();
dmainit();
links();
conf.monitor = 1;
screeninit();
chandevreset(); /* most devices are discovered here */
// i8250console(); /* too early; see init0 */
pageinit();
swapinit();
userinit();
schedinit();
}
/*
* at entry, l.s has set m for cpu0 and printed "Plan 9 from Be"
* but has not zeroed bss.
*/
void
main(void)
{
int cpu;
static ulong vfy = 0xcafebabe;
up = nil;
if (vfy != 0xcafebabe) {
serialputc('?');
serialputc('d');
panic("data segment misaligned");
}
memset(edata, 0, end - edata);
/*
* we can't lock until smpon has run, but we're supposed to wait
* until l1 & l2 are on. too bad. l1 is on, l2 will soon be.
*/
smpon();
iprint("ll Labs ");
cacheinit();
/*
* data segment is aligned, bss is zeroed, caches' characteristics
* are known. begin initialisation.
*/
mach0init();
l2pageinit();
mmuinit();
optionsinit("/boot/boot boot");
quotefmtinstall();
/* want plan9.ini to be able to affect memory sizing in confinit */
plan9iniinit(); /* before we step on plan9.ini in low memory */
/* l2 looks for *l2off= in plan9.ini */
l2cache->on(); /* l2->on requires locks to work, thus smpon */
l2cache->info(&cachel[2]);
allcache->on();
cortexa9cachecfg();
trapinit(); /* so confinit can probe memory to size it */
confinit(); /* figures out amount of memory */
/* xinit prints (if it can), so finish up the banner here. */
delay(100);
navailcpus = getncpus();
iprint("(mp arm; %d cpus)\n\n", navailcpus);
delay(100);
for (cpu = 1; cpu < navailcpus; cpu++)
stopcpu(cpu);
xinit();
irqtooearly = 0; /* now that xinit and trapinit have run */
mainmem->flags |= POOL_ANTAGONISM /* | POOL_PARANOIA */ ;
/*
* Printinit will cause the first malloc call.
* (printinit->qopen->malloc) unless any of the
* above (like clockinit) do an irqenable, which
* will call malloc.
* If the system dies here it's probably due
* to malloc(->xalloc) not being initialised
* correctly, or the data segment is misaligned
* (it's amazing how far you can get with
* things like that completely broken).
*
* (Should be) boilerplate from here on.
*/
archreset(); /* cfg clock signals, print cache cfg */
clockinit(); /* start clocks */
timersinit();
delay(50); /* let uart catch up */
printinit();
kbdenable();
cpuidprint();
chkmissing();
procinit0();
initseg();
// dmainit();
links();
conf.monitor = 1;
// screeninit();
iprint("pcireset...");
pcireset(); /* this tends to hang after a reboot */
iprint("ok\n");
chandevreset(); /* most devices are discovered here */
// i8250console(); /* too early; see init0 */
pageinit(); /* prints "1020M memory: ⋯ */
swapinit();
userinit();
/*
* starting a cpu will eventually result in it calling schedinit,
* so everything necessary to run user processes should be set up
* before starting secondary cpus.
*/
launchinit();
/* SMP & FW are already on when we get here; u-boot set them? */
for (cpu = 1; cpu < navailcpus; cpu++)
if (startcpu(cpu) < 0)
panic("cpu%d didn't start", cpu);
l1diag();
schedinit();
panic("cpu%d: schedinit returned", m->machno);
}
void
main(void)
{
Proc *savup;
static ulong vfy = Datamagic;
static char novga[] = "\nno vga; serial console only\n";
savup = up;
up = nil;
/* m has been set by l32v.s */
/*
* disable address wraps at 1MB boundaries.
* if we're 9boot, ldecomp.s already did this.
*/
a20init();
mach0init();
// options(); /* we don't get options passed to us */
ioinit();
/* we later call i8250console after plan9.ini has been read */
i8250config("0"); /* configure serial port 0 with defaults */
quotefmtinstall();
fmtinstall('i', eipfmt);
fmtinstall('I', eipfmt);
fmtinstall('E', eipfmt);
fmtinstall('V', eipfmt);
fmtinstall('M', eipfmt);
screeninit(); /* cga setup */
cgapost(0xc);
trapinit0();
mmuinit0();
kbdinit();
i8253init();
cpuidentify();
readlsconf();
meminit();
confinit();
archinit();
xinit();
if(i8237alloc != nil)
i8237alloc(); /* dma (for floppy) init */
trapinit();
printinit();
sanity();
cgapost(1);
/*
* soekris servers have no built-in video but each has a serial port.
* they must see serial output, if any, before cga output because
* otherwise the soekris bios will translate cga output to serial
* output, which will garble serial console output.
*/
pcimatch(nil, 0, 0); /* force scan of pci table */
if (!pcivga) {
screenputs = nil;
uartputs(novga, sizeof novga - 1);
}
print(" %s\n\n", hellomsg);
if (vfy != Datamagic)
panic("data segment incorrectly aligned or loaded");
if (savup)
print("up was non-nil (%#p) upon entry to main; bss wasn't zeroed!\n",
savup);
// xsummary();
cpuidprint();
mmuinit();
if(arch->intrinit) /* launches other processors on an mp */
arch->intrinit();
timersinit();
mathinit();
kbdenable();
/*
* 9loadusb runs much faster if we don't use the clock.
* perhaps we're competing with the bios for the use of it?
*/
if(!noclock && arch->clockenable)
arch->clockenable();
procinit0();
initseg();
if(delaylink){
bootlinks();
pcimatch(0, 0, 0);
}else
links();
conf.monitor = 1;
cgapost(0xcd);
chandevreset();
cgapost(2);
pageinit(); /* must follow xinit, and conf.mem must be populated */
i8253link();
userinit();
active.thunderbirdsarego = 1;
cgapost(0xb0);
schedinit();
}
void
main(void)
{
int machno;
/* entry to main pushed stuff onto the stack. */
// memset(edata, 0, (ulong)end-(ulong)edata);
machno = getpir();
if (machno > 0)
startcpu(machno);
// dcrcompile();
if (dverify != 0x01020304) {
uartlputs("data segment not initialised\n");
panic("data segment not initialised");
}
if (bverify != 0) {
uartlputs("bss segment not zeroed\n");
panic("bss segment not zeroed");
}
mach0init();
archreset();
quotefmtinstall();
optionsinit("/boot/boot boot");
// archconsole();
meminit();
confinit();
mmuinit();
xinit(); /* xinit would print if it could */
trapinit();
qtminit();
ioinit();
uncinit();
printinit();
uartliteconsole();
mainmem->flags |= POOL_ANTAGONISM;
mainmem->panic = mypanic;
ethermedium.maxtu = 1512; /* must be multiple of 4 for temac's dma */
// print("\n\nPlan 9k H\n"); /* already printed by l.s */
plan9iniinit();
timersinit();
clockinit();
dma0init(); /* does not start kprocs; see init0 */
fpuinit();
procinit0();
initseg();
links();
chandevreset();
okprint = 1; /* only now can we print */
barriers();
dcflush((uintptr)&okprint, sizeof okprint);
cpuidprint();
print("%d Hz clock", HZ);
print("; memory size %,ud (%#ux)\n", (uint)memsz, (uint)memsz);
pageinit();
swapinit();
userinit();
active.thunderbirdsarego = 1;
dcflush((uintptr)&active.thunderbirdsarego,
sizeof active.thunderbirdsarego);
schedinit();
/* no return */
panic("schedinit returned");
}
void
squidboy(int apicno, Mach *m)
{
// FIX QEMU. extern int64_t hz;
int64_t hz;
sys->machptr[m->machno] = m;
/*
* Need something for initial delays
* until a timebase is worked out.
*/
m->cpuhz = 2000000000ll;
m->cpumhz = 2000;
m->perf.period = 1;
m->nixtype = NIXAC;
// no NIXAC for now.
m->nixtype = NIXTC;
// NOTE: you can't do ANYTHING here before vsvminit.
// PRINT WILL PANIC. So wait.
vsvminit(MACHSTKSZ, m->nixtype, m);
//DBG("Hello squidboy %d %d\n", apicno, m->machno);
/*
* Beware the Curse of The Non-Interruptable Were-Temporary.
*/
hz = archhz();
/* Intel cpu's in archk10 must be reviewed */
if(hz == 0)
hz = 2000000000ll;
m->cpuhz = hz;
m->cyclefreq = hz;
m->cpumhz = hz/1000000ll;
mmuinit();
if(!apiconline())
ndnr();
fpuinit();
acmodeset(m->nixtype);
m->splpc = 0;
m->online = 1;
/*
* CAUTION: no time sync done, etc.
* Stupid print to avoid up = nil or
* last cpu couldn't start in nixquids.
*/
DBG("Wait for the thunderbirds!\n");
while(!active.thunderbirdsarego)
;
wrmsr(0x10, sys->epoch);
m->rdtsc = rdtsc();
print("cpu%d color %d role %s tsc %lld\n",
m->machno, corecolor(m->machno), rolename[m->nixtype], m->rdtsc);
switch(m->nixtype){
case NIXAC:
acmmuswitch();
acinit();
adec(&active.nbooting);
ainc(&active.nonline); /* this was commented out */
acsched();
panic("squidboy");
break;
case NIXTC:
/*
* We only need the idt and syscall entry point actually.
* At boot time the boot processor might set our role after
* we have decided to become an AC.
*/
vsvminit(MACHSTKSZ, NIXTC, m);
/*
* Enable the timer interrupt.
*/
apictimerenab();
apicpri(0);
timersinit();
adec(&active.nbooting);
ainc(&active.nonline);
/* Ready? steady? going to timer */
ndnr();
schedinit();
break;
}
panic("squidboy returns (type %d)", m->nixtype);
}
void
main(u32int ax, u32int bx)
{
vlong hz;
memset(edata, 0, end - edata);
/*
* ilock via i8250enable via i8250console
* needs m->machno, sys->machptr[] set, and
* also 'up' set to nil.
*/
cgapost(sizeof(uintptr)*8);
memset(m, 0, sizeof(Mach));
m->machno = 0;
m->online = 1;
m->nixtype = NIXTC;
sys->machptr[m->machno] = &sys->mach;
m->stack = PTR2UINT(sys->machstk);
m->vsvm = sys->vsvmpage;
up = nil;
active.nonline = 1;
active.exiting = 0;
active.nbooting = 0;
asminit();
multiboot(ax, bx, 0);
options(oargc, oargv);
crapoptions();
/*
* Need something for initial delays
* until a timebase is worked out.
*/
m->cpuhz = 2000000000ll;
m->cpumhz = 2000;
cgainit();
i8250console("0");
consputs = cgaconsputs;
vsvminit(MACHSTKSZ, NIXTC);
conf.nmach = 1;
fmtinit();
print("\nNIX\n");
if(vflag){
print("&ax = %#p, ax = %#ux, bx = %#ux\n", &ax, ax, bx);
multiboot(ax, bx, vflag);
}
m->perf.period = 1;
if((hz = archhz()) != 0ll){
m->cpuhz = hz;
m->cyclefreq = hz;
m->cpumhz = hz/1000000ll;
}
/*
* Mmuinit before meminit because it
* flushes the TLB via m->pml4->pa.
*/
mmuinit();
ioinit();
kbdinit();
meminit();
confinit();
archinit();
mallocinit();
/*
* Acpiinit will cause the first malloc
* call to happen.
* If the system dies here it's probably due
* to malloc not being initialised
* correctly, or the data segment is misaligned
* (it's amazing how far you can get with
* things like that completely broken).
*/
acpiinit();
umeminit();
trapinit();
printinit();
/*
* This is necessary with GRUB and QEMU.
* Without it an interrupt can occur at a weird vector,
* because the vector base is likely different, causing
* havoc. Do it before any APIC initialisation.
*/
i8259init(32);
procinit0();
mpsinit(maxcores);
apiconline();
sipi();
timersinit();
kbdenable();
fpuinit();
psinit(conf.nproc);
initimage();
links();
devtabreset();
pageinit();
swapinit();
userinit();
nixsquids();
testiccs();
print("schedinit...\n");
schedinit();
}
void
main(uint32_t mbmagic, uint32_t mbaddress)
{
Mach *m = entrym;
/* when we get here, entrym is set to core0 mach. */
sys->machptr[m->machno] = m;
// Very special case for BSP only. Too many things
// assume this is set.
wrmsr(GSbase, PTR2UINT(&sys->machptr[m->machno]));
if (machp() != m)
panic("m and machp() are different!!\n");
assert(sizeof(Mach) <= PGSZ);
/*
* Check that our data is on the right boundaries.
* This works because the immediate value is in code.
*/
if (x != 0x123456)
panic("Data is not set up correctly\n");
memset(edata, 0, end - edata);
m = (void *) (KZERO + 1048576 + 11*4096);
sys = (void *) (KZERO + 1048576);
/*
* ilock via i8250enable via i8250console
* needs m->machno, sys->machptr[] set, and
* also 'up' set to nil.
*/
cgapost(sizeof(uintptr_t)*8);
memset(m, 0, sizeof(Mach));
m->machno = 0;
m->online = 1;
m->nixtype = NIXTC;
sys->machptr[m->machno] = &sys->mach;
m->stack = PTR2UINT(sys->machstk);
*(uintptr_t*)m->stack = STACKGUARD;
m->vsvm = sys->vsvmpage;
m->externup = (void *)0;
active.nonline = 1;
active.exiting = 0;
active.nbooting = 0;
asminit();
multiboot(mbmagic, mbaddress, 0);
options(oargc, oargv);
/*
* Need something for initial delays
* until a timebase is worked out.
*/
m->cpuhz = 2000000000ll;
m->cpumhz = 2000;
cgainit();
i8250console("0");
consputs = cgaconsputs;
/* It all ends here. */
vsvminit(MACHSTKSZ, NIXTC, m);
if (machp() != m)
panic("After vsvminit, m and machp() are different");
sys->nmach = 1;
fmtinit();
print("\nHarvey\n");
if(vflag){
multiboot(mbmagic, mbaddress, vflag);
}
m->perf.period = 1;
if((hz = archhz()) != 0ll){
m->cpuhz = hz;
m->cyclefreq = hz;
m->cpumhz = hz/1000000ll;
}
//iprint("archhz returns 0x%lld\n", hz);
//iprint("NOTE: if cpuidhz runs too fast, we get die early with a NULL pointer\n");
//iprint("So, until that's fixed, we bring up AP cores slowly. Sorry!\n");
/*
* Mmuinit before meminit because it
* flushes the TLB via m->pml4->pa.
*/
mmuinit();
ioinit();
meminit();
confinit();
archinit();
mallocinit();
/* test malloc. It's easier to find out it's broken here,
* not deep in some call chain.
* See next note.
*
void *v = malloc(1234);
hi("v "); put64((uint64_t)v); hi("\n");
free(v);
hi("free ok\n");
*/
/*
* Acpiinit will cause the first malloc
* call to happen.
* If the system dies here it's probably due
* to malloc not being initialised
* correctly, or the data segment is misaligned
* (it's amazing how far you can get with
* things like that completely broken).
*/
if (0){ acpiinit(); hi(" acpiinit();\n");}
umeminit();
trapinit();
/*
* This is necessary with GRUB and QEMU.
* Without it an interrupt can occur at a weird vector,
* because the vector base is likely different, causing
* havoc. Do it before any APIC initialisation.
*/
i8259init(32);
procinit0();
mpsinit(maxcores);
apiconline();
/* Forcing to single core if desired */
if(!nosmp) {
sipi();
}
teardownidmap(m);
timersinit();
fpuinit();
psinit(conf.nproc);
initimage();
links();
keybinit();
keybenable();
mouseenable();
devtabreset();
pageinit();
swapinit();
userinit();
/* Forcing to single core if desired */
if(!nosmp) {
nixsquids();
testiccs();
}
print("CPU Freq. %dMHz\n", m->cpumhz);
print("schedinit...\n");
schedinit();
}
/*
* This routine gets the scheduling command and takes appropriate action.
* C.f. PBS Administrator's Guide, Section 4.1.
*
* Valid commands are:
* SCH_ERROR ERROR.
* SCH_SCHEDULE_NULL Place holder.
* SCH_SCHEDULE_NEW New job arrived or a non-running job changed state.
* SCH_SCHEDULE_TERM A running job terminated.
* SCH_SCHEDULE_TIME The schedulers time interval expired.
* SCH_SCHEDULE_RECYC One job was started in the last scheduling cycle.
* SCH_SCHEDULE_CMD The server attribute "scheduling" was set to true.
* SCH_CONFIGURE Perform any scheduler [re]configuration.
* SCH_QUIT QUIT
* SCH_RULESET Reread the scheduler rules.
* SCH_SCHEDULE_FIRST First schedule run after server starts.
*/
int
schedule(int cmd)
{
char *id = "schedule";
char *cmdstr = "Error";
/*
* Try to find a text string that describes the command request.
*/
if (cmd >= 0)
cmdstr = (schd_CmdStr[cmd] != NULL) ? schd_CmdStr[cmd] : "Unknown";
(void)sprintf(log_buffer, "Schedule: received cmd %d (%s)", cmd, cmdstr);
log_record(PBSEVENT_SYSTEM, PBS_EVENTCLASS_SERVER, id, log_buffer);
DBPRT(("--------\n%s\n", log_buffer));
/*
* See if a reconfiguration is pending. If so, do it before anything
* starts to look at the structures.
*/
if (schd_sigflags & SCHD_SIGFLAGS_RECONFIG)
{
(void)sprintf(log_buffer, "Reconfiguring due to delivery of SIGHUP.");
log_record(PBSEVENT_SYSTEM, PBS_EVENTCLASS_SERVER, id, log_buffer);
DBPRT(("%s: %s\n", id, log_buffer));
if (schedinit(0, NULL))
{
(void)sprintf(log_buffer,
"%s: FATAL ERROR!!! Configuration failed!!!", id);
log_record(PBSEVENT_SYSTEM, PBS_EVENTCLASS_SERVER, id, log_buffer);
DBPRT(("%s: %s\n", id, log_buffer));
exit(1);
}
/* Turn off the pending reconfiguration flag. */
schd_sigflags &= ~SCHD_SIGFLAGS_RECONFIG;
}
/*
* Assume the scheduler is about to use the current configuration.
* Set the BUSY flag so that reconfiguration will be postponed until
* the scheduler is idle if a SIGHUP is delivered.
*/
schd_sigflags |= SCHD_SIGFLAGS_BUSY;
switch (cmd)
{
/*
* "Null" commands. These cases are quietly ignored.
*/
case SCH_SCHEDULE_NULL: /* Placeholder only. */
case SCH_ERROR: /* Error. */
case SCH_RULESET: /* Re-read scheduler rules. */
(void)sprintf(log_buffer, "command %d ignored.", cmd);
log_record(PBSEVENT_SYSTEM, PBS_EVENTCLASS_SERVER, id, log_buffer);
DBPRT(("%s\n", log_buffer));
break;
/*
* These commands cause the scheduler to perform its scheduling cycle.
*/
case SCH_SCHEDULE_FIRST: /* 1st schedule run after server starts. */
case SCH_SCHEDULE_CMD: /* Perform a schedule run now, on command. */
case SCH_SCHEDULE_TERM: /* A running job terminated. */
case SCH_SCHEDULE_NEW: /* A new job has arrived. */
case SCH_SCHEDULE_TIME: /* Scheduler sleep interval reached. */
case SCH_SCHEDULE_RECYC: /* Recycle scheduler after 1 run. */
if (!schd_req(cmd))
{
schd_cleanup();
DBPRT(("schd_req(%d) returned 0. Calling it again.\n", cmd));
schd_req(cmd);
}
schd_cleanup();
break;
case SCH_CONFIGURE: /* Re-initialize the scheduler. */
(void)sprintf(log_buffer, "[re]configure scheduler");
log_record(PBSEVENT_SYSTEM, PBS_EVENTCLASS_SERVER, id, log_buffer);
DBPRT(("%s\n", log_buffer));
schedinit(0, NULL); /* XXX args not used... for now! */
break;
case SCH_QUIT: /* Exit gracefully. */
(void)sprintf(log_buffer, "Scheduler was asked to quit. Exit.");
log_record(PBSEVENT_SYSTEM, PBS_EVENTCLASS_SERVER, id, log_buffer);
DBPRT(("%s\n", log_buffer));
exit(0);
default:
(void)sprintf(log_buffer, "Schedule command %d unrecognized.", cmd);
log_record(PBSEVENT_SYSTEM, PBS_EVENTCLASS_SERVER, id, log_buffer);
DBPRT(("%s\n", log_buffer));
}
/*
* The scheduling part of the scheduler is now idle. Unset the BUSY
* flag.
*/
schd_sigflags &= ~SCHD_SIGFLAGS_BUSY;
schd_FirstRun = 0;
return (0);
}
void
kinitlong(unsigned long pmemsz)
{
#if (NEWTMR)
uint32_t tmrcnt = 0;
#endif
/* initialise interrupt management */
#if (VBE)
trapinitprot();
#endif
/* initialise virtual memory */
vminitlong((uint64_t *)kernpagemapl4tab);
#if 0
/* FIXME: map possible device memory */
vmmapseg((uint32_t *)&_pagetab, DEVMEMBASE, DEVMEMBASE, 0xffffffffU,
PAGEPRES | PAGEWRITE | PAGENOCACHE);
#endif
// schedinit();
/* zero kernel BSS segment */
kbzero(&_bssvirt, (uint32_t)&_ebssvirt - (uint32_t)&_bssvirt);
/* set kernel I/O permission bitmap to all 1-bits */
kmemset(&kerniomap, 0xff, sizeof(kerniomap));
/* INITIALIZE CONSOLES AND SCREEN */
#if (VBE)
vbeinitscr();
#endif
#if (VBE) && (NEWFONT)
consinit(768 / vbefontw, 1024 / vbefonth);
#elif (VBE)
consinit(768 >> 3, 1024 >> 3);
#endif
/* TODO: use memory map from GRUB? */
// vminitphys((uintptr_t)&_epagetab, pmemsz);
vminitphys((uintptr_t)&_epagetab, pmemsz);
meminit(pmemsz);
tssinit(0);
#if (VBE) && (NEWFONT)
// consinit(768 / vbefontw, 1024 / vbefonth);
#elif (VBE)
consinit(768 >> 3, 1024 >> 3);
#endif
#if (SMBIOS)
smbiosinit();
#endif
#if (PS2DRV)
ps2init();
#endif
#if (VBE) && (PLASMA)
plasmaloop();
#endif
#if (VBE)
vbeprintinfo();
#endif
logoprint();
// vminitphys((uintptr_t)&_ebss, pmemsz - (unsigned long)&_ebss);
/* HID devices */
#if (PCI)
/* initialise PCI bus driver */
pciinit();
#endif
#if (ATA)
/* initialise ATA driver */
atainit();
#endif
#if (SB16)
/* initialise Soundblaster 16 driver */
sb16init();
#endif
#if (ACPI)
/* initialise ACPI subsystem */
acpiinit();
#endif
/* initialise block I/O buffer cache */
if (!bufinit()) {
kprintf("failed to allocate buffer cache\n");
while (1) {
;
}
}
/* allocate unused device regions (in 3.5G..4G) */
// pageaddzone(DEVMEMBASE, &vmshmq, 0xffffffffU - DEVMEMBASE + 1);
#if (SMP) || (APIC)
//#if (SMP)
/* multiprocessor initialisation */
// mpinit();
//#endif
if (mpncpu == 1) {
kprintf("found %ld processor\n", mpncpu);
} else {
kprintf("found %ld processors\n", mpncpu);
}
#if (HPET)
/* initialise high precision event timers */
hpetinit();
#endif
#if (NEWTMR)
tmrcnt = apicinitcpu(0);
#else
apicinitcpu(0);
#endif
#if (IOAPIC)
ioapicinit(0);
#endif
#endif /* SMP || APIC */
#if (SMP)
if (mpmultiproc) {
mpstart();
}
#endif
/* CPU interface */
taskinit();
// tssinit(0);
// machinit();
/* execution environment */
procinit(PROCKERN);
// k_curtask = &k_curproc->task;
// sysinit();
kprintf("DMA buffers (%ul x %ul kilobytes) @ 0x%p\n",
DMANCHAN, DMACHANBUFSIZE >> 10, DMABUFBASE);
kprintf("VM page tables @ 0x%p\n", (unsigned long)&_pagetab);
// kprintf("%ld kilobytes physical memory\n", pmemsz >> 10);
kprintf("%ld kilobytes kernel memory\n", (uint32_t)&_ebss >> 10);
kprintf("%ld kilobytes allocated physical memory (%ld wired, %ld total)\n",
(vmpagestat.nwired + vmpagestat.nmapped + vmpagestat.nbuf) << (PAGESIZELOG2 - 10),
vmpagestat.nwired << (PAGESIZELOG2 - 10),
vmpagestat.nphys << (PAGESIZELOG2 - 10));
k_curcpu = &cputab[0];
cpuinit(k_curcpu);
schedinit();
#if (APIC)
apicstarttmr(tmrcnt);
#else
pitinit();
#endif
schedloop();
/* NOTREACHED */
}
void
main() {
uint j=0,i=0,k=0;
uint rev;
ulong pc;
pc = getpc();
pl011_addr((void *)pc, 1);
pl011_puts("Entered main() at ");
pl011_addr(&main, 0);
pl011_puts(" with SP=");
pl011_addr((void *)getsp(), 0);
pl011_puts(" with SC=");
pl011_addr((void *)getsc(), 0);
pl011_puts(" with CPSR=");
pl011_addr((void *)getcpsr(), 0);
pl011_puts(" with SPSR=");
pl011_addr((void *)getspsr(), 1);
pl011_puts("Clearing Mach: ");
memset(m, 0, sizeof(Mach));
pl011_addr((char *)m, 0); pl011_puts("-");
pl011_addr((char *)(m+1), 1);
pl011_puts("Clearing edata: ");
memset(edata, 0, end-edata);
pl011_addr((char *)&edata, 0); pl011_puts("-");
pl011_addr((char *)&end, 1);
conf.nmach = 1;
quotefmtinstall();
confinit();
mmuinit1();
xinit();
poolinit();
poolsizeinit();
//uartconsinit();
screeninit();
trapinit();
timersinit();
clockinit();
printinit();
swcursorinit();
rev = getfirmware();
print("\nARM %ld MHz id %8.8lux firmware: rev %d, mem: %ld\n"
,(m->cpuhz+500000)/1000000, getcpuid(), rev, conf.topofmem/MB);
print("Inferno OS %s Vita Nuova\n", VERSION);
print("Ported to Raspberry Pi (BCM2835) by LynxLine\n\n");
procinit();
links();
chandevreset();
eve = strdup("inferno");
userinit();
schedinit();
pl011_puts("to inifinite loop\n\n");
for (;;);
}
void
squidboy(int apicno)
{
char *n[] = {
[NIXAC] "AC",
[NIXTC] "TC",
[NIXKC] "KC"
};
vlong hz;
sys->machptr[m->machno] = m;
setmachsched(m);
/*
* Need something for initial delays
* until a timebase is worked out.
*/
m->cpuhz = 2000000000ll;
m->cpumhz = 2000;
m->perf.period = 1;
m->nixtype = NIXAC;
DBG("Hello Squidboy %d %d\n", apicno, m->machno);
vsvminit(MACHSTKSZ, m->nixtype);
/*
* Beware the Curse of The Non-Interruptable Were-Temporary.
*/
hz = archhz();
if(hz == 0)
ndnr();
m->cpuhz = hz;
m->cyclefreq = hz;
m->cpumhz = hz/1000000ll;
mmuinit();
if(!apiconline())
ndnr();
fpuinit();
acmodeset(m->nixtype);
m->splpc = 0;
m->online = 1;
/*
* CAUTION: no time sync done, etc.
*/
DBG("Wait for the thunderbirds!\n");
while(!active.thunderbirdsarego)
;
wrmsr(0x10, sys->epoch);
m->rdtsc = rdtsc();
print("cpu%d color %d role %s tsc %lld\n",
m->machno, corecolor(m->machno), n[m->nixtype], m->rdtsc);
switch(m->nixtype){
case NIXAC:
acmmuswitch();
acinit();
adec(&active.nbooting);
ainc(&active.nonline); /* this was commented out */
acsched();
panic("squidboy");
break;
case NIXTC:
/*
* We only need the idt and syscall entry point actually.
* At boot time the boot processor might set our role after
* we have decided to become an AC.
*/
vsvminit(MACHSTKSZ, NIXTC);
/*
* Enable the timer interrupt.
*/
apicpri(0);
timersinit();
adec(&active.nbooting);
ainc(&active.nonline); /* this was commented out */
schedinit();
break;
}
panic("squidboy returns (type %d)", m->nixtype);
}
int main(
int argc,
char *argv[])
{
char *id = "main";
struct hostent *hp;
int go, c, errflg = 0;
int lockfds;
int t = 1;
pid_t pid;
char host[100];
char *homedir = PBS_SERVER_HOME;
unsigned int port;
char *dbfile = "sched_out";
struct sigaction act;
sigset_t oldsigs;
caddr_t curr_brk = 0;
caddr_t next_brk;
extern char *optarg;
extern int optind, opterr;
extern int rpp_fd;
fd_set fdset;
int schedinit(int argc, char **argv);
int schedule(int com, int connector);
glob_argv = argv;
alarm_time = 180;
/* The following is code to reduce security risks */
/* move this to a place where nss_ldap doesn't hold a socket yet */
c = sysconf(_SC_OPEN_MAX);
while (--c > 2)
(void)close(c); /* close any file desc left open by parent */
port = get_svrport(PBS_SCHEDULER_SERVICE_NAME, "tcp",
PBS_SCHEDULER_SERVICE_PORT);
pbs_rm_port = get_svrport(PBS_MANAGER_SERVICE_NAME, "tcp",
PBS_MANAGER_SERVICE_PORT);
strcpy(pbs_current_user, "Scheduler");
msg_daemonname = strdup("pbs_sched");
opterr = 0;
while ((c = getopt(argc, argv, "L:S:R:d:p:c:a:-:")) != EOF)
{
switch (c)
{
case '-':
if ((optarg == NULL) || (optarg[0] == '\0'))
{
errflg = 1;
}
if (!strcmp(optarg, "version"))
{
fprintf(stderr, "version: %s\n", PACKAGE_VERSION);
exit(0);
}
else
{
errflg = 1;
}
break;
case 'L':
logfile = optarg;
break;
case 'S':
port = atoi(optarg);
if (port == 0)
{
fprintf(stderr,
"%s: illegal port\n", optarg);
errflg = 1;
}
break;
case 'R':
if ((pbs_rm_port = atoi(optarg)) == 0)
{
(void)fprintf(stderr, "%s: bad -R %s\n",
argv[0], optarg);
return 1;
}
break;
case 'd':
homedir = optarg;
break;
case 'p':
dbfile = optarg;
break;
case 'c':
configfile = optarg;
break;
case 'a':
alarm_time = atoi(optarg);
if (alarm_time == 0)
{
fprintf(stderr,
"%s: bad alarm time\n", optarg);
errflg = 1;
}
break;
case '?':
errflg = 1;
break;
}
}
if (errflg)
{
fprintf(stderr, "usage: %s %s\n", argv[0], usage);
exit(1);
}
#ifndef DEBUG
if (IamRoot() == 0)
{
return (1);
}
#endif /* DEBUG */
/* Save the original working directory for "restart" */
if ((oldpath = getcwd((char *)NULL, MAXPATHLEN)) == NULL)
{
fprintf(stderr, "cannot get current working directory\n");
exit(1);
}
(void)sprintf(log_buffer, "%s/sched_priv", homedir);
#if !defined(DEBUG) && !defined(NO_SECURITY_CHECK)
c = chk_file_sec(log_buffer, 1, 0, S_IWGRP | S_IWOTH, 1, NULL);
c |= chk_file_sec(PBS_ENVIRON, 0, 0, S_IWGRP | S_IWOTH, 0, NULL);
if (c != 0) exit(1);
#endif /* not DEBUG and not NO_SECURITY_CHECK */
if (chdir(log_buffer) == -1)
{
perror("chdir");
exit(1);
}
(void)sprintf(path_log, "%s/sched_logs", homedir);
(void)sprintf(path_acct, "%s/%s", log_buffer, PBS_ACCT);
/* The following is code to reduce security risks */
/* start out with standard umask, system resource limit infinite */
umask(022);
if (setup_env(PBS_ENVIRON) == -1)
exit(1);
c = getgid();
(void)setgroups(1, (gid_t *)&c); /* secure suppl. groups */
#ifndef DEBUG
#ifdef _CRAY
(void)limit(C_JOB, 0, L_CPROC, 0);
(void)limit(C_JOB, 0, L_CPU, 0);
(void)limit(C_JOBPROCS, 0, L_CPU, 0);
(void)limit(C_PROC, 0, L_FD, 255);
(void)limit(C_JOB, 0, L_FSBLK, 0);
(void)limit(C_JOBPROCS, 0, L_FSBLK, 0);
(void)limit(C_JOB, 0, L_MEM , 0);
(void)limit(C_JOBPROCS, 0, L_MEM , 0);
#else /* not _CRAY */
{
struct rlimit rlimit;
rlimit.rlim_cur = RLIM_INFINITY;
rlimit.rlim_max = RLIM_INFINITY;
(void)setrlimit(RLIMIT_CPU, &rlimit);
(void)setrlimit(RLIMIT_FSIZE, &rlimit);
(void)setrlimit(RLIMIT_DATA, &rlimit);
(void)setrlimit(RLIMIT_STACK, &rlimit);
#ifdef RLIMIT_RSS
(void)setrlimit(RLIMIT_RSS , &rlimit);
#endif /* RLIMIT_RSS */
#ifdef RLIMIT_VMEM
(void)setrlimit(RLIMIT_VMEM , &rlimit);
#endif /* RLIMIT_VMEM */
}
#endif /* not _CRAY */
#endif /* DEBUG */
if (log_open(logfile, path_log) == -1)
{
fprintf(stderr, "%s: logfile could not be opened\n", argv[0]);
exit(1);
}
if (gethostname(host, sizeof(host)) == -1)
{
log_err(errno, id, "gethostname");
die(0);
}
if ((hp = gethostbyname(host)) == NULL)
{
log_err(errno, id, "gethostbyname");
die(0);
}
if ((server_sock = socket(AF_INET, SOCK_STREAM, 0)) < 0)
{
log_err(errno, id, "socket");
die(0);
}
if (setsockopt(server_sock, SOL_SOCKET, SO_REUSEADDR,
(char *)&t, sizeof(t)) == -1)
{
log_err(errno, id, "setsockopt");
die(0);
}
saddr.sin_family = AF_INET;
saddr.sin_port = htons(port);
memcpy(&saddr.sin_addr, hp->h_addr, hp->h_length);
if (bind(server_sock, (struct sockaddr *)&saddr, sizeof(saddr)) < 0)
{
log_err(errno, id, "bind");
die(0);
}
if (listen(server_sock, 5) < 0)
{
log_err(errno, id, "listen");
die(0);
}
okclients = (pbs_net_t *)calloc(START_CLIENTS, sizeof(pbs_net_t));
addclient("localhost"); /* who has permission to call MOM */
addclient(host);
if (configfile)
{
if (read_config(configfile) != 0)
die(0);
}
lockfds = open("sched.lock", O_CREAT | O_TRUNC | O_WRONLY, 0644);
if (lockfds < 0)
{
log_err(errno, id, "open lock file");
exit(1);
}
lock_out(lockfds, F_WRLCK);
fullresp(0);
if (sigemptyset(&allsigs) == -1)
{
perror("sigemptyset");
exit(1);
}
if (sigprocmask(SIG_SETMASK, &allsigs, NULL) == -1) /* unblock */
{
perror("sigprocmask");
exit(1);
}
act.sa_flags = 0;
sigaddset(&allsigs, SIGHUP); /* remember to block these */
sigaddset(&allsigs, SIGINT); /* during critical sections */
sigaddset(&allsigs, SIGTERM); /* so we don't get confused */
act.sa_mask = allsigs;
act.sa_handler = restart; /* do a restart on SIGHUP */
sigaction(SIGHUP, &act, NULL);
act.sa_handler = toolong; /* handle an alarm call */
sigaction(SIGALRM, &act, NULL);
act.sa_handler = die; /* bite the biscuit for all following */
sigaction(SIGINT, &act, NULL);
sigaction(SIGTERM, &act, NULL);
/*
* Catch these signals to ensure we core dump even if
* our rlimit for core dumps is set to 0 initially.
*
* Chris Samuel - VPAC
* [email protected] - 29th July 2003
*
* Now conditional on the PBSCOREDUMP environment variable
*/
if (getenv("PBSCOREDUMP"))
{
act.sa_handler = catch_abort; /* make sure we core dump */
sigaction(SIGSEGV, &act, NULL);
sigaction(SIGBUS, &act, NULL);
sigaction(SIGFPE, &act, NULL);
sigaction(SIGILL, &act, NULL);
sigaction(SIGTRAP, &act, NULL);
sigaction(SIGSYS, &act, NULL);
}
/*
* Local initialization stuff
*/
if (schedinit(argc, argv))
{
(void) sprintf(log_buffer,
"local initialization failed, terminating");
log_record(PBSEVENT_SYSTEM, PBS_EVENTCLASS_SERVER, id, log_buffer);
exit(1);
}
if (getenv("PBSDEBUG") == NULL)
{
lock_out(lockfds, F_UNLCK);
#ifdef DISABLE_DAEMONS
pid = getpid();
#else
if ((pid = fork()) == -1)
{
/* error on fork */
perror("fork");
exit(1);
}
else
if (pid > 0) /* parent exits */
{
exit(0);
}
if ((pid = setsid()) == -1)
{
perror("setsid");
exit(1);
}
#endif /* DISABLE_DAEMONS */
lock_out(lockfds, F_WRLCK);
if (freopen(dbfile, "a", stdout) == NULL)
{
perror("opening lockfile");
exit(1);
}
setvbuf(stdout, NULL, _IOLBF, 0);
dup2(fileno(stdout), fileno(stderr));
}
else
{
setvbuf(stdout, NULL, _IOLBF, 0);
setvbuf(stderr, NULL, _IOLBF, 0);
pid = getpid();
}
if (freopen("/dev/null", "r", stdin) == NULL)
{
perror("opening /dev/null");
exit(1);
}
/* write scheduler's pid into lockfile */
(void)sprintf(log_buffer, "%ld\n", (long)pid);
if (write(lockfds, log_buffer, strlen(log_buffer) + 1) != (ssize_t)(strlen(log_buffer) + 1))
{
perror("writing to lockfile");
exit(1);
}
#if (PLOCK_DAEMONS & 2)
(void)plock(PROCLOCK); /* lock daemon into memory */
#endif
sprintf(log_buffer, "%s startup pid %ld", argv[0], (long)pid);
log_record(PBSEVENT_SYSTEM, PBS_EVENTCLASS_SERVER, id, log_buffer);
FD_ZERO(&fdset);
for (go = 1;go;)
{
int cmd;
if (rpp_fd != -1)
FD_SET(rpp_fd, &fdset);
FD_SET(server_sock, &fdset);
if (select(FD_SETSIZE, &fdset, NULL, NULL, NULL) == -1)
{
if (errno != EINTR)
{
log_err(errno, id, "select");
die(0);
}
continue;
}
if (rpp_fd != -1 && FD_ISSET(rpp_fd, &fdset))
{
if (rpp_io() == -1)
log_err(errno, id, "rpp_io");
}
if (!FD_ISSET(server_sock, &fdset))
continue;
cmd = server_command();
if (sigprocmask(SIG_BLOCK, &allsigs, &oldsigs) == -1)
log_err(errno, id, "sigprocmaskSIG_BLOCK)");
alarm(alarm_time);
if (schedule(cmd, connector)) /* magic happens here */
go = 0;
alarm(0);
if (connector >= 0 && server_disconnect(connector))
{
log_err(errno, id, "server_disconnect");
die(0);
}
next_brk = (caddr_t)sbrk(0);
if (next_brk > curr_brk)
{
sprintf(log_buffer, "brk point %ld", (long)next_brk);
log_record(PBSEVENT_DEBUG, PBS_EVENTCLASS_SERVER,
id, log_buffer);
curr_brk = next_brk;
}
if (sigprocmask(SIG_SETMASK, &oldsigs, NULL) == -1)
log_err(errno, id, "sigprocmask(SIG_SETMASK)");
}
sprintf(log_buffer, "%s normal finish pid %ld",
argv[0],
(long)pid);
log_record(PBSEVENT_SYSTEM, PBS_EVENTCLASS_SERVER, id, log_buffer);
close(server_sock);
exit(0);
} /* END main() */
