void battery_start(void)
{
uint32_t err_code;
// Configure ADC
NRF_ADC->INTENSET = ADC_INTENSET_END_Msk;
NRF_ADC->CONFIG = (ADC_CONFIG_RES_8bit << ADC_CONFIG_RES_Pos) |
(ADC_CONFIG_INPSEL_SupplyOneThirdPrescaling << ADC_CONFIG_INPSEL_Pos) |
(ADC_CONFIG_REFSEL_VBG << ADC_CONFIG_REFSEL_Pos) |
(ADC_CONFIG_PSEL_Disabled << ADC_CONFIG_PSEL_Pos) |
(ADC_CONFIG_EXTREFSEL_None << ADC_CONFIG_EXTREFSEL_Pos);
NRF_ADC->EVENTS_END = 0;
NRF_ADC->ENABLE = ADC_ENABLE_ENABLE_Enabled;
// Enable ADC interrupt
err_code = sd_nvic_ClearPendingIRQ(ADC_IRQn);
APP_ERROR_CHECK(err_code);
err_code = sd_nvic_SetPriority(ADC_IRQn, NRF_APP_PRIORITY_LOW);
APP_ERROR_CHECK(err_code);
err_code = sd_nvic_EnableIRQ(ADC_IRQn);
APP_ERROR_CHECK(err_code);
NRF_ADC->EVENTS_END = 0; // Stop any running conversions.
NRF_ADC->TASKS_START = 1;
}
uint32_t ble_radio_notification_init(nrf_app_irq_priority_t irq_priority,
nrf_radio_notification_distance_t distance,
ble_radio_notification_evt_handler_t evt_handler)
{
uint32_t err_code;
m_evt_handler = evt_handler;
// Initialize Radio Notification software interrupt
err_code = sd_nvic_ClearPendingIRQ(SWI1_IRQn);
if (err_code != NRF_SUCCESS)
{
return err_code;
}
err_code = sd_nvic_SetPriority(SWI1_IRQn, irq_priority);
if (err_code != NRF_SUCCESS)
{
return err_code;
}
err_code = sd_nvic_EnableIRQ(SWI1_IRQn);
if (err_code != NRF_SUCCESS)
{
return err_code;
}
// Configure the event
return sd_radio_notification_cfg_set(NRF_RADIO_NOTIFICATION_TYPE_INT_ON_BOTH, distance);
}
/**@brief Function for application main entry, does not return.
*
* @details The main function will do all necessary initalization. This includes sdm rx module
* and softdevice.
*/
int main(void)
{
uint32_t err_code;
// In case of logging enabled, we enable sdm_rx module first.
err_code = sdm_rx_init();
APP_ERROR_CHECK(err_code);
// Enable softdevice.
err_code = sd_softdevice_enable(NRF_CLOCK_LFCLKSRC_XTAL_50_PPM, softdevice_assert_callback);
APP_ERROR_CHECK(err_code);
// Set application IRQ to lowest priority.
err_code = sd_nvic_SetPriority(PROTOCOL_EVENT_IRQn, NRF_APP_PRIORITY_LOW);
APP_ERROR_CHECK(err_code);
// Enable application IRQ (triggered from protocol).
err_code = sd_nvic_EnableIRQ(PROTOCOL_EVENT_IRQn);
APP_ERROR_CHECK(err_code);
// Setup Channel_0 as a SDM RX.
ant_channel_sdm_rx_setup();
sdm_main_loop();
}
void proprietary_rf_init(void)
{
uint32_t err_code;
m_uesb_config.rf_channel = 64;
m_uesb_config.crc = UESB_CRC_16BIT;
m_uesb_config.payload_length = 10;
m_uesb_config.protocol = UESB_PROTOCOL_SB;
m_uesb_config.bitrate = UESB_BITRATE_250KBPS;
m_uesb_config.mode = UESB_MODE_PTX;
m_uesb_config.rf_addr_length = 5;
m_uesb_config.tx_output_power = UESB_TX_POWER_4DBM;
m_uesb_config.dynamic_ack_enabled = 0;
m_uesb_config.dynamic_payload_length_enabled = 0;
m_uesb_config.rx_pipes_enabled = 0x01;
m_uesb_config.retransmit_delay = 3750;
m_uesb_config.retransmit_count = 0;
m_uesb_config.event_handler = uesb_event_handler;
m_uesb_config.radio_irq_priority = 0;
m_tx_payload.pipe = FIXED_PIPE_INDEX;
// The radio timeslot API will use the QDEC interrupt because that is rarely used.
err_code = sd_nvic_ClearPendingIRQ(QDEC_IRQn);
APP_ERROR_CHECK(err_code);
err_code = sd_nvic_SetPriority(QDEC_IRQn, NRF_APP_PRIORITY_HIGH);
APP_ERROR_CHECK(err_code);
err_code = sd_nvic_EnableIRQ(QDEC_IRQn);
APP_ERROR_CHECK(err_code);
syma_init();
}
void
protocol_init(struct ir_protocol *protocol, uint8_t led_pin, struct rtc_ctx *c)
{
ctx = c;
context.protocol = protocol;
context.led_pin = led_pin;
// low freq clock
NRF_CLOCK->LFCLKSRC = (CLOCK_LFCLKSRC_SRC_Xtal << CLOCK_LFCLKSRC_SRC_Pos);
NRF_CLOCK->EVENTS_LFCLKSTARTED = 0;
NRF_CLOCK->TASKS_LFCLKSTART = 1;
while (NRF_CLOCK->EVENTS_LFCLKSTARTED == 0)
/* NOTHING */;
NRF_CLOCK->EVENTS_LFCLKSTARTED = 0;
// rtc1 interrupt
sd_nvic_ClearPendingIRQ(RTC1_IRQn);
sd_nvic_SetPriority(RTC1_IRQn, NRF_APP_PRIORITY_LOW);
sd_nvic_EnableIRQ(RTC1_IRQn);
NRF_RTC1->EVTENSET = RTC_EVTENSET_COMPARE0_Msk;
NRF_RTC1->INTENSET = RTC_INTENSET_COMPARE0_Msk;
// high freq clock
sd_clock_hfclk_request();
// timer1
NRF_TIMER1->TASKS_STOP = 1;
NRF_TIMER1->TASKS_CLEAR = 1;
NRF_TIMER1->PRESCALER = 4;
NRF_TIMER1->MODE = TIMER_MODE_MODE_Timer;
NRF_TIMER1->BITMODE = TIMER_BITMODE_BITMODE_16Bit;
NRF_TIMER1->SHORTS = TIMER_SHORTS_COMPARE2_CLEAR_Msk;
NRF_TIMER1->CC[0] = 1;
NRF_TIMER1->CC[1] = ROUNDED_DIV(context.protocol->pulse_width, 3);
NRF_TIMER1->CC[2] = context.protocol->pulse_width;
// timer2 (counter)
NRF_TIMER2->TASKS_STOP = 1;
NRF_TIMER2->TASKS_CLEAR = 1;
NRF_TIMER2->MODE = TIMER_MODE_MODE_Counter;
NRF_TIMER2->BITMODE = TIMER_BITMODE_BITMODE_16Bit;
NRF_TIMER2->TASKS_START = 1;
NRF_TIMER2->SHORTS = TIMER_SHORTS_COMPARE0_CLEAR_Msk;
// gpio (led)
nrf_gpio_cfg_output(led_pin);
// ppi's
sd_ppi_channel_assign(0, &NRF_TIMER1->EVENTS_COMPARE[0], &NRF_GPIOTE->TASKS_OUT[0]); // toggle led
sd_ppi_channel_assign(1, &NRF_TIMER1->EVENTS_COMPARE[1], &NRF_GPIOTE->TASKS_OUT[0]); // toggle led
sd_ppi_channel_assign(2, &NRF_TIMER1->EVENTS_COMPARE[2], &NRF_TIMER2->TASKS_COUNT); // inc timer2
sd_ppi_channel_assign(3, &NRF_TIMER2->EVENTS_COMPARE[0], &NRF_TIMER1->TASKS_STOP); // stops timer1 after timer2 reaches N
sd_ppi_channel_enable_set(PPI_CHEN_CH0_Msk |
PPI_CHEN_CH1_Msk |
PPI_CHEN_CH2_Msk |
PPI_CHEN_CH3_Msk);
}
/**@brief Function for application main entry, does not return.
*
* @details The main function will do all necessary initalization. This includes sdm rx module
* and SoftDevice.
*/
int main(void)
{
uint32_t err_code;
#if defined(TRACE_UART)
app_uart_comm_params_t comm_params =
{
RX_PIN_NUMBER,
TX_PIN_NUMBER,
RTS_PIN_NUMBER,
CTS_PIN_NUMBER,
APP_UART_FLOW_CONTROL_DISABLED,
false,
UART_BAUDRATE_BAUDRATE_Baud38400
};
APP_UART_FIFO_INIT(&comm_params,
UART_RX_BUF_SIZE,
UART_TX_BUF_SIZE,
uart_error_handle,
APP_IRQ_PRIORITY_LOW,
err_code);
APP_ERROR_CHECK(err_code);
#endif // TRACE_UART
#if defined(TRACE_GPIO)
// Initialize timer module.
APP_TIMER_INIT(APP_TIMER_PRESCALER, APP_TIMER_MAX_TIMERS, APP_TIMER_OP_QUEUE_SIZE, false);
err_code = bsp_init(BSP_INIT_LED, APP_TIMER_TICKS(100, APP_TIMER_PRESCALER), NULL);
APP_ERROR_CHECK(err_code);
#endif // TRACE_GPIO
// In case of logging enabled, we enable sdm_rx module first.
err_code = sdm_rx_init();
APP_ERROR_CHECK(err_code);
// Enable SoftDevice.
err_code = sd_softdevice_enable(NRF_CLOCK_LFCLKSRC_XTAL_50_PPM, softdevice_assert_callback);
APP_ERROR_CHECK(err_code);
// Set application IRQ to lowest priority.
err_code = sd_nvic_SetPriority(SD_EVT_IRQn, NRF_APP_PRIORITY_LOW);
APP_ERROR_CHECK(err_code);
// Enable application IRQ (triggered from protocol).
err_code = sd_nvic_EnableIRQ(SD_EVT_IRQn);
APP_ERROR_CHECK(err_code);
err_code = ant_stack_static_config();
APP_ERROR_CHECK(err_code);
// Setup Channel_0 as a SDM RX.
ant_channel_sdm_rx_setup();
sdm_main_loop();
}
/**@brief Function for application main entry. Does not return.
*/
int main(void)
{
// ANT event message buffer.
static ANT_MESSAGE ant_message_buffer;
// Enable SoftDevice.
uint32_t err_code;
#if defined(S212) || defined(S332)
err_code = sd_softdevice_enable(NRF_CLOCK_LFCLKSRC_XTAL_50_PPM,
softdevice_assert_callback,
ANT_LICENSE_KEY);
#else
err_code = sd_softdevice_enable(NRF_CLOCK_LFCLKSRC_XTAL_50_PPM,
softdevice_assert_callback);
#endif
APP_ERROR_CHECK(err_code);
// Set application IRQ to lowest priority.
err_code = sd_nvic_SetPriority(SD_EVT_IRQn, NRF_APP_PRIORITY_LOW);
APP_ERROR_CHECK(err_code);
// Enable application IRQ (triggered from protocol).
err_code = sd_nvic_EnableIRQ(SD_EVT_IRQn);
APP_ERROR_CHECK(err_code);
// Configure ant stack regards used channels.
err_code = ant_stack_static_config();
APP_ERROR_CHECK(err_code);
// Setup channel
ant_channel_tx_broadcast_setup();
uint8_t event;
uint8_t ant_channel;
// Main loop.
for (;;)
{
// Put CPU in sleep if possible.
err_code = sd_app_evt_wait();
APP_ERROR_CHECK(err_code);
// Extract and process all pending ANT events as long as there are any left.
do
{
// Fetch the event.
err_code = sd_ant_event_get(&ant_channel, &event, ant_message_buffer.aucMessage);
if (err_code == NRF_SUCCESS)
{
// Handle event
channel_event_handle(event, &ant_message_buffer);
}
}
while (err_code == NRF_SUCCESS);
}
}
uint32_t nrf_pwm_init(nrf_pwm_config_t *config)
{
static volatile uint32_t err_code;
if(config->num_channels < 1 || config->num_channels > 2) return 0xFFFFFFFF;
switch(config->mode)
{
case PWM_MODE_LED_255: // 8-bit resolution, 122 Hz PWM frequency, 65 kHz timer frequency (prescaler 8)
PWM_TIMER->PRESCALER = 8;
pwm_max_value = 255;
pwm_period_us = (pwm_max_value * 2 * 1000000) / (16000000 / 256);
break;
case PWM_MODE_LED_4095: // 0-4095 resolution, 488Hz PWM frequency, 2MHz timer frequency (prescaler 2)
PWM_TIMER->PRESCALER = 2;
pwm_max_value = 4095;
pwm_period_us = (pwm_max_value * 2 * 1000000) / (16000000 / 4);
break;
default:
return 0xFFFFFFFF;
}
pwm_ppi_chg = config->ppi_group[0];
pwm_num_channels = config->num_channels;
for(int i = 0; i < pwm_num_channels; i++)
{
pwm_io_ch[i] = (uint32_t)config->gpio_num[i];
nrf_gpio_cfg_output(pwm_io_ch[i]);
pwm_gpiote_channel[i] = config->gpiote_channel[i];
}
PWM_TIMER->TASKS_CLEAR = 1;
PWM_TIMER->BITMODE = TIMER_BITMODE_BITMODE_16Bit;
PWM_TIMER->CC[3] = pwm_max_value*2;
PWM_TIMER->MODE = TIMER_MODE_MODE_Timer;
PWM_TIMER->SHORTS = TIMER_SHORTS_COMPARE3_CLEAR_Msk;
PWM_TIMER->EVENTS_COMPARE[0] = PWM_TIMER->EVENTS_COMPARE[1] = PWM_TIMER->EVENTS_COMPARE[2] = PWM_TIMER->EVENTS_COMPARE[3] = 0;
for(int i = 0; i < pwm_num_channels; i++)
{
ppi_configure_channel(config->ppi_channel[i*2], &PWM_TIMER->EVENTS_COMPARE[i], &NRF_GPIOTE->TASKS_OUT[pwm_gpiote_channel[i]]);
ppi_configure_channel(config->ppi_channel[i*2+1], &PWM_TIMER->EVENTS_COMPARE[3], &NRF_GPIOTE->TASKS_OUT[pwm_gpiote_channel[i]]);
}
#if(USE_WITH_SOFTDEVICE == 1)
sd_nvic_SetPriority(PWM_IRQn, 1);
sd_nvic_ClearPendingIRQ(PWM_IRQn);
sd_nvic_EnableIRQ(PWM_IRQn);
#else
NVIC_SetPriority(PWM_IRQn, 3);
NVIC_ClearPendingIRQ(PWM_IRQn);
NVIC_EnableIRQ(PWM_IRQn);
#endif
PWM_TIMER->TASKS_START = 1;
return 0;
}
/**
* Configures INTERRUPT_PIN for input and
* configures GPIOTE to give interrupt on pin change.
*/
static void gpio_init(void){
simple_uart_config(RTS_PIN_NUMBER, TX_PIN_NUMBER, CTS_PIN_NUMBER, RX_PIN_NUMBER, HWFC);
NRF_GPIO->PIN_CNF[INTERRUPT_PIN] = (GPIO_PIN_CNF_SENSE_Low << GPIO_PIN_CNF_SENSE_Pos)
| (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
| (NRF_GPIO_PIN_NOPULL << GPIO_PIN_CNF_PULL_Pos)
| (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
| (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
// Enable interrupt:
NVIC_EnableIRQ(GPIOTE_IRQn);
NRF_GPIOTE->INTENSET = GPIOTE_INTENSET_PORT_Set << GPIOTE_INTENSET_PORT_Pos;
sd_nvic_SetPriority(GPIOTE_IRQn, NRF_APP_PRIORITY_LOW);
}
/**@brief Function for configuring and setting up the SoftDevice.
*/
static __INLINE void softdevice_setup(void)
{
uint32_t err_code = sd_softdevice_enable(NRF_CLOCK_LFCLKSRC_XTAL_50_PPM,
softdevice_assert_callback);
APP_ERROR_CHECK(err_code);
// Configure application-specific interrupts. Set application IRQ to lowest priority and enable
// application IRQ (triggered from ANT protocol stack).
err_code = sd_nvic_SetPriority(SD_EVT_IRQn, NRF_APP_PRIORITY_LOW);
APP_ERROR_CHECK(err_code);
err_code = sd_nvic_EnableIRQ(SD_EVT_IRQn);
APP_ERROR_CHECK(err_code);
}
/**@brief Function for application main entry. Does not return.
*/
int main(void)
{
#if 0
led_init();
led_on(BSP_LED_0);
led_on(BSP_LED_1);
for (;;)
{
}
#endif // 0
uint32_t err_code;
// Configure pins LED_A - LED_D as outputs.
led_init();
// Enable SoftDevice.
err_code = sd_softdevice_enable(NRF_CLOCK_LFCLKSRC_XTAL_50_PPM, softdevice_assert_callback);
APP_ERROR_CHECK(err_code);
// Set application IRQ to lowest priority.
err_code = sd_nvic_SetPriority(SD_EVT_IRQn, NRF_APP_PRIORITY_LOW);
APP_ERROR_CHECK(err_code);
// Enable application IRQ (triggered from protocol).
err_code = sd_nvic_EnableIRQ(SD_EVT_IRQn);
APP_ERROR_CHECK(err_code);
//Initialise and start the one second timer;
init_timer();
//Initialise and start the auto shared channel module
ascs_init(&m_asc_parameters);
ascs_turn_on();
check_and_handle_asc_flags();
// Main loop.
for (;;)
{
// Put CPU in sleep if possible.
err_code = sd_app_evt_wait();
APP_ERROR_CHECK(err_code);
poll_for_ant_events();
check_and_handle_asc_flags();
}
}
bool twi_master_init(twi_init_config_t *init_cfg,twi_config_t *cfg)
{
cfg->twi_operation_complete = true;
cfg->twi_ack_received = true;
/* To secure correct signal levels on the pins used by the TWI
master when the system is in OFF mode, and when the TWI master is
disabled, these pins must be configured in the GPIO peripheral.
*/
NRF_GPIO->PIN_CNF[init_cfg->twi_pinselect_scl] =
(GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
| (GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos)
| (GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos)
| (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
| (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
NRF_GPIO->PIN_CNF[init_cfg->twi_pinselect_sda] =
(GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
| (GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos)
| (GPIO_PIN_CNF_PULL_Pullup << GPIO_PIN_CNF_PULL_Pos)
| (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
| (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
cfg->twi->EVENTS_RXDREADY = 0;
cfg->twi->EVENTS_TXDSENT = 0;
cfg->twi->PSELSCL = init_cfg->twi_pinselect_scl;
cfg->twi->PSELSDA = init_cfg->twi_pinselect_sda;
switch(init_cfg->frequency)
{
case TWI_FREQ_100KHZ:
cfg->twi->FREQUENCY = TWI_FREQUENCY_FREQUENCY_K100 << TWI_FREQUENCY_FREQUENCY_Pos;
break;
case TWI_FREQ_400KHZ:
cfg->twi->FREQUENCY = TWI_FREQUENCY_FREQUENCY_K400 << TWI_FREQUENCY_FREQUENCY_Pos;
break;
}
sd_ppi_channel_assign(cfg->twi_ppi_ch, &cfg->twi->EVENTS_BB, &cfg->twi->TASKS_SUSPEND);
sd_ppi_channel_enable_clr(1 << cfg->twi_ppi_ch);
sd_nvic_SetPriority(init_cfg->twi_interrupt_no, TWI_IRQ_PRIORITY_SD);
sd_nvic_EnableIRQ(init_cfg->twi_interrupt_no);
cfg->twi->INTENSET = TWI_INTENSET_TXDSENT_Msk | TWI_INTENSET_STOPPED_Msk | TWI_INTENSET_ERROR_Msk | TWI_INTENSET_RXDREADY_Msk;
cfg->twi->ENABLE = TWI_ENABLE_ENABLE_Enabled << TWI_ENABLE_ENABLE_Pos;
return twi_master_clear_bus(init_cfg);
}
//Start supercapacitor voltage measurement
void supercap_measure_start(void)
{
// Configure ADC
/* Enable interrupt on ADC sample ready event*/
NRF_ADC->INTENSET = ADC_INTENSET_END_Msk;
sd_nvic_SetPriority(ADC_IRQn, NRF_APP_PRIORITY_LOW);
sd_nvic_EnableIRQ(ADC_IRQn);
NRF_ADC->CONFIG = (ADC_CONFIG_EXTREFSEL_None << ADC_CONFIG_EXTREFSEL_Pos) /* Bits 17..16 : ADC external reference pin selection. */
| (ADC_CONFIG_PSEL_AnalogInput7 << ADC_CONFIG_PSEL_Pos) /*!< Use analog input 2 as analog input. */
| (ADC_CONFIG_REFSEL_VBG << ADC_CONFIG_REFSEL_Pos) /*!< Use internal 1.2V bandgap voltage as reference for conversion. */
| (ADC_CONFIG_INPSEL_AnalogInputNoPrescaling << ADC_CONFIG_INPSEL_Pos) /*!< Analog input specified by PSEL with no prescaling used as input for the conversion. */
| (ADC_CONFIG_RES_8bit << ADC_CONFIG_RES_Pos); /*!< 8bit ADC resolution. */
sd_nvic_ClearPendingIRQ(ADC_IRQn);
NRF_ADC->EVENTS_END = 0;
/* Enable ADC*/
NRF_ADC->ENABLE = ADC_ENABLE_ENABLE_Enabled;
NRF_ADC->TASKS_START = 1;
}
uint32_t ir_lib_init(uint32_t ir_pin)
{
uint32_t err_code = 0;
NRF_GPIOTE->CONFIG[0] = GPIOTE_CONFIG_MODE_Task << GPIOTE_CONFIG_MODE_Pos |
GPIOTE_CONFIG_OUTINIT_Low << GPIOTE_CONFIG_OUTINIT_Pos |
GPIOTE_CONFIG_POLARITY_Toggle << GPIOTE_CONFIG_POLARITY_Pos |
ir_pin << GPIOTE_CONFIG_PSEL_Pos;
// Carrier timer init
IR_TIMER_CARRIER->MODE = TIMER_MODE_MODE_Timer;
IR_TIMER_CARRIER->BITMODE = TIMER_BITMODE_BITMODE_16Bit;
IR_TIMER_CARRIER->PRESCALER = 4;
IR_TIMER_CARRIER->CC[0] = IR_CARRIER_LOW_US;
IR_TIMER_CARRIER->CC[1] = IR_CARRIER_LOW_US + IR_CARRIER_HIGH_US;
IR_TIMER_CARRIER->SHORTS = TIMER_SHORTS_COMPARE1_CLEAR_Msk;
// Modulation timer init
IR_CARRIER_COUNTER->MODE = TIMER_MODE_MODE_Counter;
IR_CARRIER_COUNTER->BITMODE = TIMER_BITMODE_BITMODE_16Bit;
IR_CARRIER_COUNTER->INTENSET = TIMER_INTENSET_COMPARE0_Msk | TIMER_INTENSET_COMPARE1_Msk;
IR_CARRIER_COUNTER->EVENTS_COMPARE[0] = 0;
IR_CARRIER_COUNTER->EVENTS_COMPARE[1] = 0;
err_code |= sd_nvic_SetPriority(IR_CARRIER_COUNTER_IRQn, IR_CARRIER_COUNTER_IRQ_Priority);
err_code |= sd_nvic_EnableIRQ(IR_CARRIER_COUNTER_IRQn);
err_code |= sd_ppi_channel_assign(IR_PPI_CH_A, &IR_TIMER_CARRIER->EVENTS_COMPARE[1], &IR_CARRIER_COUNTER->TASKS_COUNT);
err_code |= sd_ppi_channel_assign(IR_PPI_CH_B, &IR_TIMER_CARRIER->EVENTS_COMPARE[0], &NRF_GPIOTE->TASKS_OUT[0]);
err_code |= sd_ppi_channel_assign(IR_PPI_CH_C, &IR_TIMER_CARRIER->EVENTS_COMPARE[1], &NRF_GPIOTE->TASKS_OUT[0]);
err_code |= sd_ppi_group_assign(IR_PPI_GROUP, 1 << IR_PPI_CH_B | 1 << IR_PPI_CH_C);
err_code |= sd_ppi_group_task_disable(IR_PPI_GROUP);
err_code |= sd_ppi_channel_assign(IR_PPI_CH_D, &IR_CARRIER_COUNTER->EVENTS_COMPARE[0], &NRF_PPI->TASKS_CHG[IR_PPI_GROUP].DIS);
err_code |= sd_ppi_channel_assign(IR_PPI_CH_E, &IR_CARRIER_COUNTER->EVENTS_COMPARE[1], &NRF_PPI->TASKS_CHG[IR_PPI_GROUP].EN);
err_code |= sd_ppi_channel_enable_set(1 << IR_PPI_CH_A | 1 << IR_PPI_CH_B | 1 << IR_PPI_CH_C | 1 << IR_PPI_CH_D | 1 << IR_PPI_CH_E);
m_busy = false;
return err_code;
}
// Initialize newlib
void hardware_init_hook(void) {
// Configure LED-pins as outputs.
LEDS_CONFIGURE(LEDS_MASK);
LEDS_OFF(LEDS_MASK);
// Initialize UART
Driver_UART_DEBUG.Initialize(NULL);
#if defined(__CMSIS_RTOS) && defined(SOFTDEVICE_PRESENT)
// Initialize the SoftDevice handler module.
SOFTDEVICE_HANDLER_INIT(NRF_CLOCK_LFCLKSRC_XTAL_20_PPM, NULL);
// We need to configure the interrupt before starting the kernel as we cannot call an SVC in an SVC Handler
uint32_t err_code = sd_nvic_SetPriority(RTC1_IRQn, NRF_APP_PRIORITY_LOW);
assert(err_code == NRF_SUCCESS);
err_code = sd_nvic_EnableIRQ(RTC1_IRQn);
assert(err_code == NRF_SUCCESS);
#endif
}
/**@brief Function for configuring and setting up the SoftDevice.
*/
static __INLINE void softdevice_setup(void)
{
printf("softdevice_setup\n");
nrf_clock_lf_cfg_t clock_lf_cfg = NRF_CLOCK_LFCLKSRC;
uint32_t err_code = sd_softdevice_enable(&clock_lf_cfg,
softdevice_assert_callback,
ANT_LICENSE_KEY);
APP_ERROR_CHECK(err_code);
// Configure application-specific interrupts. Set application IRQ to lowest priority and enable
// application IRQ (triggered from ANT protocol stack).
err_code = sd_nvic_SetPriority(SD_EVT_IRQn, APP_IRQ_PRIORITY_LOW);
APP_ERROR_CHECK(err_code);
err_code = sd_nvic_EnableIRQ(SD_EVT_IRQn);
APP_ERROR_CHECK(err_code);
err_code = ant_stack_static_config();
APP_ERROR_CHECK(err_code);
}
/**@brief Function for configuring ADC to do battery level conversion.
*/
static void adc_configure(void)
{
uint32_t err_code;
nrf_adc_config_t adc_config = NRF_ADC_CONFIG_DEFAULT;
// Configure ADC
adc_config.reference = NRF_ADC_CONFIG_REF_VBG;
adc_config.resolution = NRF_ADC_CONFIG_RES_8BIT;
adc_config.scaling = NRF_ADC_CONFIG_SCALING_SUPPLY_ONE_THIRD;
nrf_adc_configure(&adc_config);
// Enable ADC interrupt
nrf_adc_int_enable(ADC_INTENSET_END_Msk);
err_code = sd_nvic_ClearPendingIRQ(ADC_IRQn);
APP_ERROR_CHECK(err_code);
err_code = sd_nvic_SetPriority(ADC_IRQn, NRF_APP_PRIORITY_LOW);
APP_ERROR_CHECK(err_code);
err_code = sd_nvic_EnableIRQ(ADC_IRQn);
APP_ERROR_CHECK(err_code);
}
/**@brief Function for configuring and setting up the SoftDevice.
*/
static __INLINE void softdevice_setup(void)
{
printf("softdevice_setup\n");
#if defined(S212) || defined(S332)
uint32_t err_code = sd_softdevice_enable(NRF_CLOCK_LFCLKSRC,
softdevice_assert_callback,
ANT_LICENSE_KEY);
#else
uint32_t err_code = sd_softdevice_enable(NRF_CLOCK_LFCLKSRC,
softdevice_assert_callback);
#endif
APP_ERROR_CHECK(err_code);
// Configure application-specific interrupts. Set application IRQ to lowest priority and enable
// application IRQ (triggered from ANT protocol stack).
err_code = sd_nvic_SetPriority(SD_EVT_IRQn, NRF_APP_PRIORITY_LOW);
APP_ERROR_CHECK(err_code);
err_code = sd_nvic_EnableIRQ(SD_EVT_IRQn);
APP_ERROR_CHECK(err_code);
err_code = ant_stack_static_config();
APP_ERROR_CHECK(err_code);
}
uint32_t spi_master_open(const spi_master_hw_instance_t spi_master_hw_instance,
spi_master_config_t const * const p_spi_master_config)
{
#if defined(SPI_MASTER_0_ENABLE) || defined(SPI_MASTER_1_ENABLE)
/* Check against null */
if (p_spi_master_config == NULL)
{
return NRF_ERROR_NULL;
}
volatile spi_master_instance_t * p_spi_instance = spi_master_get_instance(
spi_master_hw_instance);
APP_ERROR_CHECK_BOOL(p_spi_instance != NULL);
switch (spi_master_hw_instance)
{
#ifdef SPI_MASTER_0_ENABLE
case SPI_MASTER_0:
spi_master_init_hw_instance(NRF_SPI0, SPI0_TWI0_IRQn, p_spi_instance, p_spi_master_config->SPI_DisableAllIRQ);
break;
#endif /* SPI_MASTER_0_ENABLE */
#ifdef SPI_MASTER_1_ENABLE
case SPI_MASTER_1:
spi_master_init_hw_instance(NRF_SPI1, SPI1_TWI1_IRQn, p_spi_instance, p_spi_master_config->SPI_DisableAllIRQ);
break;
#endif /* SPI_MASTER_1_ENABLE */
default:
break;
}
//A Slave select must be set as high before setting it as output,
//because during connect it to the pin it causes glitches.
nrf_gpio_pin_set(p_spi_master_config->SPI_Pin_SS);
nrf_gpio_cfg_output(p_spi_master_config->SPI_Pin_SS);
nrf_gpio_pin_set(p_spi_master_config->SPI_Pin_SS);
//Configure GPIO
nrf_gpio_cfg_output(p_spi_master_config->SPI_Pin_SCK);
nrf_gpio_cfg_output(p_spi_master_config->SPI_Pin_MOSI);
nrf_gpio_cfg_input(p_spi_master_config->SPI_Pin_MISO, NRF_GPIO_PIN_NOPULL);
p_spi_instance->pin_slave_select = p_spi_master_config->SPI_Pin_SS;
/* Configure SPI hardware */
p_spi_instance->p_nrf_spi->PSELSCK = p_spi_master_config->SPI_Pin_SCK;
p_spi_instance->p_nrf_spi->PSELMOSI = p_spi_master_config->SPI_Pin_MOSI;
p_spi_instance->p_nrf_spi->PSELMISO = p_spi_master_config->SPI_Pin_MISO;
p_spi_instance->p_nrf_spi->FREQUENCY = p_spi_master_config->SPI_Freq;
p_spi_instance->p_nrf_spi->CONFIG =
(uint32_t)(p_spi_master_config->SPI_CONFIG_CPHA << SPI_CONFIG_CPHA_Pos) |
(p_spi_master_config->SPI_CONFIG_CPOL << SPI_CONFIG_CPOL_Pos) |
(p_spi_master_config->SPI_CONFIG_ORDER << SPI_CONFIG_ORDER_Pos);
/* Clear waiting interrupts and events */
p_spi_instance->p_nrf_spi->EVENTS_READY = 0;
APP_ERROR_CHECK(sd_nvic_ClearPendingIRQ(p_spi_instance->irq_type));
APP_ERROR_CHECK(sd_nvic_SetPriority(p_spi_instance->irq_type, p_spi_master_config->SPI_PriorityIRQ));
/* Clear event handler */
p_spi_instance->callback_event_handler = NULL;
/* Enable interrupt */
p_spi_instance->p_nrf_spi->INTENSET = (SPI_INTENSET_READY_Set << SPI_INTENCLR_READY_Pos);
APP_ERROR_CHECK(sd_nvic_EnableIRQ(p_spi_instance->irq_type));
/* Enable SPI hardware */
p_spi_instance->p_nrf_spi->ENABLE = (SPI_ENABLE_ENABLE_Enabled << SPI_ENABLE_ENABLE_Pos);
/* Change state to IDLE */
p_spi_instance->state = SPI_MASTER_STATE_IDLE;
return NRF_SUCCESS;
#else
return NRF_ERROR_NOT_SUPPORTED;
#endif
}
/**@brief Function for application main entry. Does not return.
*/
int main(void)
{
// ANT event message buffer.
static uint8_t event_message_buffer[ANT_EVENT_MSG_BUFFER_MIN_SIZE];
// Configure pins LED0 and LED1 as outputs.
nrf_gpio_range_cfg_output(LED_START, LED_STOP);
// Set LED0 and LED1 high to indicate that the application is running.
NRF_GPIO->OUTSET = (1 << LED0) | (1 << LED1);
// Enable SoftDevice.
uint32_t err_code;
err_code = sd_softdevice_enable(NRF_CLOCK_LFCLKSRC_XTAL_50_PPM, softdevice_assert_callback);
APP_ERROR_CHECK(err_code);
// Set application IRQ to lowest priority.
err_code = sd_nvic_SetPriority(PROTOCOL_EVENT_IRQn, NRF_APP_PRIORITY_LOW);
APP_ERROR_CHECK(err_code);
// Enable application IRQ (triggered from protocol).
err_code = sd_nvic_EnableIRQ(PROTOCOL_EVENT_IRQn);
APP_ERROR_CHECK(err_code);
// Setup Channel_0 as a RX Slave.
ant_channel_rx_broadcast_setup();
// Set LED0 and LED1 low to indicate that stack is enabled.
NRF_GPIO->OUTCLR = (1 << LED0) | (1 << LED1);
uint8_t event;
uint8_t ant_channel;
// Main loop.
// Extract events from the stack below when
// availabe and process them in the main loop.
for (;;)
{
// Light up LED1 to indicate that CPU is going to sleep
nrf_gpio_pin_set(LED1);
// Put CPU in sleep if possible
err_code = sd_app_event_wait();
APP_ERROR_CHECK(err_code);
// Turn off LED on GPIO 9 to indicate that CPU is going out of sleep
nrf_gpio_pin_clear(LED1);
// Extract and process all pending ANT events as long as there are any left.
do
{
// Fetch the event.
err_code = sd_ant_event_get(&ant_channel, &event, event_message_buffer);
if (err_code == NRF_SUCCESS)
{
// Handle event.
switch (event)
{
case EVENT_RX:
channel_event_handle(event_message_buffer);
break;
default:
break;
}
}
}
while (err_code == NRF_SUCCESS);
}
}
/**@brief Function for application main entry, does not return.
*/
int main(void)
{
uint32_t err_code;
// Setup UART.
#if defined(TRACE_UART)
const app_uart_comm_params_t comm_params =
{
RX_PIN_NUMBER,
TX_PIN_NUMBER,
RTS_PIN_NUMBER,
CTS_PIN_NUMBER,
APP_UART_FLOW_CONTROL_DISABLED,
false,
UART_BAUDRATE_BAUDRATE_Baud38400
};
APP_UART_FIFO_INIT(&comm_params,
UART_RX_BUF_SIZE,
UART_TX_BUF_SIZE,
uart_error_handle,
APP_IRQ_PRIORITY_LOW,
err_code);
APP_ERROR_CHECK(err_code);
#endif
err_code = sd_softdevice_enable(NRF_CLOCK_LFCLKSRC_XTAL_50_PPM, softdevice_assert_callback);
APP_ERROR_CHECK(err_code);
// Set application IRQ to lowest priority.
err_code = sd_nvic_SetPriority(SD_EVT_IRQn, NRF_APP_PRIORITY_LOW);
APP_ERROR_CHECK(err_code);
// Enable application IRQ (triggered from protocol).
err_code = sd_nvic_EnableIRQ(SD_EVT_IRQn);
APP_ERROR_CHECK(err_code);
// Open HRM RX channel.
hrm_rx_open();
uint8_t event;
uint8_t ant_channel;
uint8_t event_message_buffer[ANT_EVENT_MSG_BUFFER_MIN_SIZE];
printf("Enter hrm rx main processing loop...\n");
// Main loop.
for (;;)
{
err_code = sd_app_evt_wait();
APP_ERROR_CHECK(err_code);
// Extract and process all pending ANT events.
do
{
err_code = sd_ant_event_get(&ant_channel, &event, event_message_buffer);
if (err_code == NRF_SUCCESS)
{
if (event == EVENT_RX)
{
// We are only interested of RX events.
hrm_rx_channel_event_handle(event_message_buffer);
}
}
}
while (err_code == NRF_SUCCESS);
}
}
int main(void)
{
uint8_t err_code = NRF_SUCCESS;
nrf_report_t report;
btle_status_codes_t btle_err_code = BTLE_STATUS_CODE_SUCCESS;
/* Silence the compiler */
(void) g_sd_assert_pc;
(void) g_evt;
nrf_gpio_cfg_output (LED_0);
nrf_gpio_cfg_output (LED_1);
nrf_gpio_range_cfg_output (0, 7);
nrf_gpio_pin_set (LED_0);
simple_uart_config (RTS_PIN_NUMBER, TX_PIN_NUMBER, CTS_PIN_NUMBER, RX_PIN_NUMBER, HWFC);
__LOG("Program init", __FUNCTION__);
err_code = sd_softdevice_enable ((uint32_t) NRF_CLOCK_LFCLKSRC_XTAL_75_PPM, sd_assert_cb);
ASSERT (err_code == NRF_SUCCESS);
__LOG ("Softdevice enabled");
err_code = sd_nvic_EnableIRQ(SD_EVT_IRQn);
ASSERT (err_code == NRF_SUCCESS);
err_code = sd_nvic_SetPriority(SWI0_IRQn, NRF_APP_PRIORITY_LOW);
ASSERT (err_code == NRF_SUCCESS);
err_code = sd_nvic_EnableIRQ(SWI0_IRQn);
ASSERT (err_code == NRF_SUCCESS);
__LOG ("Interrupts enabled");
btle_err_code = btle_scan_init (SWI0_IRQn);
ASSERT (btle_err_code == BTLE_STATUS_CODE_SUCCESS);
__LOG ("Scanner initialized");
btle_err_code = btle_scan_param_set (scan_param);
ASSERT (btle_err_code == BTLE_STATUS_CODE_SUCCESS);
__LOG ("Scanner parameters set");
btle_err_code = btle_scan_enable_set (scan_enable);
ASSERT (btle_err_code == BTLE_STATUS_CODE_SUCCESS);
__LOG ("Scanner enabled");
//nrf_adv_conn_init ();
while (true)
{
if (sw_interrupt)
{
while (btle_scan_ev_get (&report) != BTLE_STATUS_CODE_COMMAND_DISALLOWED)
{
__LOG("Type: %X, Addr: %X:%X:%X:%X:%X:%X, RSSI: %i",
report.event.params.le_advertising_report_event.event_type,
report.event.params.le_advertising_report_event.address[5],
report.event.params.le_advertising_report_event.address[4],
report.event.params.le_advertising_report_event.address[3],
report.event.params.le_advertising_report_event.address[2],
report.event.params.le_advertising_report_event.address[1],
report.event.params.le_advertising_report_event.address[0],
report.event.params.le_advertising_report_event.rssi);
}
__LOG("Done");
sw_interrupt = false;
}
}
}
// Set LED_0 and LED_1 high to indicate that the application is running.
LEDS_ON(BSP_LED_0_MASK);
LEDS_ON(BSP_LED_1_MASK);
// Enable SoftDevice.
uint32_t err_code;
#if defined(S212) || defined(S332)
err_code = sd_softdevice_enable(NRF_CLOCK_LFCLKSRC, softdevice_assert_callback, ANT_LICENSE_KEY);
#else
err_code = sd_softdevice_enable(NRF_CLOCK_LFCLKSRC, softdevice_assert_callback);
#endif
APP_ERROR_CHECK(err_code);
// Set application IRQ to lowest priority.
err_code = sd_nvic_SetPriority(SD_EVT_IRQn, NRF_APP_PRIORITY_LOW);
APP_ERROR_CHECK(err_code);
// Enable application IRQ (triggered from protocol).
err_code = sd_nvic_EnableIRQ(SD_EVT_IRQn);
APP_ERROR_CHECK(err_code);
err_code = ant_stack_static_config();
APP_ERROR_CHECK(err_code);
// Setup Channel_0 as a TX Master Only.
ant_channel_setup();
// Set LED_0 and LED_1 low to indicate that stack is enabled.
LEDS_OFF(BSP_LED_0_MASK);
LEDS_OFF(BSP_LED_1_MASK);
/**@brief Function for application main entry. Does not return.
*/
int main(void)
{
// ANT event message buffer.
static ant_evt_t ant_event;
// Configure LEDs as outputs.
nrf_gpio_range_cfg_output(BSP_LED_0, BSP_LED_1);
// Set LED_0 and LED_1 high to indicate that the application is running.
LEDS_ON(BSP_LED_0_MASK);
LEDS_ON(BSP_LED_1_MASK);
// Enable SoftDevice.
uint32_t err_code;
err_code = sd_softdevice_enable(NRF_CLOCK_LFCLKSRC_XTAL_50_PPM, softdevice_assert_callback);
APP_ERROR_CHECK(err_code);
// Set application IRQ to lowest priority.
err_code = sd_nvic_SetPriority(SD_EVT_IRQn, NRF_APP_PRIORITY_LOW);
APP_ERROR_CHECK(err_code);
// Enable application IRQ (triggered from protocol).
err_code = sd_nvic_EnableIRQ(SD_EVT_IRQn);
APP_ERROR_CHECK(err_code);
err_code = ant_stack_static_config();
APP_ERROR_CHECK(err_code);
// Setup Channel_0 as a TX Master Only.
ant_channel_setup();
// Set LED_0 and LED_1 low to indicate that stack is enabled.
LEDS_OFF(BSP_LED_0_MASK);
LEDS_OFF(BSP_LED_1_MASK);
button_init();
// Main loop.
for (;;)
{
// Put CPU in sleep if possible.
err_code = sd_app_evt_wait();
APP_ERROR_CHECK(err_code);
// Extract and process all pending ANT events as long as there are any left.
do
{
// Fetch the event.
err_code = sd_ant_event_get(&ant_event.channel, &ant_event.event, ant_event.evt_buffer);
if (err_code == NRF_SUCCESS)
{
switch(ant_event.channel)
{
case ANT_RELAY_MASTER_CHANNEL:
{
ant_process_relay_master(&ant_event);
break;
}
case ANT_RELAY_SLAVE_CHANNEL:
{
ant_process_relay_slave(&ant_event);
break;
}
case ANT_MOBILE_CHANNEL:
{
ant_process_mobile(&ant_event);
break;
}
default:
{
break;
}
}
}
}
while (err_code == NRF_SUCCESS);
}
}
/**@brief Function for application main entry. Does not return.
*/
int main(void)
{
// ANT event message buffer.
static uint8_t event_message_buffer[ANT_EVENT_MSG_BUFFER_MIN_SIZE];
// Enable SoftDevice.
uint32_t err_code;
err_code = sd_softdevice_enable(NRF_CLOCK_LFCLKSRC_XTAL_50_PPM, softdevice_assert_callback);
APP_ERROR_CHECK(err_code);
APP_TIMER_INIT(APP_TIMER_PRESCALER, APP_TIMER_MAX_TIMERS, APP_TIMER_OP_QUEUE_SIZE, NULL);
err_code = bsp_init(BSP_INIT_LED, APP_TIMER_TICKS(100, APP_TIMER_PRESCALER), NULL);
APP_ERROR_CHECK(err_code);
// Set application IRQ to lowest priority.
err_code = sd_nvic_SetPriority(SD_EVT_IRQn, NRF_APP_PRIORITY_LOW);
APP_ERROR_CHECK(err_code);
// Enable application IRQ (triggered from protocol).
err_code = sd_nvic_EnableIRQ(SD_EVT_IRQn);
APP_ERROR_CHECK(err_code);
// Setup Channel_0 as a RX Slave.
ant_channel_rx_broadcast_setup();
uint8_t event;
uint8_t ant_channel;
// Main loop.
// Extract events from the stack below when
// availabe and process them in the main loop.
for (;;)
{
// Use BSP_INDICATE_ALERT_0 to indicate sleep state
err_code = bsp_indication_set(BSP_INDICATE_ALERT_0);
APP_ERROR_CHECK(err_code);
// Put CPU in sleep if possible
err_code = sd_app_evt_wait();
APP_ERROR_CHECK(err_code);
err_code = bsp_indication_set(BSP_INDICATE_ALERT_OFF);
APP_ERROR_CHECK(err_code);
// Extract and process all pending ANT events as long as there are any left.
do
{
// Fetch the event.
err_code = sd_ant_event_get(&ant_channel, &event, event_message_buffer);
if (err_code == NRF_SUCCESS)
{
// Handle event.
switch (event)
{
case EVENT_RX:
channel_event_handle(event_message_buffer);
break;
default:
break;
}
}
}
while (err_code == NRF_SUCCESS);
}
}
