static int sdhci_msm_hs400_dll_calibration(struct sdhci_host *host)
{
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);
int ret;
u32 config;
pr_debug("%s: %s: Enter\n", mmc_hostname(host->mmc), __func__);
/*
* Retuning in HS400 (DDR mode) will fail, just reset the
* tuning block and restore the saved tuning phase.
*/
ret = msm_init_cm_dll(host);
if (ret)
goto out;
/* Set the selected phase in delay line hw block */
ret = msm_config_cm_dll_phase(host, msm_host->saved_tuning_phase);
if (ret)
goto out;
config = readl_relaxed(host->ioaddr + CORE_DLL_CONFIG);
config |= CORE_CMD_DAT_TRACK_SEL;
writel_relaxed(config, host->ioaddr + CORE_DLL_CONFIG);
if (msm_host->use_cdclp533)
ret = sdhci_msm_cdclp533_calibration(host);
else
ret = sdhci_msm_cm_dll_sdc4_calibration(host);
out:
pr_debug("%s: %s: Exit, ret %d\n", mmc_hostname(host->mmc),
__func__, ret);
return ret;
}
static uint32_t sdhci_msm_hs400_calibration(struct sdhci_host *host)
{
DBG("\n HS400 Calibration Start\n");
/* Reset & Initialize the DLL block */
if (sdhci_msm_init_dll(host))
return 1;
/* Write the save phase */
if (sdhci_msm_config_dll(host, host->msm_host->saved_phase))
return 1;
/* Write 1 to CMD_DAT_TRACK_SEL field in DLL_CONFIG */
REG_WRITE32(host, (REG_READ32(host, SDCC_DLL_CONFIG_REG) | CMD_DAT_TRACK_SEL), SDCC_DLL_CONFIG_REG);
if (host->use_cdclp533)
return sdhci_msm_cdclp533_calibration(host);
else
return sdhci_msm_cm_dll_sdc4_calibration(host);
DBG("\n HS400 Calibration Done\n");
return 0;
}