void lcdc_ili9331b_set_backlight(uint8 level)
{
seriout(0x00B1, (uint16)level);
seriout(0x00B5, 0x0000);
seriout(0x00B3, 0x0024);
seriout(0x00BE, 0x0000);
}
static void lcdc_ili9481d_panel_set_contrast(struct msm_fb_data_type *mfd, unsigned int contrast)
{
#ifdef CAMERA_SET_GAMMA
unsigned char i = 0;
if(0 == contrast)
{
if (lcd_ili9481d_state.disp_powered_up && lcd_ili9481d_state.display_on)
{
for(i = 0; i < NUM_ILI9481D_INNOLUX_GAMMA_NORMAL; i++)
{
seriout(ili9481d_innolux_gamma_normal[i][0], ili9481d_innolux_gamma_normal[i][1]);
mdelay(ili9481d_innolux_gamma_normal[i][2]);
}
}
}
else
{
if (lcd_ili9481d_state.disp_powered_up && lcd_ili9481d_state.display_on)
{
for(i = 0; i < NUM_ILI9481D_INNOLUX_GAMMA_CAMREA; i++)
{
seriout(ili9481d_innolux_gamma_for_camrea[i][0], ili9481d_innolux_gamma_for_camrea[i][1]);
mdelay(ili9481d_innolux_gamma_for_camrea[i][2]);
}
}
}
#endif
return;
}
static void lcd_ili9325c_disp_exit_sleep(void)
{
unsigned char i = 0;
if (lcd_ili9325c_state.disp_powered_up && !lcd_ili9325c_state.display_on)
{
switch (lcd_panel_qvga)
{
case LCD_ILI9325C_WINTEK_QVGA:
for(i = 0; i < NUM_ILI9325C_WINTEK_DISP_ON; i++)
{
seriout(ili9325c_wintek_disp_on[i][0], ili9325c_wintek_disp_on[i][1]);
mdelay(ili9325c_wintek_disp_on[i][2]);
}
break;
default :
break;
}
printk(KERN_ERR "lcd_ili9325c_disp_exit_sleep: LCD should be on, LCD_Panel = %d!\n", lcd_panel_qvga);
lcd_ili9325c_state.display_on = TRUE;
}
}
static int lcdc_ili9325c_panel_off(struct platform_device *pdev)
{
unsigned char i = 0;
if (lcd_ili9325c_state.disp_powered_up && lcd_ili9325c_state.display_on)
{
switch (lcd_panel_qvga)
{
case LCD_ILI9325C_WINTEK_QVGA:
for(i = 0; i < NUM_ILI9325C_WINTEK_DISP_OFF; i++)
{
seriout(ili9325c_wintek_disp_off[i][0], ili9325c_wintek_disp_off[i][1]);
mdelay(ili9325c_wintek_disp_off[i][2]);
}
break;
default :
break;
}
lcd_ili9325c_state.display_on = FALSE;
}
return 0;
}
static void lcd_ili9325_disp_exit_sleep(void)
{
unsigned char i = 0;
if (lcd_ili9325_state.disp_powered_up && !lcd_ili9325_state.display_on)
{
switch (lcd_panel_qvga)
{
case LCD_ILI9325_INNOLUX_QVGA:
for(i = 0; i < NUM_ILI9325_INNOLUX_DISP_ON; i++)
{
seriout(ili9325_innolux_disp_on[i][0], ili9325_innolux_disp_on[i][1]);
mdelay(ili9325_innolux_disp_on[i][2]);
}
break;
case LCD_ILI9325_BYD_QVGA:
for(i = 0; i < NUM_ILI9325_BYD_DISP_ON; i++)
{
seriout(ili9325_byd_disp_on[i][0], ili9325_byd_disp_on[i][1]);
mdelay(ili9325_byd_disp_on[i][2]);
}
break;
case LCD_ILI9325_WINTEK_QVGA:
for(i = 0; i < NUM_ILI9325_WINTEK_DISP_ON; i++)
{
seriout(ili9325_wintek_disp_on[i][0], ili9325_wintek_disp_on[i][1]);
mdelay(ili9325_wintek_disp_on[i][2]);
}
break;
default :
for(i = 0; i < NUM_ILI9325_INNOLUX_DISP_ON; i++)
{
seriout(ili9325_innolux_disp_on[i][0], ili9325_innolux_disp_on[i][1]);
mdelay(ili9325_innolux_disp_on[i][2]);
}
break;
}
lcd_ili9325_state.display_on = TRUE;
}
}
static void lcd_ili9325_disp_on(void)
{
unsigned char i = 0;
if (lcd_ili9325_state.disp_powered_up && !lcd_ili9325_state.display_on)
{
switch (lcd_panel_qvga)
{
case LCD_ILI9325_INNOLUX_QVGA:
for(i = 0; i < NUM_ILI9325_INNOLUX_INIT; i++)
{
seriout(ili9325_innolux_init[i][0], ili9325_innolux_init[i][1]);
mdelay(ili9325_innolux_init[i][2]);
}
break;
case LCD_ILI9325_BYD_QVGA:
for(i = 0; i < NUM_ILI9325_BYD_INIT; i++)
{
seriout(ili9325_byd_init[i][0], ili9325_byd_init[i][1]);
mdelay(ili9325_byd_init[i][2]);
}
break;
case LCD_ILI9325_WINTEK_QVGA:
for(i = 0; i < NUM_ILI9325_WINTEK_INIT; i++)
{
seriout(ili9325_wintek_init[i][0], ili9325_wintek_init[i][1]);
mdelay(ili9325_wintek_init[i][2]);
}
break;
default :
for(i = 0; i < NUM_ILI9325_INNOLUX_INIT; i++)
{
seriout(ili9325_innolux_init[i][0], ili9325_innolux_init[i][1]);
mdelay(ili9325_innolux_init[i][2]);
}
break;
}
seriout_cmd(0x0022, 0x70);
lcd_ili9325_state.display_on = TRUE;
}
}
static void lcd_ili9331b_disp_exit_sleep(void)
{
unsigned char i = 0;
if (lcd_ili9331b_state.disp_powered_up && !lcd_ili9331b_state.display_on)
{
for(; i < SIZE_ILI9331B_DISP_ON; ++i)
{
seriout(ili9331b_disp_on[i][0], ili9331b_disp_on[i][1]);
mdelay(ili9331b_disp_on[i][2]);
}
lcdc_ili9331b_set_backlight(0xFF);
lcd_ili9331b_state.display_on = TRUE;
}
}
static int lcd_ili9331b_panel_off(struct platform_device *pdev)
{
unsigned char i = 0;
if (lcd_ili9331b_state.disp_powered_up && lcd_ili9331b_state.display_on)
{
for(; i < SIZE_ILI9331B_DISP_OFF; ++i)
{
seriout(ili9331b_disp_off[i][0], ili9331b_disp_off[i][1]);
mdelay(ili9331b_disp_off[i][2]);
}
lcd_ili9331b_state.display_on = FALSE;
}
return 0;
}
int process_lcdc_table(struct sequence *table, size_t count, lcd_panel_type lcd_panel)
{
unsigned int i;
uint32 reg = 0;
uint32 value = 0;
uint32 time = 0;
uint8 start_byte = 0;
int ret = 0;
uint8 start_byte_reg = 0;
uint8 start_byte_data = 0;
for (i = 0; i < count; i++)
{
reg = table[i].reg;
value = table[i].value;
time = table[i].time;
switch(lcd_panel)
{
case LCD_S6D74A0_SAMSUNG_HVGA:
seriout_ext((uint16)reg, (uint16)value, (uint16)time);
break;
case LCD_HX8368A_SEIKO_QVGA:
case LCD_HX8368A_TRULY_QVGA:
if (value & TYPE_COMMAND)
{
start_byte = START_BYTE_COMMAND;
}
else if (value & TYPE_PARAMETER)
{
start_byte = START_BYTE_PARAMETER;
}
/* 16 bit SPI to write the command and data */
seriout_transfer_byte((uint8)reg, start_byte);
break;
case LCD_HX8357B_TIANMA_HVGA:
case LCD_HX8357C_TIANMA_HVGA:
case LCD_S6D05A0_INNOLUX_HVGA:
case LCD_R61529_TRULY_HVGA:
case LCD_ILI9481D_INNOLUX_HVGA:
case LCD_ILI9481DS_TIANMA_HVGA:
/*add an new lcd for U8510*/
case LCD_NT35410_CHIMEI_HVGA:
if (value & TYPE_COMMAND)
{
start_byte = START_BYTE_COMMAND;
}
else if (value & TYPE_PARAMETER)
{
start_byte = START_BYTE_PARAMETER;
}
/* 9 bit SPI to write the command and data */
seriout_byte_9bit(start_byte, (uint8)reg);
break;
case LCD_HX8347D_CHIMEI_QVGA:
case LCD_HX8347G_TIANMA_QVGA:
case LCD_HX8347D_TRULY_QVGA:
start_byte_reg = HX8347D_DEVICE_ID | WRITE_REGISTER;
start_byte_data = HX8347D_DEVICE_ID | WRITE_CONTENT;
/* 4 bytes to write the reg and value */
seriout((uint8)reg, (uint8)value, start_byte_reg, start_byte_data);
break;
default:
break;
}
if (time != 0)
{
LCD_MDELAY(time);
}
}
return ret;
}
