// this allows for easier implementation of the NES-EVENT board used for Nintento World Championships
void nes_sxrom_device::update_regs(int reg)
{
switch (reg)
{
case 0:
switch (m_reg[0] & 0x03)
{
case 0: set_nt_mirroring(PPU_MIRROR_LOW); break;
case 1: set_nt_mirroring(PPU_MIRROR_HIGH); break;
case 2: set_nt_mirroring(PPU_MIRROR_VERT); break;
case 3: set_nt_mirroring(PPU_MIRROR_HORZ); break;
}
set_chr();
set_prg();
break;
case 1:
set_chr();
set_prg();
break;
case 2:
set_chr();
break;
case 3:
set_prg();
break;
}
}
void nes_sorom_device::pcb_reset()
{
m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM;
m_latch = 0;
m_count = 0;
m_reg[0] = 0x0f;
m_reg[1] = m_reg[2] = m_reg[3] = 0;
m_reg_write_enable = 1;
set_nt_mirroring(PPU_MIRROR_HORZ);
set_chr();
set_prg();
}
void nes_waixing_g_device::pcb_reset()
{
m_chr_source = m_vrom_chunks ? CHRROM : CHRRAM;
mmc3_common_initialize(0xff, 0xff, 0);
memset(mapper_ram, 0, sizeof(mapper_ram));
m_mmc_prg_bank[0] = 0x00;
m_mmc_prg_bank[1] = 0x01;
m_mmc_prg_bank[2] = 0x3e;
m_mmc_prg_bank[3] = 0x3f;
m_mmc_vrom_bank[0] = 0x00;
m_mmc_vrom_bank[1] = 0x02;
m_mmc_vrom_bank[2] = 0x04;
m_mmc_vrom_bank[3] = 0x05;
m_mmc_vrom_bank[4] = 0x06;
m_mmc_vrom_bank[5] = 0x07;
m_mmc_vrom_bank[6] = 0x01;
m_mmc_vrom_bank[7] = 0x03;
set_prg(m_prg_base, m_prg_mask);
set_chr(m_chr_source, m_chr_base, m_chr_mask);
}
void nes_txrom_device::mmc3_common_initialize( int prg_mask, int chr_mask, int irq_type )
{
m_mmc_prg_bank[0] = m_mmc_prg_bank[2] = 0xffe; // m_mmc_prg_bank[2] & m_mmc_prg_bank[3] remain always the same in most MMC3 variants
m_mmc_prg_bank[1] = m_mmc_prg_bank[3] = 0xfff; // but some pirate clone mappers change them after writing certain registers
memset(m_mmc_vrom_bank, 0, sizeof(m_mmc_vrom_bank));
m_latch = 0;
m_wram_protect = 0x80;
m_prg_base = m_chr_base = 0;
m_prg_mask = prg_mask;
m_chr_mask = chr_mask;
m_alt_irq = irq_type; // later MMC3 boards seem to use MMC6-type IRQ... more investigations are in progress at NESDev...
m_irq_enable = 0;
m_irq_count = m_irq_count_latch = 0;
m_irq_clear = 0;
set_prg(m_prg_base, m_prg_mask);
set_chr(m_chr_source, m_chr_base, m_chr_mask);
}