static void Sync(void) { FCEU_printf("%02x: %02x %02x\n", bank_mode, bank_value, prgb[0]); switch(bank_mode&7) { case 0: setprg32(0x8000,bank_value&7); break; case 1: setprg16(0x8000,((8+(bank_value&7))>>1)+prgb[1]); setprg16(0xC000,(bank_value&7)>>1); case 4: setprg32(0x8000,8+(bank_value&7)); break; case 5: setprg16(0x8000,((8+(bank_value&7))>>1)+prgb[1]); setprg16(0xC000,((8+(bank_value&7))>>1)+prgb[3]); case 2: setprg8(0x8000,prgb[0]>>2); setprg8(0xa000,prgb[1]); setprg8(0xc000,prgb[2]); setprg8(0xe000,~0); break; case 3: setprg8(0x8000,prgb[0]); setprg8(0xa000,prgb[1]); setprg8(0xc000,prgb[2]); setprg8(0xe000,prgb[3]); break; } }
static void NovelReset(void) { SetWriteHandler(0x8000,0xFFFF,NovelWrite); SetReadHandler(0x8000,0xFFFF,CartBR); setprg32(0x8000,0); setchr8(0); }
static DECLFW(Mapper96_write) { latche=V; setprg32(0x8000,V&3); setchr4r(0x10,0x0000,(latche&4)|M96LA); setchr4r(0x10,0x1000,(latche&4)|3); }
static void Sync(void) { setmirror(reg[0]); setprg8r(0x10,0x6000,0); setchr8(0); setprg32(0x8000,(reg[1]+reg[2])&0xf); }
static DECLFW(Write2) { if(A==0x5101) { if(laststrobe&&!V) { trigger^=1; } laststrobe=V; } else if(A==0x5100&&V==6) //damn thoose protected games setprg32(0x8000,3); else switch (A&0x7300) { case 0x5200: DRegs[0]=V; Sync(); break; case 0x5000: DRegs[1]=V; Sync(); if(!(DRegs[1]&0x80)&&(scanline<128)) setchr8(0); break; case 0x5300: DRegs[2]=V; break; } }
static void Sync(void) { setprg4r(1,0x5000,1); setprg8r(1,0x6000,1); setprg32(0x8000,prg); setchr8(0); }
static void Sync(void) { setchr8(0); setprg8r(0x10,0x6000,0); setprg32(0x8000,reg&0x1f); setmirror(((reg&0x20)>>5)^1); }
static void Sync(void) { setchr8(0); setprg8r(0x10,0x6000,(reg&0xC0)>>6); setprg32(0x8000,reg&0x1F); // setmirror(((reg&0x20)>>5)); }
static void Sync(void) { setchr8(0); setprg32(0x8000,~0); setprg4(0xb800,reg0); setprg4(0xc800,8+reg1); }
static void UNLCC21Sync(void) { setprg32(0x8000,0); setchr8(latche&1); setmirror(MI_0+((latche&2)>>1)); }
static void Sync(void) { setmirror(MI_0); setprg32(0x8000,reg & 3); setchr4(0x0000,(reg & 4) | ppulatch); setchr4(0x1000,(reg & 4) | 3); }
static void BMC8IN1PW(uint32 A, uint8 V) { if(EXPREGS[0] & 0x10) { // MMC3 mode setprg8(A, ((EXPREGS[0] & 0xC) << 2) | (V & 0xF)); } else { setprg32(0x8000, EXPREGS[0] & 0xF); } }
static void CPROMReset(CartInfo *info) { latche = 0; setprg32(0x8000,0); setchr4(0x0000, 0); setchr4(0x1000, 0); SetReadHandler(0x8000,0xFFFF,CartBR); SetWriteHandler(0x8000,0xffff,CPROMWrite); }
static void BMC13in1JY110Power(void) { prgb[0]=prgb[1]=prgb[2]=prgb[3]=0; bank_mode=0; bank_value=0; setprg32(0x8000,0); setchr8(0); SetWriteHandler(0x8000,0xFFFF,BMC13in1JY110Write); SetReadHandler(0x8000,0xFFFF,CartBR); }
static void MALEEReset(void) { setprg2r(0x10,0x7000,0); SetReadHandler(0x8000,0xFFFF,CartBR); SetReadHandler(0x6000,0x67FF,CartBR); SetReadHandler(0x7000,0x77FF,CartBR); setprg2r(1,0x6000,0); setprg32(0x8000,0); setchr8(0); }
static void Sync(void) { setprg32(0x8000, 0); if(CHRsize[0] == 8192) { setchr4(0x0000, latche & 1); setchr4(0x1000, latche & 1); } else { setchr8(latche & 1); // actually, my bad, overdumped roms, the real CHR size if 8K } setmirror(MI_0 + (latche & 1)); }
static void tekprom(void) { uint32 bankmode=((tkcom[3]&6)<<5); switch(tkcom[0]&7) { case 00: if(tkcom[0]&0x80) setprg8(0x6000,(((prgb[3]<<2)+3)&0x3F)|bankmode); setprg32(0x8000,0x0F|((tkcom[3]&6)<<3)); break; case 01: if(tkcom[0]&0x80) setprg8(0x6000,(((prgb[3]<<1)+1)&0x3F)|bankmode); setprg16(0x8000,(prgb[1]&0x1F)|((tkcom[3]&6)<<4)); setprg16(0xC000,0x1F|((tkcom[3]&6)<<4)); break; case 03: // bit reversion case 02: if(tkcom[0]&0x80) setprg8(0x6000,(prgb[3]&0x3F)|bankmode); setprg8(0x8000,(prgb[0]&0x3F)|bankmode); setprg8(0xa000,(prgb[1]&0x3F)|bankmode); setprg8(0xc000,(prgb[2]&0x3F)|bankmode); setprg8(0xe000,0x3F|bankmode); break; case 04: if(tkcom[0]&0x80) setprg8(0x6000,(((prgb[3]<<2)+3)&0x3F)|bankmode); setprg32(0x8000,(prgb[3]&0x0F)|((tkcom[3]&6)<<3)); break; case 05: if(tkcom[0]&0x80) setprg8(0x6000,(((prgb[3]<<1)+1)&0x3F)|bankmode); setprg16(0x8000,(prgb[1]&0x1F)|((tkcom[3]&6)<<4)); setprg16(0xC000,(prgb[3]&0x1F)|((tkcom[3]&6)<<4)); break; case 07: // bit reversion case 06: if(tkcom[0]&0x80) setprg8(0x6000,(prgb[3]&0x3F)|bankmode); setprg8(0x8000,(prgb[0]&0x3F)|bankmode); setprg8(0xa000,(prgb[1]&0x3F)|bankmode); setprg8(0xc000,(prgb[2]&0x3F)|bankmode); setprg8(0xe000,(prgb[3]&0x3F)|bankmode); break; } }
static void Sync(void) { setmirror((mode ^ 1) & 1); setprg8r(0x10, 0x6000, 0); setchr4(0x0000, lastnt); setchr4(0x1000, 1); if (mode & 4) setprg32(0x8000, prg & 7); else { setprg16(0x8000, prg & 0x0f); setprg16(0xC000, 0); } }
static void MALEEReset(CartInfo *info) { memset(WRAM, 0x00, 2048); setprg2r(0x10,0x7000,0); SetReadHandler(0x8000,0xFFFF,CartBR); SetReadHandler(0x6000,0x67ff,CartBR); SetReadHandler(0x7000,0x77FF,CartBR); SetWriteHandler(0x7000,0x77FF,MWrite); setprg2r(1,0x6000,0); setprg32(0x8000,0); setchr8(0); }
static void Sync(void) { setmirror(mirr); setprg8r(0x10,0x6000,0); setchr8(0); if(prgmode) setprg32(0x8000,prg&7); else { setprg16(0x8000,prg&0x0f); setprg16(0xC000,0); } }
static DECLFW(M125w) { if(A==0x5000) { Mapper125.PRGSelect=V&0xF; setprg32(0x8000,V&0xF); } else if(A==0x5001) { Mapper125.RAMSelect=V&0x33; setchr8(V&3); setprg8r(0x10,0x6000,(V>>4)&3); }
static void Sync(void) { if(regs[0]&0x80) { if(regs[1]&0x80) setprg32(0x8000,regs[1]&0x1F); else { int bank=((regs[1]&0x1f)<<1)|((regs[1]>>6)&1); setprg16(0x8000,bank); setprg16(0xC000,bank); } } else {
static void Sync(void) { setprg32(0x8000, PRGBank32); setchr8(CHRBank8); }
static void Sync(void) { setprg8r(0x10, 0x6000, 0); setprg32(0x8000, reg & 1); setchr8(0); }
static void Sync(void) { setprg32(0x8000, latch & 0x3); setchr8((latch >> 2) & 0x3); }
static void M96Sync(int v) { setprg32(0x8000,latche&3); setchr4r(0x10,0x0000,(latche&4)|M96LA); setchr4r(0x10,0x1000,(latche&4)|3); }
static void DoNovel(void) { setprg32(0x8000,latch&3); setchr8(latch&7); }
static void Sync(void) { setprg32(0x8000,(DRegs[0]<<4)|(DRegs[1]&0xF)); }
static void Sync(void) { setprg32(0x8000, PRGBank32); setchr4(0x0000, CHRBanks[0]); setchr4(0x1000, CHRBanks[1]); }
static void Sync(void) { setprg8(0x6000,reg); setprg32(0x8000,2); setchr8(0); }