void init(void) {
setupFlash();
setupClocks();
setupNVIC();
systick_init(SYSTICK_RELOAD_VAL);
gpio_init_all();
afio_init();
setupADC();
setupTimers();
// usb_cdcacm_enable(BOARD_USB_DISC_DEV, BOARD_USB_DISC_BIT);
boardInit();
}
void init(void) {
setupFlash();
setupClocks();
setupNVIC();
systick_init(SYSTICK_RELOAD_VAL);
gpio_init_all();
afio_init();
setupADC();
setupTimers();
setupUSB();
boardInit();
}
void init(void) {
setupFlash();
setupClocks();
setupNVIC();
systick_init(SYSTICK_RELOAD_VAL);
gpio_init_all();
afio_init();
setupADC();
setupTimers();
// setupUSB();
#if !defined(BOARD_STM32VLD)
setupUSB();
#endif
boardInit();
}
void init(void) {
setupFlash();
// ok
setupClocks();
// ok
setupNVIC();
// ok
systick_init(SYSTICK_RELOAD_VAL);
// ok
gpio_init_all();
// ok
afio_init();
// ok
setupADC();
// adcs increase mA!
setupTimers();
}
/*
* @brief stm32 board specific init
* @param none
* @return none
* @note none
*/
void stm32utils_system_init(void)
{
setupFlash();
setupClocks();
setupNVIC();
systick_init(SYSTICK_RELOAD_VAL);
gpio_init_all();
afio_init();
setupADC();
setupTimers();
setupUSART(USARTx, SERIAL_BAUDRATE);
gpio_set_mode(GPIOA, 0, GPIO_OUTPUT_PP);
gpio_write_bit(GPIOA, 0, 0);
gpio_set_mode(GPIOA, 1, GPIO_OUTPUT_PP);
gpio_write_bit(GPIOA, 1, 0);
gpio_set_mode(GPIOA, 12, GPIO_OUTPUT_PP);
gpio_write_bit(GPIOA, 12, 0);
}
void init(void) {
setupFlash();
setupClocks();
setupNVIC();
systick_init(SYSTICK_RELOAD_VAL);
gpio_init_all();
afio_init();
setupADC();
setupTimers();
setupUSB();
boardInit();
//for debug
gpio_set_mode(GPIOA, 2, GPIO_AF_OUTPUT_PP);
gpio_set_mode(GPIOA, 3, GPIO_INPUT_FLOATING);
usart_init(USART2);
usart_set_baud_rate(USART2, STM32_PCLK1, 57600);
usart_enable(USART2);
/*delay(1000);
TxDString("hello pandora\r\n");*/
}
void systemInit(void)
{
/* USER CODE BEGIN (15) */
/* USER CODE END */
/* Configure PLL control registers and enable PLLs.
* The PLL takes (127 + 1024 * NR) oscillator cycles to acquire lock.
* This initialization sequence performs all the tasks that are not
* required to be done at full application speed while the PLL locks.
*/
setupPLL();
/* USER CODE BEGIN (16) */
/* USER CODE END */
/* Enable clocks to peripherals and release peripheral reset */
periphInit();
/* USER CODE BEGIN (17) */
/* USER CODE END */
/* Configure device-level multiplexing and I/O multiplexing */
muxInit();
/* USER CODE BEGIN (18) */
/* USER CODE END */
/** - Set up flash address and data wait states based on the target CPU clock frequency
* The number of address and data wait states for the target CPU clock frequency are specified
* in the specific part's datasheet.
*/
setupFlash();
/* USER CODE BEGIN (19) */
/* USER CODE END */
/** - Configure the LPO such that HF LPO is as close to 10MHz as possible */
trimLPO();
/* USER CODE BEGIN (20) */
/* USER CODE END */
/** - Wait for PLLs to start up and map clock domains to desired clock sources */
mapClocks();
/* USER CODE BEGIN (21) */
/* USER CODE END */
/** - set ECLK pins functional mode */
systemREG1->SYSPC1 = 0U;
/** - set ECLK pins default output value */
systemREG1->SYSPC4 = 0U;
/** - set ECLK pins output direction */
systemREG1->SYSPC2 = 1U;
/** - set ECLK pins open drain enable */
systemREG1->SYSPC7 = 0U;
/** - set ECLK pins pullup/pulldown enable */
systemREG1->SYSPC8 = 0U;
/** - set ECLK pins pullup/pulldown select */
systemREG1->SYSPC9 = 1U;
/** - Setup ECLK */
systemREG1->ECPCNTL = (uint32)((uint32)0U << 24U)
| (uint32)((uint32)0U << 23U)
| (uint32)((uint32)(8U - 1U) & 0xFFFFU);
/* USER CODE BEGIN (22) */
/* USER CODE END */
}
/* Requirements : HL_SR471 */
void systemInit(void)
{
uint32 efcCheckStatus;
/* USER CODE BEGIN (15) */
/* USER CODE END */
/* Configure PLL control registers and enable PLLs.
* The PLL takes (127 + 1024 * NR) oscillator cycles to acquire lock.
* This initialization sequence performs all the tasks that are not
* required to be done at full application speed while the PLL locks.
*/
setupPLL();
/* USER CODE BEGIN (16) */
/* USER CODE END */
/* Run eFuse controller start-up checks and start eFuse controller ECC self-test.
* This includes a check for the eFuse controller error outputs to be stuck-at-zero.
*/
efcCheckStatus = efcCheck();
/* USER CODE BEGIN (17) */
/* USER CODE END */
/* Enable clocks to peripherals and release peripheral reset */
periphInit();
/* USER CODE BEGIN (18) */
/* USER CODE END */
/* Configure device-level multiplexing and I/O multiplexing */
muxInit();
/* USER CODE BEGIN (19) */
/* USER CODE END */
if(efcCheckStatus == 0U)
{
/* Wait for eFuse controller self-test to complete and check results */
if (checkefcSelfTest() == FALSE) /* eFuse controller ECC logic self-test failed */
{
selftestFailNotification(EFCCHECK_FAIL1); /* device operation is not reliable */
}
}
else if(efcCheckStatus == 2U)
{
/* Wait for eFuse controller self-test to complete and check results */
if (checkefcSelfTest() == FALSE) /* eFuse controller ECC logic self-test failed */
{
selftestFailNotification(EFCCHECK_FAIL1); /* device operation is not reliable */
}
else
{
selftestFailNotification(EFCCHECK_FAIL2);
}
}
else
{
/* Empty */
}
/* USER CODE BEGIN (20) */
/* USER CODE END */
/** - Set up flash address and data wait states based on the target CPU clock frequency
* The number of address and data wait states for the target CPU clock frequency are specified
* in the specific part's datasheet.
*/
setupFlash();
/* USER CODE BEGIN (21) */
/* USER CODE END */
/** - Configure the LPO such that HF LPO is as close to 10MHz as possible */
trimLPO();
/* USER CODE BEGIN (23) */
/* USER CODE END */
/** - Wait for PLLs to start up and map clock domains to desired clock sources */
mapClocks();
/* USER CODE BEGIN (24) */
/* USER CODE END */
/** - set ECLK pins functional mode */
systemREG1->SYSPC1 = 0U;
/** - set ECLK pins default output value */
systemREG1->SYSPC4 = 0U;
/** - set ECLK pins output direction */
systemREG1->SYSPC2 = 1U;
/** - set ECLK pins open drain enable */
systemREG1->SYSPC7 = 0U;
/** - set ECLK pins pullup/pulldown enable */
systemREG1->SYSPC8 = 0U;
/** - set ECLK pins pullup/pulldown select */
systemREG1->SYSPC9 = 1U;
/** - Setup ECLK */
systemREG1->ECPCNTL = (uint32)((uint32)0U << 24U)
| (uint32)((uint32)0U << 23U)
| (uint32)((uint32)(8U - 1U) & 0xFFFFU);
/* USER CODE BEGIN (25) */
/* USER CODE END */
}
// short_init is used by safecast to do a quick power-on
// it's special cased to shorten the "ON" duty-cycle
void short_init(void) {
setupFlash();
setupClocks();
setupNVIC();
setupTimers();
}
/*
Run an action (may yield)
*/
static int runAction(HttpConn *conn)
{
HttpRx *rx;
HttpRoute *route;
EspRoute *eroute;
EspReq *req;
EspAction action;
rx = conn->rx;
req = conn->reqData;
route = rx->route;
eroute = route->eroute;
assert(eroute);
if (eroute->edi && eroute->edi->flags & EDI_PRIVATE) {
cloneDatabase(conn);
} else {
req->edi = eroute->edi;
}
if (route->sourceName == 0 || *route->sourceName == '\0') {
if (eroute->commonController) {
(eroute->commonController)(conn);
}
return 1;
}
#if !ME_STATIC
if (!eroute->combine && (route->update || !mprLookupKey(eroute->actions, rx->target))) {
cchar *errMsg, *controllers, *controller;
if ((controllers = httpGetDir(route, "CONTROLLERS")) == 0) {
controllers = ".";
}
controllers = mprJoinPath(route->home, controllers);
controller = schr(route->sourceName, '$') ? stemplateJson(route->sourceName, rx->params) : route->sourceName;
controller = controllers ? mprJoinPath(controllers, controller) : mprJoinPath(route->home, controller);
if (espLoadModule(route, conn->dispatcher, "controller", controller, &errMsg) < 0) {
if (mprPathExists(controller, R_OK)) {
httpError(conn, HTTP_CODE_NOT_FOUND, "%s", errMsg);
return 0;
}
}
}
#endif /* !ME_STATIC */
assert(eroute->top);
action = mprLookupKey(eroute->top->actions, rx->target);
if (route->flags & HTTP_ROUTE_XSRF && !(rx->flags & HTTP_GET)) {
if (!httpCheckSecurityToken(conn)) {
httpSetStatus(conn, HTTP_CODE_UNAUTHORIZED);
if (smatch(route->responseFormat, "json")) {
httpTrace(conn, "esp.xsrf.error", "error", 0);
espRenderString(conn,
"{\"retry\": true, \"success\": 0, \"feedback\": {\"error\": \"Security token is stale. Please retry.\"}}");
espFinalize(conn);
} else {
httpError(conn, HTTP_CODE_UNAUTHORIZED, "Security token is stale. Please reload page.");
}
return 0;
}
}
if (action) {
httpAuthenticate(conn);
setupFlash(conn);
if (eroute->commonController) {
(eroute->commonController)(conn);
}
if (!httpIsFinalized(conn)) {
(action)(conn);
}
}
return 1;
}
