void gensll() { #ifdef INTERPRET_SLL gencallinterp((unsigned long)SLL, 0); #else int rt = allocate_register((unsigned long *)dst->f.r.rt); int rd = allocate_register_w((unsigned long *)dst->f.r.rd); mov_reg32_reg32(rd, rt); shl_reg32_imm8(rd, dst->f.r.sa); #endif }
void gensll(void) { #ifdef INTERPRET_SLL gencallinterp((unsigned int)cached_interpreter_table.SLL, 0); #else int rt = allocate_register((unsigned int *)dst->f.r.rt); int rd = allocate_register_w((unsigned int *)dst->f.r.rd); mov_reg32_reg32(rd, rt); shl_reg32_imm8(rd, dst->f.r.sa); #endif }
void gensll(usf_state_t * state) { #ifdef INTERPRET_SLL gencallinterp(state, (unsigned int)state->current_instruction_table.SLL, 0); #else int rt = allocate_register(state, (unsigned int *)state->dst->f.r.rt); int rd = allocate_register_w(state, (unsigned int *)state->dst->f.r.rd); mov_reg32_reg32(state, rd, rt); shl_reg32_imm8(state, rd, state->dst->f.r.sa); #endif }
void gendsll32() { #ifdef INTERPRET_DSLL32 gencallinterp((unsigned long)DSLL32, 0); #else int rt1 = allocate_64_register1((unsigned long *)dst->f.r.rt); int rd1 = allocate_64_register1_w((unsigned long *)dst->f.r.rd); int rd2 = allocate_64_register2_w((unsigned long *)dst->f.r.rd); mov_reg32_reg32(rd2, rt1); shl_reg32_imm8(rd2, dst->f.r.sa); xor_reg32_reg32(rd1, rd1); #endif }
void gendsll32(usf_state_t * state) { #ifdef INTERPRET_DSLL32 gencallinterp(state, (unsigned int)state->current_instruction_table.DSLL32, 0); #else int rt1 = allocate_64_register1(state, (unsigned int *)state->dst->f.r.rt); int rd1 = allocate_64_register1_w(state, (unsigned int *)state->dst->f.r.rd); int rd2 = allocate_64_register2_w(state, (unsigned int *)state->dst->f.r.rd); mov_reg32_reg32(state, rd2, rt1); shl_reg32_imm8(state, rd2, state->dst->f.r.sa); xor_reg32_reg32(state, rd1, rd1); #endif }
void gendsll32(void) { #ifdef INTERPRET_DSLL32 gencallinterp((unsigned int)cached_interpreter_table.DSLL32, 0); #else int rt1 = allocate_64_register1((unsigned int *)g_dev.r4300.recomp.dst->f.r.rt); int rd1 = allocate_64_register1_w((unsigned int *)g_dev.r4300.recomp.dst->f.r.rd); int rd2 = allocate_64_register2_w((unsigned int *)g_dev.r4300.recomp.dst->f.r.rd); mov_reg32_reg32(rd2, rt1); shl_reg32_imm8(rd2, g_dev.r4300.recomp.dst->f.r.sa); xor_reg32_reg32(rd1, rd1); #endif }
void gensll(void) { #if defined(COUNT_INSTR) inc_m32abs(&instr_count[55]); #endif #ifdef INTERPRET_SLL gencallinterp((unsigned long long)SLL, 0); #else int rt = allocate_register_32((unsigned int *)dst->f.r.rt); int rd = allocate_register_32_w((unsigned int *)dst->f.r.rd); mov_reg32_reg32(rd, rt); shl_reg32_imm8(rd, dst->f.r.sa); #endif }
void gendsll(void) { #ifdef INTERPRET_DSLL gencallinterp((unsigned int)cached_interpreter_table.DSLL, 0); #else int rt1 = allocate_64_register1((unsigned int *)dst->f.r.rt); int rt2 = allocate_64_register2((unsigned int *)dst->f.r.rt); int rd1 = allocate_64_register1_w((unsigned int *)dst->f.r.rd); int rd2 = allocate_64_register2_w((unsigned int *)dst->f.r.rd); mov_reg32_reg32(rd1, rt1); mov_reg32_reg32(rd2, rt2); shld_reg32_reg32_imm8(rd2, rd1, dst->f.r.sa); shl_reg32_imm8(rd1, dst->f.r.sa); if (dst->f.r.sa & 0x20) { mov_reg32_reg32(rd2, rd1); xor_reg32_reg32(rd1, rd1); } #endif }