static void smbus_wait_until_ready(void) { int loops; loops = 0; /* Yes, this is a mess, but it's the easiest way to do it */ while (((inb(SMBHSTSTAT) & 1) == 1) && (loops <= SMBUS_TIMEOUT)) { SMBUS_DELAY(); ++loops; } smbus_print_error(inb(SMBHSTSTAT), loops); }
int smbus_read_byte(unsigned device, unsigned address, unsigned char *result) { unsigned char host_status_register; unsigned char byte; reset(); smbus_wait_until_ready(); /* setup transaction */ /* disable interrupts */ outb(inb(SMBUS_IO_BASE + SMBHSTCTL) & (~1), SMBUS_IO_BASE + SMBHSTCTL); /* set the device I'm talking too */ outb(((device & 0x7f) << 1) | 1, SMBUS_IO_BASE + SMBXMITADD); /* set the command/address... */ outb(address & 0xFF, SMBUS_IO_BASE + SMBHSTCMD); /* set up for a byte data read */ outb((inb(SMBUS_IO_BASE + SMBHSTCTL) & 0xE3) | (0x2 << 2), SMBUS_IO_BASE + SMBHSTCTL); /* clear any lingering errors, so the transaction will run */ outb(inb(SMBUS_IO_BASE + SMBHSTSTAT), SMBUS_IO_BASE + SMBHSTSTAT); /* clear the data byte...*/ outb(0, SMBUS_IO_BASE + SMBHSTDAT0); /* start the command */ outb((inb(SMBUS_IO_BASE + SMBHSTCTL) | 0x40), SMBUS_IO_BASE + SMBHSTCTL); /* poll for transaction completion */ smbus_wait_until_done(); host_status_register = inb(SMBUS_IO_BASE + SMBHSTSTAT); /* Ignore the In Use Status... */ host_status_register &= ~(1 << 6); /* read results of transaction */ byte = inb(SMBUS_IO_BASE + SMBHSTDAT0); smbus_print_error(byte); *result = byte; return host_status_register != 0x02; }
static void smbus_wait_until_ready(void) { int loops; loops = 0; /* Yes, this is a mess, but it's the easiest way to do it */ while (((inb(SMBHSTSTAT) & 1) == 1) && (loops <= SMBUS_TIMEOUT)) { SMBUS_DELAY(); ++loops; } #if CONFIG_DEBUG_SMBUS /* Some systems seem to have a flakey SMBus. No need to spew a lot of * errors on those, once we know that SMBus access is principally * working. */ smbus_print_error(inb(SMBHSTSTAT), loops); #endif }
/* this works, so I am not going to touch it for now -- rgm */ static unsigned char smbus_read_byte(unsigned char devAdr, unsigned char bIndex) { unsigned short i; unsigned char bData; unsigned char sts = 0; /* clear host status */ outb(0xff, SMBUS_IO_BASE); /* check SMBUS ready */ for ( i = 0; i < 0xFFFF; i++ ) if ( (inb(SMBUS_IO_BASE) & 0x01) == 0 ) break; /* set host command */ outb(bIndex, SMBUS_IO_BASE+3); /* set slave address */ outb((devAdr << 1) | 0x01, SMBUS_IO_BASE+4); /* start */ outb(0x48, SMBUS_IO_BASE+2); /* SMBUS Wait Ready */ for ( i = 0; i < 0xFFFF; i++ ) if ( ((sts = (inb(SMBUS_IO_BASE) & 0x1f)) & 0x01) == 0 ) break; if ((sts & ~3) != 0) { smbus_print_error(sts); return 0; } bData=inb(SMBUS_IO_BASE+5); return bData; }