void smi_write(u8_t phy_addr,u8_t reg_addr,u16_t data)
{
MCF_FEC_MMFR = MCF_FEC_MMFR_ST(0x1) | MCF_FEC_MMFR_OP_WRITE | (MCF_FEC_MMFR_PA(phy_addr)) | MCF_FEC_MMFR_RA(reg_addr) | MCF_FEC_MMFR_TA_10 | data;
smi_init(bsp_get_CPU_clock_speed()); /* enable MII clock speed after MMFR is written */
while ((MCF_FEC_EIR & MCF_FEC_EIR_MII) == 0) { __asm__ ("nop"); }
smi_init(0); /* MII frame sent, disable clock until next operation */
MCF_FEC_EIR |= MCF_FEC_EIR_MII;
}
u16_t smi_read(u8_t phy_addr,u8_t reg_addr)
{
MCF_FEC_MMFR = MCF_FEC_MMFR_ST(0x1) | MCF_FEC_MMFR_OP_READ | (MCF_FEC_MMFR_PA(phy_addr)) | MCF_FEC_MMFR_RA(reg_addr) | MCF_FEC_MMFR_TA_10;
smi_init(bsp_get_CPU_clock_speed()); /* enable MII clock speed after MMFR is written */
while ((MCF_FEC_EIR & MCF_FEC_EIR_MII) == 0) { __asm__ ("nop"); }
smi_init(0); /* MII frame sent, disable clock until next operation */
MCF_FEC_EIR |= MCF_FEC_EIR_MII;
return MCF_FEC_MMFR&0xFFFF;
}
int board_early_init_f()
{
#if defined(CONFIG_ST_SMI)
smi_init();
#endif
return 0;
}
static void met_smi_start(void)
{
if (do_smi()) {
//printk("do smi\n");
smi_init();
smi_stop();
smi_start();
}
}
static void met_smi_start(void)
{
/* HW setting */
if (do_smi()) {
smi_init();
smi_stop();
smi_start();
}
}
static void met_smi_start(void)
{
#ifdef DEBUG_MET_SMI_TEST_PATTERN
int i;
for (i=0; i<SMI_LARB_NUMBER; i++) {
printk("master = %d, "
"port = %d, "
"rwtype = %d, "
"desttype = %d, "
"bustype = %d, "
"mode = %d\n",
smi_larb[i].master,
smi_larb[i].port,
smi_larb[i].rwtype,
smi_larb[i].desttype,
smi_larb[i].bustype,
smi_larb[i].mode);
}
for (i=0; i<SMI_COMM_NUMBER; i++) {
printk("master = %d, "
"port = %d, "
"rwtype = %d, "
"desttype = %d, "
"bustype = %d, "
"mode = %d\n",
smi_comm[i].master,
smi_comm[i].port,
smi_comm[i].rwtype,
smi_comm[i].desttype,
smi_comm[i].bustype,
smi_comm[i].mode);
}
printk("requesttype = %d, "
"toggle_cnt = %d, "
"count = %d, "
"portnum = %d\n",
monitorctrl.bRequestSelection,
toggle_cnt,
count,
portnum);
#else
//printk("do smi mode=%d, toggle_idx=%d, idx220_port=%lu\n", do_smi(), toggle_idx, allport[220].port);
if (do_smi()) {
//printk("do smi\n");
smi_init();
smi_stop();
smi_start();
}
#endif
}
int rtl8367_switch_init_pre(void)
{
u32 data;
rtk_api_ret_t retVal;
data = le32_to_cpu(*(volatile u32 *)(RALINK_REG_GPIOMODE));
/* Configure I2C pin as GPIO mode or I2C mode */
if (SMI_SCK == 2 || SMI_SDA == 1)
data |= RALINK_GPIOMODE_I2C;
else
data &= ~RALINK_GPIOMODE_I2C;
/* Configure MDC/MDIO pin as GPIO mode or MDIO mode */
if (SMI_SCK == 23 || SMI_SDA == 22)
data |= RALINK_GPIOMODE_MDIO;
else
data &= ~RALINK_GPIOMODE_MDIO;
*((volatile uint32_t *)(RALINK_REG_GPIOMODE)) = cpu_to_le32(data);
smi_init(SMI_SCK, SMI_SDA);
printf("\n Init RTL8367 external switch...");
/* wait min 200ms after power-on-reset */
mdelay(200);
test_smi_signal_and_wait();
/* main switch init */
retVal = rtk_switch_init();
if (retVal != RT_ERR_OK) {
printf("FAILED! (code: %d)\n", retVal);
return retVal;
}
/* power down all ports (prevent spoofing) */
rtl8367_port_power(RTL8367_PORT_WAN, 0);
rtl8367_port_power(RTL8367_PORT_LAN4, 0);
rtl8367_port_power(RTL8367_PORT_LAN3, 0);
rtl8367_port_power(RTL8367_PORT_LAN2, 0);
rtl8367_port_power(RTL8367_PORT_LAN1, 0);
printf("SUCCESS!\n");
return RT_ERR_OK;
}
int
main(int argc, char *argv[])
{
struct sockaddr_un sun;
struct parse_result *res;
struct imsg imsg;
int ctl_sock;
int done = 0;
int n;
int ch;
const char *sock = SNMPD_SOCKET;
if ((env = calloc(1, sizeof(struct snmpd))) == NULL)
err(1, "calloc");
gettimeofday(&env->sc_starttime, NULL);
while ((ch = getopt(argc, argv, "ns:")) != -1) {
switch (ch) {
case 'n':
env->sc_flags |= SNMPD_F_NONAMES;
break;
case 's':
sock = optarg;
break;
default:
usage();
/* NOTREACHED */
}
}
argc -= optind;
argv += optind;
smi_init();
/* parse options */
if ((res = parse(argc, argv)) == NULL)
exit(1);
switch (res->action) {
case NONE:
usage();
break;
case SHOW_MIB:
show_mib();
break;
case WALK:
case GET:
case BULKWALK:
snmpclient(res);
break;
default:
goto connect;
}
free(env);
return (0);
connect:
/* connect to snmpd control socket */
if ((ctl_sock = socket(AF_UNIX, SOCK_STREAM, 0)) == -1)
err(1, "socket");
bzero(&sun, sizeof(sun));
sun.sun_family = AF_UNIX;
strlcpy(sun.sun_path, sock, sizeof(sun.sun_path));
reconnect:
if (connect(ctl_sock, (struct sockaddr *)&sun, sizeof(sun)) == -1) {
/* Keep retrying if running in monitor mode */
if (res->action == MONITOR &&
(errno == ENOENT || errno == ECONNREFUSED)) {
usleep(100);
goto reconnect;
}
err(1, "connect: %s", sock);
}
imsg_init(&ibuf, ctl_sock);
done = 0;
/* process user request */
switch (res->action) {
case MONITOR:
imsg_compose(&ibuf, IMSG_CTL_NOTIFY, 0, 0, -1, NULL, 0);
break;
case NONE:
case SHOW_MIB:
case WALK:
case GET:
case BULKWALK:
break;
case TRAP:
/* explicitly downgrade the socket */
imsg_compose(&ibuf, IMSG_SNMP_AGENTX, 0, 0, -1, NULL, 0);
break;
}
while (ibuf.w.queued)
if (msgbuf_write(&ibuf.w) <= 0 && errno != EAGAIN)
err(1, "write error");
while (!done) {
if ((n = imsg_read(&ibuf)) == -1)
errx(1, "imsg_read error");
if (n == 0)
errx(1, "pipe closed");
while (!done) {
if ((n = imsg_get(&ibuf, &imsg)) == -1)
errx(1, "imsg_get error");
if (n == 0)
break;
switch (res->action) {
case MONITOR:
done = monitor(&imsg);
break;
case TRAP:
if (imsg.hdr.type == IMSG_CTL_OK) {
snmpctl_trap(ctl_sock, res);
done = 1;
} else
errx(1, "snmpd refused connection");
break;
case NONE:
case SHOW_MIB:
case WALK:
case GET:
case BULKWALK:
break;
}
imsg_free(&imsg);
}
}
close(ctl_sock);
return (0);
}
int
rtl8367r_switch_init_pre()
{
rtk_api_ret_t retVal;
unsigned long gpiomode;
set_mdc_to_gpio_mode();
smi_reset();
// after reset, switch need to delay 1 ms
// if not, SMI may send out unknown data
udelay(1000);
smi_init();
test_smi_signal_and_wait();
retVal = rtk_switch_init();
printf("rtk_switch_init(): return %d\n", retVal);
if (retVal != RT_ERR_OK) return retVal;
//
// RALINK uses RGMII to connect switch IC directly
// we need to set the MDIO mode here
//
rtk_port_mac_ability_t mac_cfg;
mac_cfg.forcemode = MAC_FORCE;
mac_cfg.speed = SPD_1000M;
mac_cfg.duplex = FULL_DUPLEX;
mac_cfg.link = PORT_LINKUP;
mac_cfg.nway = DISABLED;
mac_cfg.txpause = ENABLED;
mac_cfg.rxpause = ENABLED;
retVal = rtk_port_macForceLinkExt_set (1, MODE_EXT_RGMII,&mac_cfg);
printf("rtk_port_macForceLinkExt_set(): return %d\n", retVal);
int input_txDelay = 1;
int input_rxDelay = 2;
printf("input_txDelay:%d, input_rxDelay:%d\n", input_txDelay, input_rxDelay);
retVal = rtk_port_rgmiiDelayExt_set(1, input_txDelay, input_rxDelay);
printf("rtk_port_rgmiiDelayExt_set(): return %d\n", retVal);
// power down all LAN ports
// this is to force DHCP IP address new when PC cable connects to LAN port
rtk_port_phy_data_t pData;
rtk_port_phyReg_get(1, PHY_CONTROL_REG, &pData);
printf("** rtk_port_phyReg_get = %x\n", pData);
pData |= CONTROL_REG_PORT_POWER_BIT;
rtk_port_phyReg_set(1, PHY_CONTROL_REG, pData);
rtk_port_phyReg_get(2, PHY_CONTROL_REG, &pData);
printf("** rtk_port_phyReg_get = %x\n", pData);
pData |= CONTROL_REG_PORT_POWER_BIT;
rtk_port_phyReg_set(2, PHY_CONTROL_REG, pData);
rtk_port_phyReg_get(3, PHY_CONTROL_REG, &pData);
printf("** rtk_port_phyReg_get = %x\n", pData);
pData |= CONTROL_REG_PORT_POWER_BIT;
rtk_port_phyReg_set(3, PHY_CONTROL_REG, pData);
rtk_port_phyReg_get(4, PHY_CONTROL_REG, &pData);
printf("** rtk_port_phyReg_get = %x\n", pData);
pData |= CONTROL_REG_PORT_POWER_BIT;
rtk_port_phyReg_set(4, PHY_CONTROL_REG, pData);
/*
{
int i;
for (i=0; i<8; i++)
{
rtk_port_phy_data_t pData;
rtk_port_phyReg_get(i, 1, &pData);
printf("** %d rtk_port_phyReg_get = %x\n", i, pData);
}
}
*/
/*
{
// read EXT MAC status
// seems not works
rtk_uint32 data;
rtk_api_ret_t retVal;
if((retVal = rtl8367b_getAsicReg(0x1305, &data)) != RT_ERR_OK)
{
printf("error = %d\n", retVal);
}
printf("data = %x\n", data);
if((retVal = rtl8367b_getAsicReg(0x1311, &data)) != RT_ERR_OK)
{
printf("error = %d\n", retVal);
}
printf("data = %x\n", data);
//data 1305 = c010
//data 1311 = 1076
}
*/
rtl8367r_switch_inited = 1;
return RT_ERR_OK;
}
