static int smi_write_reg(int argc, char *argv[]){
int rv;
int c;
rtk_uint32 mAddrs = 0;
rtk_uint32 rData = 0;
static const char * shortopts = "a:d:";
static const struct option longopts[] = {
{"add", required_argument, NULL, 'a'},
{"data", required_argument, NULL, 'd'},
{NULL, 0, NULL, 0} };
while((c = getopt_long(argc,argv,shortopts,longopts,NULL)) != -1){
switch(c){
case 'a':
mAddrs = strtol(optarg, NULL, 0);
break;
case 'd':
rData = strtol(optarg, NULL, 0);
break;
default:
break;
}
}
rv = smi_write(mAddrs, rData);
if(rv){
printf("smi write error!");
return 1;
}
return 0;
}
static void smi_ir_start(struct smi_rc *ir)
{
struct smi_dev *dev = ir->dev;
smi_write(IR_Idle_Cnt_Low, 0x00140070);
/* smi_write(IR_Idle_Cnt_Low, 0x003200c8); */
msleep(2);
smi_set(IR_Init_Reg, 0x90);
smi_ir_enableInterrupt(ir);
/* tasklet_enable(&ir->tasklet);*/
}
/* Function Name:
* rtl8367b_setAsicReg
* Description:
* Set content of asic register
* Input:
* reg - register's address
* value - Value setting to register
* Output:
* None
* Return:
* RT_ERR_OK - Success
* RT_ERR_SMI - SMI access error
* Note:
* The value will be set to ASIC mapping address only and it is always return RT_ERR_OK while setting un-mapping address registers
*/
ret_t rtl8367b_setAsicReg(rtk_uint32 reg, rtk_uint32 value)
{
#if defined(RTK_X86_ASICDRV)/*RTK-CNSD2-NickWu-20061222: for x86 compile*/
ret_t retVal;
retVal = Access_Write(reg,2,value);
if(TRUE != retVal) return RT_ERR_SMI;
if(0x8367B == cleDebuggingDisplay)
PRINT("W[0x%4.4x]=0x%4.4x\n",reg,value);
#elif defined(CONFIG_RTL8367B_ASICDRV_TEST)
/*MIBs emulating*/
if(reg == RTL8367B_REG_MIB_ADDRESS)
{
CleVirtualReg[RTL8367B_MIB_COUNTER_BASE_REG] = 0x1;
CleVirtualReg[RTL8367B_MIB_COUNTER_BASE_REG+1] = 0x2;
CleVirtualReg[RTL8367B_MIB_COUNTER_BASE_REG+2] = 0x3;
CleVirtualReg[RTL8367B_MIB_COUNTER_BASE_REG+3] = 0x4;
}
if(reg >= CLE_VIRTUAL_REG_SIZE)
return RT_ERR_OUT_OF_RANGE;
CleVirtualReg[reg] = value;
if(0x8367B == cleDebuggingDisplay)
PRINT("W[0x%4.4x]=0x%4.4x\n",reg,CleVirtualReg[reg]);
#elif defined(EMBEDDED_SUPPORT)
if(reg > RTL8367B_REGDATAMAX || value > RTL8367B_REGDATAMAX )
return RT_ERR_INPUT;
setReg(reg, value);
#else
ret_t retVal;
retVal = smi_write(reg, value);
if(retVal != RT_ERR_OK)
return RT_ERR_SMI;
#ifdef CONFIG_RTL865X_CLE
if(0x8367B == cleDebuggingDisplay)
PRINT("W[0x%4.4x]=0x%4.4x\n",reg,value);
#endif
#endif
return RT_ERR_OK;
}
/*
@func ret_t | rtl8370_setAsicReg | Set content of asic register.
@parm uint32 | reg | Register's address.
@parm uint32 | value | Value setting to register.
@rvalue RT_ERR_OK | Success.
@rvalue RT_ERR_SMI | SMI access error.
@comm
The value will be set to ASIC mapping address only and it is always return RT_ERR_OK while setting un-mapping address registers.
*/
ret_t rtl8370_setAsicReg(uint32 reg, uint32 value)
{
#if defined(RTK_X86_ASICDRV)/*RTK-CNSD2-NickWu-20061222: for x86 compile*/
ret_t retVal;
retVal = Access_Write(reg, 2, value);
if (retVal != TRUE)
return RT_ERR_SMI;
if(0x8370 == cleDebuggingDisplay)
PRINT("W[0x%4.4x]=0x%4.4x\n",reg,value);
#elif defined(CONFIG_RTL8370_ASICDRV_TEST)
/*MIBs emulating*/
if(reg == RTL8370_REG_MIB_ADDRESS)
{
Rtl8370sVirtualReg[RTL8370_MIB_COUNTER_BASE_REG] = 0x1;
Rtl8370sVirtualReg[RTL8370_MIB_COUNTER_BASE_REG+1] = 0x2;
Rtl8370sVirtualReg[RTL8370_MIB_COUNTER_BASE_REG+2] = 0x3;
Rtl8370sVirtualReg[RTL8370_MIB_COUNTER_BASE_REG+3] = 0x4;
}
if(reg >= RTL8370_VIRTUAL_REG_SIZE)
return RT_ERR_OUT_OF_RANGE;
Rtl8370sVirtualReg[reg] = value;
if(0x8370 == cleDebuggingDisplay)
PRINT("W[0x%4.4x]=0x%4.4x\n",reg,Rtl8370sVirtualReg[reg]);
#else
ret_t retVal;
retVal = smi_write(reg, value);
if (retVal != RT_ERR_OK)
return RT_ERR_SMI;
#ifdef CONFIG_RTL865X_CLE
if(0x8370 == cleDebuggingDisplay)
PRINT("W[0x%4.4x]=0x%4.4x\n",reg,value);
#endif
#endif
return RT_ERR_OK;
}
static int smi_hw_init(struct smi_dev *dev)
{
u32 port_mux, port_ctrl, int_stat;
dprintk("%s\n", __func__);
/* set port mux.*/
port_mux = smi_read(MUX_MODE_CTRL);
port_mux &= ~(rbPaMSMask);
port_mux |= rbPaMSDtvNoGpio;
port_mux &= ~(rbPbMSMask);
port_mux |= rbPbMSDtvNoGpio;
port_mux &= ~(0x0f0000);
port_mux |= 0x50000;
smi_write(MUX_MODE_CTRL, port_mux);
/* set DTV register.*/
/* Port A */
port_ctrl = smi_read(VIDEO_CTRL_STATUS_A);
port_ctrl &= ~0x01;
smi_write(VIDEO_CTRL_STATUS_A, port_ctrl);
port_ctrl = smi_read(MPEG2_CTRL_A);
port_ctrl &= ~0x40;
port_ctrl |= 0x80;
smi_write(MPEG2_CTRL_A, port_ctrl);
/* Port B */
port_ctrl = smi_read(VIDEO_CTRL_STATUS_B);
port_ctrl &= ~0x01;
smi_write(VIDEO_CTRL_STATUS_B, port_ctrl);
port_ctrl = smi_read(MPEG2_CTRL_B);
port_ctrl &= ~0x40;
port_ctrl |= 0x80;
smi_write(MPEG2_CTRL_B, port_ctrl);
/* disable and clear interrupt.*/
smi_write(MSI_INT_ENA_CLR, ALL_INT);
int_stat = smi_read(MSI_INT_STATUS);
smi_write(MSI_INT_STATUS_CLR, int_stat);
/* reset demod.*/
smi_clear(PERIPHERAL_CTRL, 0x0303);
msleep(50);
smi_set(PERIPHERAL_CTRL, 0x0101);
return 0;
}
/* Function Name:
* rtl8367b_setAsicRegBit
* Description:
* Set a bit value of a specified register
* Input:
* reg - register's address
* bit - bit location
* value - value to set. It can be value 0 or 1.
* Output:
* None
* Return:
* RT_ERR_OK - Success
* RT_ERR_SMI - SMI access error
* RT_ERR_INPUT - Invalid input parameter
* Note:
* Set a bit of a specified register to 1 or 0.
*/
ret_t rtl8367b_setAsicRegBit(rtk_uint32 reg, rtk_uint32 bit, rtk_uint32 value)
{
#if defined(RTK_X86_ASICDRV)
rtk_uint32 regData;
ret_t retVal;
if(bit >= RTL8367B_REGBITLENGTH)
return RT_ERR_INPUT;
retVal = Access_Read(reg, 2, ®Data);
if(TRUE != retVal)
return RT_ERR_SMI;
if(0x8367B == cleDebuggingDisplay)
PRINT("R[0x%4.4x]=0x%4.4x\n", reg, regData);
if(value)
regData = regData | (1 << bit);
else
regData = regData & (~(1 << bit));
retVal = Access_Write(reg,2, regData);
if(TRUE != retVal)
return RT_ERR_SMI;
if(0x8367B == cleDebuggingDisplay)
PRINT("W[0x%4.4x]=0x%4.4x\n", reg, regData);
#elif defined(CONFIG_RTL8367B_ASICDRV_TEST)
if(bit >= RTL8367B_REGBITLENGTH)
return RT_ERR_INPUT;
else if(reg >= CLE_VIRTUAL_REG_SIZE)
return RT_ERR_OUT_OF_RANGE;
if(value)
{
CleVirtualReg[reg] = CleVirtualReg[reg] | (1 << bit);
}
else
{
CleVirtualReg[reg] = CleVirtualReg[reg] & (~(1 << bit));
}
if(0x8367B == cleDebuggingDisplay)
PRINT("W[0x%4.4x]=0x%4.4x\n", reg, CleVirtualReg[reg]);
#elif defined(EMBEDDED_SUPPORT)
rtk_uint16 tmp;
if(reg > RTL8367B_REGDATAMAX || value > 1)
return RT_ERR_INPUT;
tmp = getReg(reg);
tmp &= (1 << bitIdx);
tmp |= (value << bitIdx);
setReg(reg, tmp);
#else
rtk_uint32 regData;
ret_t retVal;
if(bit >= RTL8367B_REGBITLENGTH)
return RT_ERR_INPUT;
retVal = smi_read(reg, ®Data);
if(retVal != RT_ERR_OK)
return RT_ERR_SMI;
#ifdef CONFIG_RTL865X_CLE
if(0x8367B == cleDebuggingDisplay)
PRINT("R[0x%4.4x]=0x%4.4x\n", reg, regData);
#endif
if(value)
regData = regData | (1 << bit);
else
regData = regData & (~(1 << bit));
retVal = smi_write(reg, regData);
if(retVal != RT_ERR_OK)
return RT_ERR_SMI;
#ifdef CONFIG_RTL865X_CLE
if(0x8367B == cleDebuggingDisplay)
PRINT("W[0x%4.4x]=0x%4.4x\n", reg, regData);
#endif
#endif
return RT_ERR_OK;
}
/* Function Name:
* rtl8367b_setAsicRegBits
* Description:
* Set bits value of a specified register
* Input:
* reg - register's address
* bits - bits mask for setting
* value - bits value for setting
* Output:
* None
* Return:
* RT_ERR_OK - Success
* RT_ERR_SMI - SMI access error
* RT_ERR_INPUT - Invalid input parameter
* Note:
* Set bits of a specified register to value. Both bits and value are be treated as bit-mask
*/
ret_t rtl8367b_setAsicRegBits(rtk_uint32 reg, rtk_uint32 bits, rtk_uint32 value)
{
#if defined(RTK_X86_ASICDRV)
rtk_uint32 regData;
ret_t retVal;
rtk_uint32 bitsShift;
rtk_uint32 valueShifted;
if(bits >= (1 << RTL8367B_REGBITLENGTH) )
return RT_ERR_INPUT;
bitsShift = 0;
while(!(bits & (1 << bitsShift)))
{
bitsShift++;
if(bitsShift >= RTL8367B_REGBITLENGTH)
return RT_ERR_INPUT;
}
valueShifted = value << bitsShift;
if(valueShifted > RTL8367B_REGDATAMAX)
return RT_ERR_INPUT;
retVal = Access_Read(reg, 2, ®Data);
if(TRUE != retVal)
return RT_ERR_SMI;
if(0x8367B == cleDebuggingDisplay)
PRINT("R[0x%4.4x]=0x%4.4x\n", reg, regData);
regData = regData & (~bits);
regData = regData | (valueShifted & bits);
retVal = Access_Write(reg,2, regData);
if(TRUE != retVal)
return RT_ERR_SMI;
if(0x8367B == cleDebuggingDisplay)
PRINT("W[0x%4.4x]=0x%4.4x\n", reg, regData);
#elif defined(CONFIG_RTL8367B_ASICDRV_TEST)
rtk_uint32 regData;
rtk_uint32 bitsShift;
rtk_uint32 valueShifted;
if(bits >= (1 << RTL8367B_REGBITLENGTH) )
return RT_ERR_INPUT;
bitsShift = 0;
while(!(bits & (1 << bitsShift)))
{
bitsShift++;
if(bitsShift >= RTL8367B_REGBITLENGTH)
return RT_ERR_INPUT;
}
valueShifted = value << bitsShift;
if(valueShifted > RTL8367B_REGDATAMAX)
return RT_ERR_INPUT;
if(reg >= CLE_VIRTUAL_REG_SIZE)
return RT_ERR_OUT_OF_RANGE;
regData = CleVirtualReg[reg] & (~bits);
regData = regData | (valueShifted & bits);
CleVirtualReg[reg] = regData;
if(0x8367B == cleDebuggingDisplay)
PRINT("W[0x%4.4x]=0x%4.4x\n", reg, regData);
#elif defined(EMBEDDED_SUPPORT)
rtk_uint32 regData;
rtk_uint32 bitsShift;
rtk_uint32 valueShifted;
if(reg > RTL8367B_REGDATAMAX )
return RT_ERR_INPUT;
if(bits >= (1 << RTL8367B_REGBITLENGTH) )
return RT_ERR_INPUT;
bitsShift = 0;
while(!(bits & (1 << bitsShift)))
{
bitsShift++;
if(bitsShift >= RTL8367B_REGBITLENGTH)
return RT_ERR_INPUT;
}
valueShifted = value << bitsShift;
if(valueShifted > RTL8367B_REGDATAMAX)
return RT_ERR_INPUT;
regData = getReg(reg);
regData = regData & (~bits);
regData = regData | (valueShifted & bits);
setReg(reg, regData);
#else
rtk_uint32 regData;
ret_t retVal;
rtk_uint32 bitsShift;
rtk_uint32 valueShifted;
if(bits >= (1 << RTL8367B_REGBITLENGTH) )
return RT_ERR_INPUT;
bitsShift = 0;
while(!(bits & (1 << bitsShift)))
{
bitsShift++;
if(bitsShift >= RTL8367B_REGBITLENGTH)
return RT_ERR_INPUT;
}
valueShifted = value << bitsShift;
if(valueShifted > RTL8367B_REGDATAMAX)
return RT_ERR_INPUT;
retVal = smi_read(reg, ®Data);
if(retVal != RT_ERR_OK)
return RT_ERR_SMI;
#ifdef CONFIG_RTL865X_CLE
if(0x8367B == cleDebuggingDisplay)
PRINT("R[0x%4.4x]=0x%4.4x\n", reg, regData);
#endif
regData = regData & (~bits);
regData = regData | (valueShifted & bits);
retVal = smi_write(reg, regData);
if(retVal != RT_ERR_OK)
return RT_ERR_SMI;
#ifdef CONFIG_RTL865X_CLE
if(0x8367B == cleDebuggingDisplay)
PRINT("W[0x%4.4x]=0x%4.4x\n", reg, regData);
#endif
#endif
return RT_ERR_OK;
}
int rtk_switch_reg_access(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
int cmd = 0, cnt = 1, ret = 0, r, infinit = 0;
uint32_t reg, data, data1;
if (!strcmp(argv[0], "rtkswreg.r") && (argc >= 2 && argc <= 3)) {
cmd = 1;
if (argc == 3)
cnt = simple_strtoul(argv[2], NULL, 0);
} else if (!strcmp(argv[0], "rtkswreg.w") && (argc >= 3 && argc <= 4)) {
cmd = 2;
if (argc == 4) {
cnt = simple_strtoul(argv[3], NULL, 0);
}
}
if (cnt >= 99999)
infinit = 1;
if (!infinit && cnt > 1)
printf("Repeat rtkswreg command %d times\n", cnt);
while (infinit || cnt-- > 0) {
switch (cmd) {
case 1:
reg = simple_strtoul(argv[1], NULL, 0);
r = smi_read(reg, &data);
if (r == RT_ERR_OK)
printf("Realtek Switch register 0x%x = 0x%x\n", reg, data);
else {
printf("%s() smi_read(0x%x) failed. return %d\n", __func__, reg, r);
ret = 2;
}
break;
case 2:
reg = simple_strtoul(argv[1], NULL, 0);
data = simple_strtoul(argv[2], NULL, 0);
data1 = ~data;
r = smi_write(reg, data);
if (r == RT_ERR_OK)
printf("Realtek Switch register 0x%x = 0x%x\n", reg, data);
else {
printf("%s() smi_write(0x%x) failed. return %d\n", __func__, reg, r);
ret = 3;
}
/* Verify */
if (!ret) {
r = smi_read(reg, &data1);
if (r == RT_ERR_OK && data == data1) {
printf("Write 0x%x to Realtek Switch register 0x%x. Verify OK.\n", data, reg);
}
else if (r == RT_ERR_OK) {
printf("Write 0x%x to Realtek Switch register 0x%x. Got 0x%x. Mismatch.\n", data, reg, data1);
ret = 4;
} else {
printf("%s() smi_read(0x%x) failed. return %d\n", __func__, reg, r);
ret = 5;
}
}
break;
default:
#ifdef CFG_LONGHELP
printf ("%s\n%s\n", cmdtp->usage, cmdtp->help);
#else
printf ("Usage:\n%s\n", cmdtp->usage);
#endif
cnt = 0;
ret = 1;
}
}
return ret;
}
static void smi_ir_clearInterrupt(struct smi_rc *ir)
{
struct smi_dev *dev = ir->dev;
smi_write(MSI_INT_STATUS_CLR, IR_X_INT);
}
static void smi_ir_disableInterrupt(struct smi_rc *ir)
{
struct smi_dev *dev = ir->dev;
smi_write(MSI_INT_ENA_CLR, IR_X_INT);
}
/*
@func ret_t | rtl8370_setAsicRegBits | Set bits value of a specified register.
@parm uint32 | reg | Register's address.
@parm uint32 | bits | Bits mask for setting.
@parm uint32 | value | Bits value for setting. Value of bits will be set with mapping mask bit is 1.
@rvalue RT_ERR_OK | Success.
@rvalue RT_ERR_SMI | SMI access error.
@rvalue RT_ERR_INPUT | Invalid input parameter.
@comm
Set bits of a specified register to value. Both bits and value are be treated as bit-mask.
*/
ret_t rtl8370_setAsicRegBits(uint32 reg, uint32 bits, uint32 value)
{
#if defined(RTK_X86_ASICDRV)/*RTK-CNSD2-NickWu-20061222: for x86 compile*/
uint32 regData;
ret_t retVal;
uint32 bitsShift;
uint32 valueShifted;
if(bits >= (1<<RTL8370_REGBITLENGTH) )
return RT_ERR_INPUT;
bitsShift = 0;
while(!(bits & (1 << bitsShift)))
{
bitsShift++;
if(bitsShift >= RTL8370_REGBITLENGTH)
return RT_ERR_INPUT;
}
valueShifted = value << bitsShift;
if(valueShifted > RTL8370_REGDATAMAX)
return RT_ERR_INPUT;
retVal = Access_Read(reg, 2, ®Data);
if (retVal != TRUE)
return RT_ERR_SMI;
if(0x8370 == cleDebuggingDisplay)
PRINT("R[0x%4.4x]=0x%4.4x\n",reg,regData);
regData = regData & (~bits);
regData = regData | (valueShifted & bits);
retVal = Access_Write(reg, 2, regData);
if (retVal != TRUE)
return RT_ERR_SMI;
if(0x8370 == cleDebuggingDisplay)
PRINT("W[0x%4.4x]=0x%4.4x\n",reg,regData);
#elif defined(CONFIG_RTL8370_ASICDRV_TEST)
uint32 regData;
uint32 bitsShift;
uint32 valueShifted;
if(bits>= (1<<RTL8370_REGBITLENGTH) )
return RT_ERR_INPUT;
bitsShift = 0;
while(!(bits & (1 << bitsShift)))
{
bitsShift++;
if(bitsShift >= RTL8370_REGBITLENGTH)
return RT_ERR_INPUT;
}
valueShifted = value << bitsShift;
if(valueShifted > RTL8370_REGDATAMAX)
return RT_ERR_INPUT;
if(reg >= RTL8370_VIRTUAL_REG_SIZE)
return RT_ERR_OUT_OF_RANGE;
regData = Rtl8370sVirtualReg[reg] & (~bits);
regData = regData | (valueShifted & bits);
Rtl8370sVirtualReg[reg] = regData;
if(0x8370 == cleDebuggingDisplay)
PRINT("W[0x%4.4x]=0x%4.4x\n",reg,regData);
#else
uint32 regData;
ret_t retVal;
uint32 bitsShift;
uint32 valueShifted;
if(bits>= (1<<RTL8370_REGBITLENGTH) )
return RT_ERR_INPUT;
bitsShift = 0;
while(!(bits & (1 << bitsShift)))
{
bitsShift++;
if(bitsShift >= RTL8370_REGBITLENGTH)
return RT_ERR_INPUT;
}
valueShifted = value << bitsShift;
if(valueShifted > RTL8370_REGDATAMAX)
return RT_ERR_INPUT;
retVal = smi_read(reg, ®Data);
if (retVal != RT_ERR_OK)
return RT_ERR_SMI;
#ifdef CONFIG_RTL865X_CLE
if(0x8370 == cleDebuggingDisplay)
PRINT("R[0x%4.4x]=0x%4.4x\n",reg,regData);
#endif
regData = regData & (~bits);
regData = regData | (valueShifted & bits);
retVal = smi_write(reg, regData);
if (retVal != RT_ERR_OK)
return RT_ERR_SMI;
#ifdef CONFIG_RTL865X_CLE
if(0x8370 == cleDebuggingDisplay)
PRINT("W[0x%4.4x]=0x%4.4x\n",reg,regData);
#endif
#endif
return RT_ERR_OK;
}
/*
@func ret_t | rtl8370_setAsicRegBit | Set a bit value of a specified register.
@parm uint32 | reg | Register's address.
@parm uint32 | bit | Bit location. For 16-bits register only. Maximun value is 15 for MSB location.
@parm uint32 | value | Value to set. It can be value 0 or 1.
@rvalue RT_ERR_OK | Success.
@rvalue RT_ERR_SMI | SMI access error.
@rvalue RT_ERR_INPUT | Invalid input parameter.
@comm
Set a bit of a specified register to 1 or 0. It is 16-bits system of RTL8366s chip.
*/
ret_t rtl8370_setAsicRegBit(uint32 reg, uint32 bit, uint32 value)
{
#if defined(RTK_X86_ASICDRV)
uint32 regData;
ret_t retVal;
if(bit >= RTL8370_REGBITLENGTH)
return RT_ERR_INPUT;
retVal = Access_Read(reg, 2, ®Data);
if (retVal != TRUE)
return RT_ERR_SMI;
if(0x8370 == cleDebuggingDisplay)
PRINT("R[0x%4.4x]=0x%4.4x\n",reg,regData);
if (value)
regData = regData | (1<<bit);
else
regData = regData & ~(1<<bit);
retVal = Access_Write(reg, 2, regData);
if (retVal != TRUE)
return RT_ERR_SMI;
if(0x8370 == cleDebuggingDisplay)
PRINT("W[0x%4.4x]=0x%4.4x\n",reg,regData);
#elif defined(CONFIG_RTL8370_ASICDRV_TEST)
if(bit>=RTL8370_REGBITLENGTH)
return RT_ERR_INPUT;
else if(reg >= RTL8370_VIRTUAL_REG_SIZE)
return RT_ERR_OUT_OF_RANGE;
if (value)
{
Rtl8370sVirtualReg[reg] = Rtl8370sVirtualReg[reg] | (1<<bit);
}
else
{
Rtl8370sVirtualReg[reg] = Rtl8370sVirtualReg[reg] & (~(1<<bit));
}
if(0x8370 == cleDebuggingDisplay)
PRINT("W[0x%4.4x]=0x%4.4x\n",reg,Rtl8370sVirtualReg[reg]);
#else
uint32 regData;
ret_t retVal;
if(bit>=RTL8370_REGBITLENGTH)
return RT_ERR_INPUT;
retVal = smi_read(reg, ®Data);
if(retVal != RT_ERR_OK)
return RT_ERR_SMI;
#ifdef CONFIG_RTL865X_CLE
if(0x8370 == cleDebuggingDisplay)
PRINT("R[0x%4.4x]=0x%4.4x\n",reg,regData);
#endif
if (value)
regData = regData | (1<<bit);
else
regData = regData & (~(1<<bit));
retVal = smi_write(reg, regData);
if (retVal != RT_ERR_OK)
return RT_ERR_SMI;
#ifdef CONFIG_RTL865X_CLE
if(0x8370 == cleDebuggingDisplay)
PRINT("W[0x%4.4x]=0x%4.4x\n",reg,regData);
#endif
#endif
return RT_ERR_OK;
}
