void imx6q_restart(char mode, const char *cmd) { struct device_node *np; void __iomem *wdog_base; np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-wdt"); wdog_base = of_iomap(np, 0); if (!wdog_base) goto soft; imx_src_prepare_restart(); /* enable wdog */ writew_relaxed(1 << 2, wdog_base); /* write twice to ensure the request will not get ignored */ writew_relaxed(1 << 2, wdog_base); /* wait for reset to assert ... */ mdelay(500); pr_err("Watchdog reset failed to assert reset\n"); /* delay to allow the serial port to show the message */ mdelay(50); soft: /* we'll take a jump through zero as a poor second */ soft_restart(0); }
void iop3xx_restart(char mode, const char *cmd) { *IOP3XX_PCSR = 0x30; /* */ soft_restart(0); }
void s5p64x0_restart(char mode, const char *cmd) { if (mode != 's') arch_wdt_reset(); soft_restart(0); }
void s3c2416_restart(char mode, const char *cmd) { if (mode == 's') soft_restart(0); __raw_writel(S3C2443_SWRST_RESET, S3C2443_SWRST); }
void s5pc100_restart(char mode, const char *cmd) { if (mode != 's') samsung_wdt_reset(); soft_restart(0); }
void s5pc100_restart(enum reboot_mode mode, const char *cmd) { if (mode != REBOOT_SOFT) samsung_wdt_reset(); soft_restart(0); }
void machine_kexec(struct kimage *image) { unsigned long page_list; unsigned long reboot_code_buffer_phys; void *reboot_code_buffer; page_list = image->head & PAGE_MASK; /* we need both effective and real address here */ reboot_code_buffer_phys = page_to_pfn(image->control_code_page) << PAGE_SHIFT; reboot_code_buffer = page_address(image->control_code_page); /* Prepare parameters for reboot_code_buffer*/ kexec_start_address = image->start; kexec_indirection_page = page_list; kexec_mach_type = machine_arch_type; kexec_boot_atags = image->start - KEXEC_ARM_ZIMAGE_OFFSET + KEXEC_ARM_ATAGS_OFFSET; /* copy our kernel relocation code to the control code page */ memcpy(reboot_code_buffer, relocate_new_kernel, relocate_new_kernel_size); flush_icache_range((unsigned long) reboot_code_buffer, (unsigned long) reboot_code_buffer + KEXEC_CONTROL_PAGE_SIZE); printk(KERN_INFO "Bye!\n"); if (kexec_reinit) kexec_reinit(); soft_restart(reboot_code_buffer_phys); }
void s3c64xx_restart(char mode, const char *cmd) { if (mode != 's') arch_wdt_reset(); /* if all else fails, or mode was for soft, jump to 0 */ soft_restart(0); }
void s3c64xx_restart(enum reboot_mode mode, const char *cmd) { if (mode != REBOOT_SOFT) samsung_wdt_reset(); /* if all else fails, or mode was for soft, jump to 0 */ soft_restart(0); }
void hawaii_restart(char mode, const char *cmd) { #if defined(CONFIG_MFD_BCMPMU) || defined(CONFIG_MFD_BCM_PMU59xxx) int ret = 0; if (hard_reset_reason) { ret = bcmpmu_client_hard_reset(hard_reset_reason); BUG_ON(ret); } else { switch (mode) { case 's': /* Jump into X address. Unused. * Kept to catch wrong mode*/ soft_restart(0); break; case 'h': default: /* Clear the magic key when reboot is required */ if (cmd == NULL) cdebugger_set_upload_magic(0x00); ret = reset_pwm_padcntrl(); if (ret) pr_err("%s Failed to reset PADCNTRL"\ "pin for PWM2 to GPIO24:%d\n",\ __func__, ret); kona_reset(mode, cmd); break; } } #else switch (mode) { case 's': /* Jump into X address. Unused. * Kept to catch wrong mode*/ soft_restart(0); break; case 'h': default: /* Clear the magic key when reboot is required */ if (cmd == NULL) cdebugger_set_upload_magic(0x00); kona_reset(mode, cmd); break; } #endif }
static void rpc_restart(char mode, const char *cmd) { iomd_writeb(0, IOMD_ROMCR0); /* * Jump into the ROM */ soft_restart(0); }
void nuc9xx_restart(enum reboot_mode mode, const char *cmd) { if (mode == REBOOT_SOFT) { /* Jump into ROM at address 0 */ soft_restart(0); } else { __raw_writel(WTE | WTRE | WTCLK, WTCR); } }
/* * Snapshot kernel memory and reset the system. * * swsusp_save() is executed in the suspend finisher so that the CPU * context pointer and memory are part of the saved image, which is * required by the resume kernel image to restart execution from * swsusp_arch_suspend(). * * soft_restart is not technically needed, but is used to get success * returned from cpu_suspend. * * When soft reboot completes, the hibernation snapshot is written out. */ static int notrace arch_save_image(unsigned long unused) { int ret; ret = swsusp_save(); if (ret == 0) soft_restart(virt_to_phys(cpu_resume)); return ret; }
void spear_restart(char mode, const char *cmd) { if (mode == 's') { /* software reset, Jump into ROM at address 0 */ soft_restart(0); } else { /* hardware reset, Use on-chip reset capability */ sysctl_soft_reset((void __iomem *)VA_SPEAR_SYS_CTRL_BASE); } }
void sa11x0_restart(char mode, const char *cmd) { if (mode == 's') { /* Jump into ROM at address 0 */ soft_restart(0); } else { /* Use on-chip reset capability */ RSRR = RSRR_SWR; } }
/* * Restore page contents for physical pages that were in use during loading * hibernation image. Switch to idmap_pgd so the physical page tables * are overwritten with the same contents. */ static void notrace arch_restore_image(void *unused) { struct pbe *pbe; cpu_switch_mm(idmap_pgd, &init_mm); for (pbe = restore_pblist; pbe; pbe = pbe->next) copy_page(pbe->orig_address, pbe->address); soft_restart(virt_to_phys(cpu_resume)); }
void sa11x0_restart(enum reboot_mode mode, const char *cmd) { if (mode == REBOOT_SOFT) { /* Jump into ROM at address 0 */ soft_restart(0); } else { /* Use on-chip reset capability */ RSRR = RSRR_SWR; } }
void s3c2412_restart(char mode, const char *cmd) { if (mode == 's') soft_restart(0); __raw_writel(0x00, S3C2412_CLKSRC); __raw_writel(S3C2412_SWRST_RESET, S3C2412_SWRST); mdelay(1); }
void machine_kexec(struct kimage *image) { unsigned long page_list; unsigned long reboot_code_buffer_phys; void *reboot_code_buffer; arch_kexec(); page_list = image->head & PAGE_MASK; /* we need both effective and real address here */ reboot_code_buffer_phys = page_to_pfn(image->control_code_page) << PAGE_SHIFT; reboot_code_buffer = page_address(image->control_code_page); /* Prepare parameters for reboot_code_buffer*/ #ifdef CONFIG_KEXEC_HARDBOOT mem_text_write_kernel_word(&kexec_start_address, image->start); mem_text_write_kernel_word(&kexec_indirection_page, page_list); mem_text_write_kernel_word(&kexec_mach_type, machine_arch_type); if (!kexec_boot_atags) mem_text_write_kernel_word(&kexec_boot_atags, image->start - KEXEC_ARM_ZIMAGE_OFFSET + KEXEC_ARM_ATAGS_OFFSET); mem_text_write_kernel_word(&kexec_hardboot, image->hardboot); #else kexec_start_address = image->start; kexec_indirection_page = page_list; kexec_mach_type = machine_arch_type; kexec_boot_atags = image->start - KEXEC_ARM_ZIMAGE_OFFSET + KEXEC_ARM_ATAGS_OFFSET; #endif /* copy our kernel relocation code to the control code page */ memcpy(reboot_code_buffer, relocate_new_kernel, relocate_new_kernel_size); flush_icache_range((unsigned long) reboot_code_buffer, (unsigned long) reboot_code_buffer + KEXEC_CONTROL_PAGE_SIZE); printk(KERN_INFO "Bye!\n"); if (kexec_reinit) kexec_reinit(); #ifdef CONFIG_KEXEC_HARDBOOT /* Run any final machine-specific shutdown code. */ if (image->hardboot && kexec_hardboot_hook) kexec_hardboot_hook(); #endif soft_restart(reboot_code_buffer_phys); }
/* * Reset the system. It is called by machine_restart(). */ void arch_reset(char mode, const char *cmd) { /* reset the chip */ __mxs_setl(MXS_CLKCTRL_RESET_CHIP, mxs_clkctrl_reset_addr); pr_err("Failed to assert the chip reset\n"); /* Delay to allow the serial port to show the message */ mdelay(50); /* We'll take a jump through zero as a poor second */ soft_restart(0); }
void spear_restart(char mode, const char *cmd) { if (mode == 's') { /* software reset, Jump into ROM at address 0 */ soft_restart(0); } else { /* hardware reset, Use on-chip reset capability */ #ifdef CONFIG_ARCH_SPEAR13XX writel_relaxed(0x01, SPEAR13XX_SYS_SW_RES); #else sysctl_soft_reset((void __iomem *)VA_SPEAR_SYS_CTRL_BASE); #endif } }
void machine_kexec(struct kimage *image) { unsigned long page_list; unsigned long reboot_code_buffer_phys; unsigned long reboot_entry = (unsigned long)relocate_new_kernel; unsigned long reboot_entry_phys; void *reboot_code_buffer; if (num_online_cpus() > 1) { pr_err("kexec: error: multiple CPUs still online\n"); return; } page_list = image->head & PAGE_MASK; /* we need both effective and real address here */ reboot_code_buffer_phys = page_to_pfn(image->control_code_page) << PAGE_SHIFT; reboot_code_buffer = page_address(image->control_code_page); /* Prepare parameters for reboot_code_buffer*/ mem_text_write_kernel_word(&kexec_start_address, image->start); mem_text_write_kernel_word(&kexec_indirection_page, page_list); mem_text_write_kernel_word(&kexec_mach_type, machine_arch_type); if (!kexec_boot_atags) mem_text_write_kernel_word(&kexec_boot_atags, image->start - KEXEC_ARM_ZIMAGE_OFFSET + KEXEC_ARM_ATAGS_OFFSET); #ifdef CONFIG_KEXEC_HARDBOOT mem_text_write_kernel_word(&kexec_hardboot, image->hardboot); #endif /* copy our kernel relocation code to the control code page */ reboot_entry = fncpy(reboot_code_buffer, reboot_entry, relocate_new_kernel_size); reboot_entry_phys = (unsigned long)reboot_entry + (reboot_code_buffer_phys - (unsigned long)reboot_code_buffer); printk(KERN_INFO "Bye!\n"); if (kexec_reinit) kexec_reinit(); #ifdef CONFIG_KEXEC_HARDBOOT /* Run any final machine-specific shutdown code. */ if (image->hardboot && kexec_hardboot_hook) kexec_hardboot_hook(); #endif soft_restart(reboot_code_buffer_phys); }
void footbridge_restart(char mode, const char *cmd) { if (mode == 's') { soft_restart(0x41000000); } else { *CSR_SA110_CNTL &= ~(1 << 13); *CSR_TIMER4_CNTL = TIMER_CNTL_ENABLE | TIMER_CNTL_AUTORELOAD | TIMER_CNTL_DIV16; *CSR_TIMER4_LOAD = 0x2; *CSR_TIMER4_CLR = 0; *CSR_SA110_CNTL |= (1 << 13); } }
void spear_restart(enum reboot_mode mode, const char *cmd) { if (mode == REBOOT_SOFT) { /* software reset, Jump into ROM at address 0 */ soft_restart(0); } else { /* hardware reset, Use on-chip reset capability */ #ifdef CONFIG_ARCH_SPEAR13XX writel_relaxed(0x01, SPEAR13XX_SYS_SW_RES); #endif #if defined(CONFIG_ARCH_SPEAR3XX) || defined(CONFIG_ARCH_SPEAR6XX) sysctl_soft_reset((void __iomem *)VA_SPEAR_SYS_CTRL_BASE); #endif } }
void ks8695_restart(char mode, const char *cmd) { unsigned int reg; if (mode == 's') soft_restart(0); /* */ reg = __raw_readl(KS8695_TMR_VA + KS8695_TMCON); __raw_writel(reg & ~TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON); /* */ __raw_writel((10 << 8) | T0TC_WATCHDOG, KS8695_TMR_VA + KS8695_T0TC); /* */ __raw_writel(reg | TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON); }
void ks8695_restart(enum reboot_mode reboot_mode, const char *cmd) { unsigned int reg; if (reboot_mode == REBOOT_SOFT) soft_restart(0); /* disable timer0 */ reg = readl_relaxed(KS8695_TMR_VA + KS8695_TMCON); writel_relaxed(reg & ~TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON); /* enable watchdog mode */ writel_relaxed((10 << 8) | T0TC_WATCHDOG, KS8695_TMR_VA + KS8695_T0TC); /* re-enable timer0 */ writel_relaxed(reg | TMCON_T0EN, KS8695_TMR_VA + KS8695_TMCON); }
void machine_kexec(struct kimage *image) { unsigned long page_list; unsigned long reboot_code_buffer_phys; unsigned long reboot_entry = (unsigned long)relocate_new_kernel; unsigned long reboot_entry_phys; void *reboot_code_buffer; /* * This can only happen if machine_shutdown() failed to disable some * CPU, and that can only happen if the checks in * machine_kexec_prepare() were not correct. If this fails, we can't * reliably kexec anyway, so BUG_ON is appropriate. */ BUG_ON(num_online_cpus() > 1); page_list = image->head & PAGE_MASK; /* we need both effective and real address here */ reboot_code_buffer_phys = page_to_pfn(image->control_code_page) << PAGE_SHIFT; reboot_code_buffer = page_address(image->control_code_page); /* Prepare parameters for reboot_code_buffer*/ set_kernel_text_rw(); kexec_start_address = image->start; kexec_indirection_page = page_list; kexec_mach_type = machine_arch_type; kexec_boot_atags = dt_mem ?: image->start - KEXEC_ARM_ZIMAGE_OFFSET + KEXEC_ARM_ATAGS_OFFSET; /* copy our kernel relocation code to the control code page */ reboot_entry = fncpy(reboot_code_buffer, reboot_entry, relocate_new_kernel_size); reboot_entry_phys = (unsigned long)reboot_entry + (reboot_code_buffer_phys - (unsigned long)reboot_code_buffer); pr_info("Bye!\n"); if (kexec_reinit) kexec_reinit(); soft_restart(reboot_entry_phys); }
void s3c2412_restart(char mode, const char *cmd) { if (mode == 's') soft_restart(0); /* errata "Watch-dog/Software Reset Problem" specifies that * this reset must be done with the SYSCLK sourced from * EXTCLK instead of FOUT to avoid a glitch in the reset * mechanism. * * See the watchdog section of the S3C2412 manual for more * information on this fix. */ __raw_writel(0x00, S3C2412_CLKSRC); __raw_writel(S3C2412_SWRST_RESET, S3C2412_SWRST); mdelay(1); }
void ixp4xx_restart(char mode, const char *cmd) { if ( 1 && mode == 's') { /* */ soft_restart(0); } else { /* */ /* */ *IXP4XX_OSWK = IXP4XX_WDT_KEY; /* */ *IXP4XX_OSWT = 0; *IXP4XX_OSWE = IXP4XX_WDT_RESET_ENABLE | IXP4XX_WDT_COUNT_ENABLE; } }
void ixp4xx_restart(char mode, const char *cmd) { if ( 1 && mode == 's') { /* Jump into ROM at address 0 */ soft_restart(0); } else { /* Use on-chip reset capability */ /* set the "key" register to enable access to * "timer" and "enable" registers */ *IXP4XX_OSWK = IXP4XX_WDT_KEY; /* write 0 to the timer register for an immediate reset */ *IXP4XX_OSWT = 0; *IXP4XX_OSWE = IXP4XX_WDT_RESET_ENABLE | IXP4XX_WDT_COUNT_ENABLE; } }