/******************************************************************************
* FunctionName : user_esp_platform_save_param
* Description : toggle save param to two sector by flag value,
* : protect write and erase data while power off.
* Parameters : param -- the parame point which write the flash
* Returns : none
*******************************************************************************/
void ICACHE_FLASH_ATTR
user_esp_platform_save_param(void *param, uint16 len)
{
struct esp_platform_sec_flag_param flag;
spi_flash_read((ESP_PARAM_START_SEC + ESP_PARAM_FLAG) * SPI_FLASH_SEC_SIZE,
(uint32 *)&flag, sizeof(struct esp_platform_sec_flag_param));
if (flag.flag == 0) {
spi_flash_erase_sector(ESP_PARAM_START_SEC + ESP_PARAM_SAVE_1);
spi_flash_write((ESP_PARAM_START_SEC + ESP_PARAM_SAVE_1) * SPI_FLASH_SEC_SIZE,
(uint32 *)param, len);
flag.flag = 1;
spi_flash_erase_sector(ESP_PARAM_START_SEC + ESP_PARAM_FLAG);
spi_flash_write((ESP_PARAM_START_SEC + ESP_PARAM_FLAG) * SPI_FLASH_SEC_SIZE,
(uint32 *)&flag, sizeof(struct esp_platform_sec_flag_param));
} else {
spi_flash_erase_sector(ESP_PARAM_START_SEC + ESP_PARAM_SAVE_0);
spi_flash_write((ESP_PARAM_START_SEC + ESP_PARAM_SAVE_0) * SPI_FLASH_SEC_SIZE,
(uint32 *)param, len);
flag.flag = 0;
spi_flash_erase_sector(ESP_PARAM_START_SEC + ESP_PARAM_FLAG);
spi_flash_write((ESP_PARAM_START_SEC + ESP_PARAM_FLAG) * SPI_FLASH_SEC_SIZE,
(uint32 *)&flag, sizeof(struct esp_platform_sec_flag_param));
}
}
static int env_sf_save(void)
{
u32 saved_size, saved_offset, sector;
char *saved_buffer = NULL;
int ret = 1;
env_t env_new;
ret = setup_flash_device();
if (ret)
return ret;
/* Is the sector larger than the env (i.e. embedded) */
if (CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE) {
saved_size = CONFIG_ENV_SECT_SIZE - CONFIG_ENV_SIZE;
saved_offset = CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE;
saved_buffer = malloc(saved_size);
if (!saved_buffer)
goto done;
ret = spi_flash_read(env_flash, saved_offset,
saved_size, saved_buffer);
if (ret)
goto done;
}
ret = env_export(&env_new);
if (ret)
goto done;
sector = DIV_ROUND_UP(CONFIG_ENV_SIZE, CONFIG_ENV_SECT_SIZE);
puts("Erasing SPI flash...");
ret = spi_flash_erase(env_flash, CONFIG_ENV_OFFSET,
sector * CONFIG_ENV_SECT_SIZE);
if (ret)
goto done;
puts("Writing to SPI flash...");
ret = spi_flash_write(env_flash, CONFIG_ENV_OFFSET,
CONFIG_ENV_SIZE, &env_new);
if (ret)
goto done;
if (CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE) {
ret = spi_flash_write(env_flash, saved_offset,
saved_size, saved_buffer);
if (ret)
goto done;
}
ret = 0;
puts("done\n");
done:
if (saved_buffer)
free(saved_buffer);
return ret;
}
/* Format: AT#FLASH -s6 -v56+enter*/
int16 iot_atcmd_exec_flash(puchar pCmdBuf, int16 AtCmdLen)
{
char *argv[MAX_OPTION_COUNT];
char *opString = "r:s:v:c:?";
char *endptr = NULL;
long num = 0;
int16 argc = 0;
char opt = 0;
uint32 fOffset = 0;
uint8 fData[1] = {0};
uint32 stringLen = 0;
uint8 buffer[48] = {0};
split_string_cmd(pCmdBuf, AtCmdLen, &argc, argv);
opt = getopt(argc, argv, opString);
while (opt != -1) {
switch (opt) {
case 'r':
/*Flash Read Offset*/
num = simple_strtol(optarg,&endptr,0);
spi_flash_read((uint32)num, fData, 1);
printf_high("[0x%x]=[0x%02x]\n",num,fData[0]);
break;
case 's':
/*Flash Write Offset*/
num = simple_strtol(optarg,&endptr,0);
fOffset = (uint32)num;
break;
case 'v':
/*Flash Write Value*/
num = simple_strtol(optarg,&endptr,0);
if ( (fOffset < FLASH_OFFSET_RESERVE_2_START) ||
((fOffset >= FLASH_OFFSET_STA_FW_START) && (fOffset < FLASH_OFFSET_RESERVE_7_START))) {
/*Protecte the FW region*/
printf_high("[0x%x] is not permit to write!\n",fOffset);
}else{
spi_flash_write(fOffset, (uint8*)&num, 1);
printf_high("[0x%x]=[0x%02x]\n",fOffset,num);
}
break;
case 'c':
stringLen = strlen(optarg);
if(stringLen > (sizeof(buffer)-1))
stringLen = sizeof(buffer)-1;
memcpy(buffer, optarg, stringLen);
buffer[stringLen] ='\0';
spi_flash_write(fOffset, (uint8*)buffer, stringLen+1);
printf_high("[0x%x]=%s\n",fOffset,buffer);
break;
case '?':
default:
break;
}
opt = getopt(argc, argv, opString);
}
return 0;
}
IROM bool Flash::initializePage(uint32_t pageIdx,uint32_t sequence) {
// INFO(" pageIdx : %d sequence : %d ",pageIdx,sequence);
uint32_t sector = PAGE_START/PAGE_SIZE + pageIdx;
if ( spi_flash_erase_sector(sector) != SPI_FLASH_RESULT_OK ) return false;
uint32_t magic=PAGE_SIGNATURE;
if ( spi_flash_write(pageAddress(pageIdx),&magic, sizeof(magic))!= SPI_FLASH_RESULT_OK ) return false;
if ( spi_flash_write(pageAddress(pageIdx)+4,&sequence, sizeof(sequence))!= SPI_FLASH_RESULT_OK ) return false;
return true;
}
int saveenv(void)
{
u32 saved_size, saved_offset;
char *saved_buffer = NULL;
u32 sector = 1;
int ret;
if (!env_flash) {
puts("Environment SPI flash not initialized\n");
return 1;
}
/* Is the sector larger than the env (i.e. embedded) */
if (CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE) {
saved_size = CONFIG_ENV_SECT_SIZE - CONFIG_ENV_SIZE;
saved_offset = CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE;
saved_buffer = malloc(saved_size);
if (!saved_buffer) {
ret = 1;
goto done;
}
ret = spi_flash_read(env_flash, saved_offset, saved_size, saved_buffer);
if (ret)
goto done;
}
if (CONFIG_ENV_SIZE > CONFIG_ENV_SECT_SIZE) {
sector = CONFIG_ENV_SIZE / CONFIG_ENV_SECT_SIZE;
if (CONFIG_ENV_SIZE % CONFIG_ENV_SECT_SIZE)
sector++;
}
puts("Erasing SPI flash...");
ret = spi_flash_erase(env_flash, CONFIG_ENV_OFFSET, sector * CONFIG_ENV_SECT_SIZE);
if (ret)
goto done;
puts("Writing to SPI flash...");
ret = spi_flash_write(env_flash, CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, env_ptr);
if (ret)
goto done;
if (CONFIG_ENV_SECT_SIZE > CONFIG_ENV_SIZE) {
ret = spi_flash_write(env_flash, saved_offset, saved_size, saved_buffer);
if (ret)
goto done;
}
ret = 0;
puts("done\n");
done:
if (saved_buffer)
free(saved_buffer);
return ret;
}
static int set_arc_product(int argc, char *const argv[])
{
int err = 0;
char *mystrerr = "ERROR: Failed to save factory info in spi location";
if (argc != 5)
return -1;
/* Check serial number */
if (strlen(argv[1]) != MAX_SERIAL_SIZE)
return -1;
/* Check HWaddrs */
if (ishwaddr(argv[2]) || ishwaddr(argv[3]) || ishwaddr(argv[4]))
return -1;
strcpy(smac[3], argv[1]);
strcpy(smac[2], argv[2]);
strcpy(smac[1], argv[3]);
strcpy(smac[0], argv[4]);
flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,
CONFIG_ENV_SPI_MAX_HZ, CONFIG_ENV_SPI_MODE);
/*
* Save factory defaults
*/
if (spi_flash_write(flash, FIRM_ADDR1, sizeof(smac), smac)) {
printf("%s: %s [1]\n", __func__, mystrerr);
err++;
}
if (spi_flash_write(flash, FIRM_ADDR2, sizeof(smac), smac)) {
printf("%s: %s [2]\n", __func__, mystrerr);
err++;
}
if (spi_flash_write(flash, FIRM_ADDR3, sizeof(smac), smac)) {
printf("%s: %s [3]\n", __func__, mystrerr);
err++;
}
if (spi_flash_write(flash, FIRM_ADDR4, sizeof(smac), smac)) {
printf("%s: %s [4]\n", __func__, mystrerr);
err++;
}
if (err == 4) {
printf("%s: %s [ALL]\n", __func__, mystrerr);
return -2;
}
return 0;
}
/*ALINK_CONFIG_LEN 2048, len need < ALINK_CONFIG_LEN */
static int ICACHE_FLASH_ATTR write_config(unsigned char *buffer, unsigned int len)
{
int res = 0, pos = 0;
if (buffer == NULL) {
return ALINK_ERR;
}
if (len > ALINK_CONFIG_LEN)
len = ALINK_CONFIG_LEN;
res = spi_flash_erase_sector(LFILE_START_ADDR / 4096); //one sector is 4KB
if (res != SPI_FLASH_RESULT_OK) {
wsf_err("erase flash data fail\n");
}
else {
wsf_err("erase flash data %d Byte\n", res);
}
os_printf("write data:\n");
res = spi_flash_write((LFILE_START_ADDR), (uint32 *)buffer, len);
if (res != SPI_FLASH_RESULT_OK) {
wsf_err("write data error\n");
return ALINK_ERR;
}
wsf_deb("write key(%s) success.", buffer);
return ALINK_OK;
}
int spiflash_logic_write(spiflash_logic_t *spiflash_logic,
unsigned long long offset,
unsigned int length,
unsigned char *buf)
{
unsigned int totalwrite = length;
unsigned int ret;
if (!length) {
printf("Attempt to write 0 Bytes\n");
return -1;
}
if ((offset > spiflash_logic->length)
|| (length > spiflash_logic->length)
|| ((offset + length) > spiflash_logic->length)) {
printf("Attempt to write outside the flash handle area, "
"flash handle size: 0x%08llx, offset: 0x%08llx, "
"length: 0x%08x, phylength: 0x%08llx\n",
spiflash_logic->length, offset,
length, offset + length);
return -1;
}
ret = spi_flash_write(spiflash_logic->spiflash,
spiflash_logic->address + offset,
length,
buf);
if (!ret)
return totalwrite;
return ret;
}
IROM bool Flash::writeItem( uint16_t index,uint8_t* start,uint32_t length) {
// INFO(" index : %u , length : %u ",index,length);
uint32_t address = pageAddress(_pageIdx)+_freePos;
Quad W;
W.index = index;
W.length=length;
// INFO(" address 0x%x length %d",address,length);
if (spi_flash_write(address,&W.w,4)!= SPI_FLASH_RESULT_OK ) return false;
for(uint32_t i=0;i<length+3;i+=4) {
W.w=0xFFFFFFFF;
for(uint32_t j=0;i+j<length && j<4;j++) W.b[j]=start[i+j];
if (spi_flash_write(address+4+i,&W.w,4)!= SPI_FLASH_RESULT_OK ) return false;
}
_freePos += 4+roundQuad(length);
return true;
}
// write the rboot config
// preserves the contents of the rest of the sector,
// so the rest of the sector can be used to store user data
// updates checksum automatically (if enabled)
bool ICACHE_FLASH_ATTR rboot_set_config(rboot_config *conf) {
uint8 *buffer;
buffer = (uint8*)os_malloc(SECTOR_SIZE);
if (!buffer) {
//os_printf("No ram!\r\n");
return false;
}
#ifdef BOOT_CONFIG_CHKSUM
conf->chksum = calc_chksum((uint8*)conf, (uint8*)&conf->chksum);
#endif
spi_flash_read(BOOT_CONFIG_SECTOR * SECTOR_SIZE, (uint32*)((void*)buffer), SECTOR_SIZE);
memcpy(buffer, conf, sizeof(rboot_config));
vPortEnterCritical();
spi_flash_erase_sector(BOOT_CONFIG_SECTOR);
vPortExitCritical();
taskYIELD();
vPortEnterCritical();
//spi_flash_write(BOOT_CONFIG_SECTOR * SECTOR_SIZE, (uint32*)((void*)buffer), SECTOR_SIZE);
spi_flash_write(BOOT_CONFIG_SECTOR * SECTOR_SIZE, (uint32*)((void*)buffer), SECTOR_SIZE);
vPortExitCritical();
os_free(buffer);
return true;
}
void ICACHE_FLASH_ATTR spi_flash_write_test(enum RUN_MODE mode)
{
rw_info rw;
os_memset(&rw, 0, sizeof(rw));
rw.server_addr = ipaddr_addr("192.168.0.241");
rw.server_port = 10010;
os_strcpy(rw.ssid, "useease2");
os_strcpy(rw.ssid_pwd, "1CBE991A14");
os_strcpy(rw.ssid_mine, "iPLUG");
os_strcpy(rw.ssid_pwd_mine, "iPLUG123");
rw.run_mode = mode;
rw.dev_type = DEV_PLUG;
show_rw(&rw);
//写入前，需要擦除
if (spi_flash_erase_sector(FLASH_HEAD_ADDR / (4 * 1024))
!= SPI_FLASH_RESULT_OK) {
os_printf("SPI FLASH ERASE ERROR\n");
} else {
os_printf("SPI FLASH ERASE SUCCESS\n");
}
//写入
if (spi_flash_write(FLASH_HEAD_ADDR, (uint32*) &rw, sizeof(rw))
!= SPI_FLASH_RESULT_OK) {
os_printf("SPI FLASH WRITE ERROR\n");
} else {
os_printf("SPI FLASH WRITE SUCCESS\n");
}
}
void ICACHE_FLASH_ATTR
debug_FlashParamSv()
{
debug_FlashParamCsumSet();
spi_flash_erase_sector(Flash_DEBUG_INFO_ADDR);
spi_flash_write(Flash_DEBUG_INFO_ADDR*0x1000,(uint32*)&FlashDebugBufParam,sizeof(FlashDebugBufParam));
}
LOCAL UP_STATUS ICACHE_FLASH_ATTR flash_data() {
if(mFlashingSector > UPLOADABLE_PAGE_END_SECTOR) {
return UP_STATUS_OVERFLOW;
}
if((SPI_FLASH_SEC_SIZE - mBufferPos) > 0) {
irom_read(&mBuffer[mBufferPos], (const char *)
(mFlashingSector * SPI_FLASH_SEC_SIZE + mBufferPos + IROM_FLASH_BASE_ADDRESS),
SPI_FLASH_SEC_SIZE - mBufferPos);
mBufferPos = SPI_FLASH_SEC_SIZE;
}
if(irom_cmp(mBuffer, (const char *)
(mFlashingSector * SPI_FLASH_SEC_SIZE + IROM_FLASH_BASE_ADDRESS),
SPI_FLASH_SEC_SIZE) == 0) {
mFlashingSector++;
return UP_STATUS_OK;
}
SpiFlashOpResult res;
res = spi_flash_erase_sector(mFlashingSector);
if(res == SPI_FLASH_RESULT_OK) {
dhdebug("Flashing page at address 0x%X", mFlashingSector * SPI_FLASH_SEC_SIZE);
res = spi_flash_write(mFlashingSector * SPI_FLASH_SEC_SIZE,
(uint32 *)mBuffer, SPI_FLASH_SEC_SIZE);
}
system_soft_wdt_feed();
if(res == SPI_FLASH_RESULT_OK) {
mFlashingSector++;
return UP_STATUS_OK;
}
return UP_STATUS_INTERNAL_ERROR;
}
void IRAM_ATTR SystemClass::internalApplyFirmwareUpdate(uint32_t readFlashOffset, uint32_t targetFlashOffset, int firmwareSize, bool outputDebug)
{
uint32_t to = targetFlashOffset;
uint32_t from = readFlashOffset;
int size = firmwareSize;
const int unit = INTERNAL_FLASH_SECTOR_SIZE;
char buf[unit];
while (size > 0)
{
int sect = to / unit;
if (outputDebug) ets_uart_printf("write: 0x%X -> 0x%X (sect: %d), %d\n", from, to, sect, size);
spi_flash_erase_sector(sect);
//ets_uart_printf("ers.");
spi_flash_read(from, (uint32*)buf, unit);
//ets_uart_printf("read.");
spi_flash_write(to, (uint32*)buf, unit);
//ets_uart_printf("wr.\r\n");
from += unit;
to += unit;
size -= unit;
}
if (outputDebug) ets_uart_printf("Firmware upgrade finished\n");
((void (*)(void))0x40000080)(); // Hardcore reset vector
ets_wdt_enable();
while (1)
; // Reboot anyway!
}
/**
* writes one block of the image to a device
*
* \param address write offset
* \param length number of bytes to write
* \param buffer write data buffer
* \return status code
*/
unsigned char hpm_write_block_nvram(int address, int length, unsigned char *buffer)
{
/* add offset for upper selected nvram regions */
address += (oem_config.update_nvram * BIOS_NVRAM_SIZE);
return spi_flash_write(&spi_flash, address, length, buffer);
}
/*========================================================================
Routine Description:
store_sta_cfg
Arguments:
Return Value:
========================================================================*/
void store_sta_cfg(void)
{
//printf_high("store_sta_cfg \n");
/*for shrink code size , current we only use 256Byte for STA_CFG sector */
memset(IoTpAd.flash_rw_buf, 0xff, sizeof(IoTpAd.flash_rw_buf));
memcpy(&IoTpAd.flash_rw_buf[FLASH_STA_CFG_BSSID], pIoTStaCfg->Bssid, FLASH_STA_CFG_BSSID_LEN);
memcpy(&IoTpAd.flash_rw_buf[FLASH_STA_CFG_SSID], pIoTStaCfg->Ssid, FLASH_STA_CFG_SSID_LEN);
memcpy(&IoTpAd.flash_rw_buf[FLASH_STA_CFG_PASSPHASE], pIoTStaCfg->Passphase, FLASH_STA_CFG_PASSPHASE_LEN);
#if (1 == CFG_SUPPORT_4WAY_HS)
memcpy(&IoTpAd.flash_rw_buf[FLASH_STA_CFG_4WAY_PMK], pIoTStaCfg->PMK, FLASH_STA_CFG_4WAY_PMK_LEN);
#endif
//memcpy(&IoTpAd.flash_rw_buf[FLASH_STA_CFG_SSIDLEN], &pIoTStaCfg->SsidLen, FLASH_STA_CFG_SSIDLEN_LEN);
//memcpy(&IoTpAd.flash_rw_buf[FLASH_STA_CFG_PASSPHASELEN],&pIoTStaCfg->PassphaseLen, FLASH_STA_CFG_PASSPHASELEN_LEN);
//memcpy(&IoTpAd.flash_rw_buf[FLASH_STA_CFG_AUTH_MODE], &pIoTStaCfg->AuthMode, FLASH_STA_CFG_AUTH_MODE_LEN);
IoTpAd.flash_rw_buf[FLASH_STA_CFG_SSIDLEN] = pIoTStaCfg->SsidLen;
IoTpAd.flash_rw_buf[FLASH_STA_CFG_PASSPHASELEN] = pIoTStaCfg->PassphaseLen;
IoTpAd.flash_rw_buf[FLASH_STA_CFG_AUTH_MODE] = pIoTStaCfg->AuthMode;
/*Indicate the smart connection info already be stored on flash
and not do smart connection while IoT device power on, but go
to SCAN state with the infor stored on flash */
IoTpAd.flash_rw_buf[FLASH_STA_CFG_SMNT_INFO_STORED] = SMNT_INFO_STORED;
spi_flash_write(FLASH_STA_CFG_BASE, IoTpAd.flash_rw_buf, sizeof(IoTpAd.flash_rw_buf));
}
/**
* @brief Through uart to update
* @param id: commad id number
* @retval None
*/
void ICACHE_FLASH_ATTR
at_exeCmdUpdate(uint8_t id)
{
char temp[32];
updateFlagType upFlag;
os_sprintf(temp,"Is about to restart\r\n");
uart0_sendStr(temp);
spi_flash_read(60 * 4096, (uint32 *)&upFlag, sizeof(updateFlagType));
// os_printf("%X\r\n",upFlag.flag);
// os_printf("%X\r\n",upFlag.reserve[0]);
// os_printf("%X\r\n",upFlag.reserve[1]);
// os_printf("%X\r\n",upFlag.reserve[2]);
upFlag.flag = 1;
spi_flash_erase_sector(60);
spi_flash_write(60 * 4096, (uint32 *)&upFlag, sizeof(updateFlagType));
// spi_flash_read(60 * 4096, (uint32 *)&upFlag, sizeof(updateFlagType));
// os_printf("%X\r\n",upFlag.flag);
// os_printf("%X\r\n",upFlag.reserve[0]);
// os_printf("%X\r\n",upFlag.reserve[1]);
// os_printf("%X\r\n",upFlag.reserve[2]);
os_delay_us(10000);
system_reboot_from(0x00);
}
void *esp_native_code_commit(void *buf, size_t len) {
//printf("COMMIT(buf=%p, len=%u, start=%08x, cur=%08x, end=%08x, erased=%08x)\n", buf, len, esp_native_code_start, esp_native_code_cur, esp_native_code_end, esp_native_code_erased);
len = (len + 3) & ~3;
if (esp_native_code_cur + len > esp_native_code_end) {
nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_MemoryError,
"memory allocation failed, allocating %u bytes for native code", (uint)len));
}
void *dest;
if (esp_native_code_location == ESP_NATIVE_CODE_IRAM1) {
dest = (void*)esp_native_code_cur;
memcpy(dest, buf, len);
} else {
SpiFlashOpResult res;
while (esp_native_code_erased < esp_native_code_cur + len) {
res = spi_flash_erase_sector(esp_native_code_erased / FLASH_SEC_SIZE);
if (res != SPI_FLASH_RESULT_OK) {
break;
}
esp_native_code_erased += FLASH_SEC_SIZE;
}
if (res == SPI_FLASH_RESULT_OK) {
res = spi_flash_write(esp_native_code_cur, buf, len);
}
if (res != SPI_FLASH_RESULT_OK) {
mp_raise_OSError(res == SPI_FLASH_RESULT_TIMEOUT ? MP_ETIMEDOUT : MP_EIO);
}
dest = (void*)(FLASH_START + esp_native_code_cur);
}
esp_native_code_cur += len;
return dest;
}
bool flash_init_data_default(void)
{
/* Can't copy directly from flash (which is where the default data lives)
* due to it being unmapped during the write, so bounce via ram buffer. */
uint8_t init_data[128];
os_memcpy (init_data, flash_init_data, 128);
// FLASH SEC - 4
// Dangerous, here are dinosaur infested!!!!!
// Reboot required!!!
// It will init system data to default!
bool result = false;
#if defined(FLASH_SAFE_API)
if (SPI_FLASH_RESULT_OK == flash_safe_erase_sector((flash_safe_get_sec_num() - 4)))
{
if (SPI_FLASH_RESULT_OK == flash_safe_write((flash_safe_get_sec_num() - 4) * SPI_FLASH_SEC_SIZE, (uint32 *)init_data, 128))
{
result = true;
}
}
#else
if (SPI_FLASH_RESULT_OK == spi_flash_erase_sector((flash_rom_get_sec_num() - 4)))
{
if (SPI_FLASH_RESULT_OK == spi_flash_write((flash_rom_get_sec_num() - 4) * SPI_FLASH_SEC_SIZE, (uint32 *)init_data, 128))
{
result = true;
}
}
#endif // defined(FLASH_SAFE_API)
return result;
}
static bool flash_rom_set_size_type(uint8_t size_code)
{
// Dangerous, here are dinosaur infested!!!!!
// Reboot required!!!
// If you don't know what you're doing, your nodemcu may turn into stone ...
NODE_DBG("\nBEGIN SET FLASH HEADER\n");
esp_image_header_t *hdr = (esp_image_header_t *)malloc (SPI_FLASH_SEC_SIZE);
if (!hdr)
return false;
if (ESP_OK == spi_flash_read (FLASH_HDR_ADDR, (uint32_t *)hdr, SPI_FLASH_SEC_SIZE))
{
hdr->spi_size = size_code;
if (ESP_OK == spi_flash_erase_sector (FLASH_HDR_ADDR / SPI_FLASH_SEC_SIZE))
{
NODE_DBG("\nERASE SUCCESS\n");
}
if (ESP_OK == spi_flash_write(FLASH_HDR_ADDR, (uint32_t *)hdr, SPI_FLASH_SEC_SIZE))
{
NODE_DBG("\nWRITE SUCCESS, %u\n", size_code);
}
}
free (hdr);
NODE_DBG("\nEND SET FLASH HEADER\n");
return true;
}
int do_write_mac(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
{
int i, ret;
char mac_string[256];
struct spi_flash *spi;
unsigned char *buf;
if (argc != 5) {
buf = malloc(256);
if (!buf) {
printf("%s: malloc error.\n", __func__);
return 1;
}
get_sh_eth_mac_raw(buf, 256);
/* print current MAC address */
for (i = 0; i < 4; i++) {
get_sh_eth_mac(i, mac_string, buf);
if (i < 2)
printf(" ETHERC ch%d = %s\n", i, mac_string);
else
printf("GETHERC ch%d = %s\n", i-2, mac_string);
}
free(buf);
return 0;
}
/* new setting */
memset(mac_string, 0xff, sizeof(mac_string));
sprintf(mac_string, "%s\t%s\t%s\t%s",
argv[1], argv[2], argv[3], argv[4]);
/* write MAC data to SPI rom */
spi = spi_flash_probe(0, 0, 1000000, SPI_MODE_3);
if (!spi) {
printf("%s: spi_flash probe error.\n", __func__);
return 1;
}
ret = spi_flash_erase(spi, SH7757LCR_ETHERNET_MAC_BASE_SPI,
SH7757LCR_SPI_SECTOR_SIZE);
if (ret) {
printf("%s: spi_flash erase error.\n", __func__);
return 1;
}
ret = spi_flash_write(spi, SH7757LCR_ETHERNET_MAC_BASE_SPI,
sizeof(mac_string), mac_string);
if (ret) {
printf("%s: spi_flash write error.\n", __func__);
spi_flash_free(spi);
return 1;
}
spi_flash_free(spi);
puts("The writing of the MAC address to SPI ROM was completed.\n");
return 0;
}
void config_save() {
SpiFlashOpResult result;
config.id++;
#ifdef DEBUG
os_printf("config_save...\n");
#endif
do {
config.pos++;
if (config.pos == CONFIG_SEC_COUNT)
config.pos = 0;
spi_flash_erase_sector(CONFIG_START_SEC + config.pos);
result = spi_flash_write((CONFIG_START_SEC + config.pos) * SPI_FLASH_SEC_SIZE, (uint32*)&config, sizeof(struct ConfigStruct));
#ifdef DEBUG
os_printf("config.id = %d\n", config.id);
os_printf("config.pos = %u\n", config.pos);
#endif
} while (result != SPI_FLASH_RESULT_OK);
}
int saveenv(void)
{
u32 sector = 1;
if (!env_flash) {
puts("Environment SPI flash not initialized\n");
return 1;
}
if (CFG_ENV_SIZE > CFG_ENV_SECT_SIZE) {
sector = CFG_ENV_SIZE / CFG_ENV_SECT_SIZE;
if (CFG_ENV_SIZE % CFG_ENV_SECT_SIZE)
sector++;
}
puts("Erasing SPI flash...");
if (spi_flash_erase(env_flash, CFG_ENV_OFFSET, sector * CFG_ENV_SECT_SIZE))
return 1;
puts("Writing to SPI flash...");
if (spi_flash_write(env_flash, CFG_ENV_OFFSET, CFG_ENV_SIZE, env_ptr))
return 1;
puts("done\n");
return 0;
}
// write the rboot config
// preserves the contents of the rest of the sector,
// so the rest of the sector can be used to store user data
// updates checksum automatically (if enabled)
bool ICACHE_FLASH_ATTR rboot_set_config(rboot_config *conf) {
uint8 *buffer;
#ifdef BOOT_CONFIG_CHKSUM
uint8 chksum;
uint8 *ptr;
#endif
buffer = (uint8*)os_malloc(SECTOR_SIZE);
if (!buffer) {
//os_printf("No ram!\r\n");
return false;
}
#ifdef BOOT_CONFIG_CHKSUM
chksum = CHKSUM_INIT;
for (ptr = (uint8*)conf; ptr < &conf->chksum; ptr++) {
chksum ^= *ptr;
}
conf->chksum = chksum;
#endif
spi_flash_read(BOOT_CONFIG_SECTOR * SECTOR_SIZE, (uint32*)((void*)buffer), SECTOR_SIZE);
memcpy(buffer, conf, sizeof(rboot_config));
spi_flash_erase_sector(BOOT_CONFIG_SECTOR);
//spi_flash_write(BOOT_CONFIG_SECTOR * SECTOR_SIZE, (uint32*)((void*)buffer), SECTOR_SIZE);
spi_flash_write(BOOT_CONFIG_SECTOR * SECTOR_SIZE, (uint32*)((void*)buffer), SECTOR_SIZE);
os_free(buffer);
return true;
}
/* flash_binary */
int ICACHE_FLASH_ATTR flash_binary(char * pbData,
int cbSize,
int iPartition)
{
/* initialization */
SpiFlashOpResult eFlashOperationStatus = SPI_FLASH_RESULT_ERR;
int iRet = 0;
erase_block(partition[iPartition].iOffset + cbFlashedSize);
/* source assumed to be 4 byte aligned */
eFlashOperationStatus = spi_flash_write((partition[iPartition].iOffset + cbFlashedSize),
(uint32 *)pbData,
cbSize);
if (SPI_FLASH_RESULT_OK == eFlashOperationStatus)
{
cbFlashedSize += cbSize;
iRet = cbSize;
goto lblCleanup;
}
else
{
#ifdef FLASH_DEBUG
os_printf("flash_binary: SpiFlashOpResult %d\n", iRet);
#endif
iRet = 0;
goto lblCleanup;
}
lblCleanup:
return iRet;
}
bool flash_init_data_default(void)
{
// FLASH SEC - 4
// Dangerous, here are dinosaur infested!!!!!
// Reboot required!!!
// It will init system data to default!
bool result = false;
#if defined(FLASH_SAFE_API)
if (SPI_FLASH_RESULT_OK == flash_safe_erase_sector((flash_safe_get_sec_num() - 4)))
{
if (SPI_FLASH_RESULT_OK == flash_safe_write((flash_safe_get_sec_num() - 4) * SPI_FLASH_SEC_SIZE, (uint32 *)flash_init_data, 128))
{
result = true;
}
}
#else
if (SPI_FLASH_RESULT_OK == spi_flash_erase_sector((flash_rom_get_sec_num() - 4)))
{
if (SPI_FLASH_RESULT_OK == spi_flash_write((flash_rom_get_sec_num() - 4) * SPI_FLASH_SEC_SIZE, (uint32 *)flash_init_data, 128))
{
result = true;
}
}
#endif // defined(FLASH_SAFE_API)
return result;
}
void ICACHE_FLASH_ATTR
load_userParam(void)
{
struct softap_config config;
spi_flash_read((ESP_PARAM_START_SEC + 1) * SPI_FLASH_SEC_SIZE,
(uint32 *)&myParam, sizeof(USER_PARAM));
// default setup
if(myParam.sign!=4771215){
myParam.sign = 4771215;
myParam.baud_rate = BIT_RATE_115200;
myParam.port = 1025;
spi_flash_erase_sector(ESP_PARAM_START_SEC + 1);
spi_flash_write((ESP_PARAM_START_SEC + 1) * SPI_FLASH_SEC_SIZE,
(uint32 *)&myParam, sizeof(USER_PARAM));
wifi_set_opmode(STATIONAP_MODE);
wifi_softap_get_config(&config);
config.authmode = AUTH_OPEN;
wifi_softap_set_config(&config);
}
spi_flash_read((ESP_PARAM_START_SEC + 1) * SPI_FLASH_SEC_SIZE,
(uint32 *)&myParam, sizeof(USER_PARAM));
}
ICACHE_FLASH_ATTR void eeSetByte(uint32_t address, uint8_t data) {
uint32_t addr = (EEPROM_START + address) & 0xFFF000;
spi_flash_read(addr, (uint32 *)eebuf, 4096);
spi_flash_erase_sector(addr >> 12);
eebuf[address & 0xFFF] = data;
spi_flash_write(addr, (uint32 *)eebuf, 4096);
}
static s32_t ICACHE_FLASH_ATTR
my_spiffs_write(u32_t addr, u32_t size, u8_t *src) {
os_printf("spiffs write [%s] [%d] bytes\n", src, size);
int res = spi_flash_write(addr, (u32_t*)&(*src), size);
os_printf("write res = %d\n", res);
return SPIFFS_OK;
}
// ----------------------------------------------------------------------------
// Save contentst to Flash
// ----------------------------------------------------------------------------
static void savetoFlash(char *buffer, int len)
{
SpiFlashOpResult ret;
uint32 flash_addr = FLASHCONTENTS; // user memory
ret = spi_flash_write(flash_addr, (uint32 *)buffer, len);
if(ret != SPI_FLASH_RESULT_OK) os_printf("error ret: %d\r\n", (int)ret);
}
