/**
* \brief Initialize SPI external resource for AT25DFx SerialFlash driver.
*
* This function initializes the SerialFlash component as well as the SPI service that
* the memory is connected to.
* \pre The conf_at25dfx.h file should provide the following information:
* - Selection of the SPI service the SerialFlash is connected
* (AT25DFX_USES_SPI_MASTER_SERVICE or AT25DFX_USES_USART_SPI_SERVICE).
* - AT25DFX_MEM_SIZE: The SerialFlash type that the driver is connected to.
* - AT25DFX_MEM_CNT: The number of SerialFlash components (number of chipselect).
* - AT25DFX_SPI_MODULE: The name of the SPI module used by the SerialFlash driver.
* - AT25DFX_SPI_MASTER_SPEED: The SPI bus speed.
*/
void at25dfx_spi_init(void)
{
#if defined( AT25DFX_USES_SPI_MASTER_SERVICE)
spi_master_init(AT25DFX_SPI_MODULE);
#if (AT25DFX_MEM_CNT==1)
spi_master_setup_device(AT25DFX_SPI_MODULE,&AT25DFX_DEVICE1,SPI_MODE_0,AT25DFX_SPI_MASTER_SPEED,0);
#endif
#if (AT25DFX_MEM_CNT>1)
spi_master_setup_device(AT25DFX_SPI_MODULE,&AT25DFX_DEVICE2,SPI_MODE_0,AT25DFX_SPI_MASTER_SPEED,0);
#endif
#if (AT25DFX_MEM_CNT>2)
spi_master_setup_device(AT25DFX_SPI_MODULE,&AT25DFX_DEVICE3,SPI_MODE_0,AT25DFX_SPI_MASTER_SPEED,0);
#endif
#if (AT25DFX_MEM_CNT>3)
spi_master_setup_device(AT25DFX_SPI_MODULE,&AT25DFX_DEVICE4,SPI_MODE_0,AT25DFX_SPI_MASTER_SPEED,0);
#endif
spi_enable(AT25DFX_SPI_MODULE);
/* Implementation with USART in SPI mode service */
#elif defined(AT25DFX_USES_USART_SPI_SERVICE)
usart_spi_init(AT25DFX_SPI_MODULE);
#if (AT25DFX_MEM_CNT==1)
usart_spi_setup_device(AT25DFX_SPI_MODULE,&AT25DFX_DEVICE1,SPI_MODE_0,AT25DFX_SPI_MASTER_SPEED,0);
#endif
#if (AT25DFX_MEM_CNT>1)
usart_spi_setup_device(AT25DFX_SPI_MODULE,&AT25DFX_DEVICE2,SPI_MODE_0,AT25DFX_SPI_MASTER_SPEED,0);
#endif
#if (AT25DFX_MEM_CNT>2)
usart_spi_setup_device(AT25DFX_SPI_MODULE,&AT25DFX_DEVICE3,SPI_MODE_0,AT25DFX_SPI_MASTER_SPEED,0);
#endif
#if (AT25DFX_MEM_CNT>3)
usart_spi_setup_device(AT25DFX_SPI_MODULE,&AT25DFX_DEVICE4,SPI_MODE_0,AT25DFX_SPI_MASTER_SPEED,0);
#endif
#endif
}
/**
* \brief Initialize the USB interface and the DataFlash block driver.
*
* This function will initialize the SPI master, an SPI device, an USB
* configuration and an USB interface. These instances are then used to setup
* the DataFlash device, create a block device and eventually share the block
* device through the USB mass-storage interface.
*/
void dataflash_init(struct app_usb_mode_task *usb_mode_task)
{
struct udm_config *config;
struct udm_interface *iface;
struct block_device *bdev;
struct spi_master *master =
spi_master_get_base(SPI_ID, &usb_mode_task->master);
struct spi_device *device =
spi_device_get_base(SPI_ID, &usb_mode_task->device);
config = udm_create_config(1, 1);
spi_enable(SPI_ID);
spi_master_init(SPI_ID, master);
spi_master_setup_device(SPI_ID, master, device, SPI_MODE_0,
CONFIG_CPU_HZ, BOARD_DATAFLASH_SS);
bdev = dataflash_blkdev_init(SPI_ID, master, device,
&usb_mode_task->task);
udm_config_set_bus_powered(config);
udm_config_set_max_power(config, 42);
iface = udi_msc_create_iface(bdev);
udm_config_add_interface(config, iface);
}
/**
* \internal
* \brief Initialize the hardware interface
*
* Depending on what interface used for interfacing the OLED controller this
* function will initialize the necessary hardware.
*/
static void ssd1306_interface_init(void)
{
#ifdef SSD1306_SERIAL_INTERFACE
spi_flags_t spi_flags = SPI_MODE_0;
board_spi_select_id_t spi_select_id = 0;
#endif
#if defined(SSD1306_USART_SPI_INTERFACE)
struct usart_spi_device device = {
.id = SSD1306_CS_PIN,
};
usart_spi_init(SSD1306_USART_SPI);
usart_spi_setup_device(SSD1306_USART_SPI, &device, spi_flags,
SSD1306_CLOCK_SPEED, spi_select_id);
#elif defined(SSD1306_SPI_INTERFACE)
struct spi_device device = {
.id = SSD1306_CS_PIN,
};
spi_master_init(SSD1306_SPI);
spi_master_setup_device(SSD1306_SPI, &device, spi_flags,
SSD1306_CLOCK_SPEED, spi_select_id);
#ifdef SAM
spi_enable(SSD1306_SPI);
#endif
#endif
}
/*! \brief Main function.
*/
int main(void)
{
sysclk_init();
/* Initialize the board.
* The board-specific conf_board.h file contains the configuration of
* the board initialization.
*/
board_init();
spi_master_init(SPI_EXAMPLE);
spi_master_setup_device(SPI_EXAMPLE, &SPI_DEVICE_EXAMPLE, SPI_MODE_0,
SPI_EXAMPLE_BAUDRATE, 0);
spi_enable(SPI_EXAMPLE);
status = spi_at45dbx_mem_check();
while (true)
{
if (status==false)
{
gpio_set_pin_low(SPI_EXAMPLE_LED_PIN_EXAMPLE_1);
gpio_set_pin_high(SPI_EXAMPLE_LED_PIN_EXAMPLE_2);
}
else
{
gpio_set_pin_low(SPI_EXAMPLE_LED_PIN_EXAMPLE_1);
gpio_set_pin_low(SPI_EXAMPLE_LED_PIN_EXAMPLE_2);
}
}
}
uint32_t ads7843_init(void)
{
volatile uint32_t uDummy;
struct spi_device ADS7843_SPI_DEVICE_CFG = {
// Board specific chip select configuration
#ifdef BOARD_ADS7843_SPI_NPCS
.id = BOARD_ADS7843_SPI_NPCS
#else
#warning The board TouchScreen chip select definition is missing. Default configuration is used.
.id = 0
#endif
};
spi_master_init(BOARD_ADS7843_SPI_BASE);
spi_master_setup_device(BOARD_ADS7843_SPI_BASE, &ADS7843_SPI_DEVICE_CFG, SPI_MODE_0, ADS7843_SPI_BAUDRATE, 0);
spi_enable(BOARD_ADS7843_SPI_BASE);
for (uDummy = 0; uDummy < 100000; uDummy++) {
}
ads7843_send_cmd(CMD_ENABLE_PENIRQ);
return 0;
}
/// @cond 0
/**INDENT-OFF**/
#ifdef __cplusplus
}
/*
* @fn nm_bus_init
* @brief Initialize the bus wrapper
* @return M2M_SUCCESS in case of success and M2M_ERR_BUS_FAIL in case of failure
*/
sint8 nm_bus_init(void *pvinit)
{
sint8 result = M2M_SUCCESS;
#ifdef CONF_WINC_USE_I2C
/* Not implemented */
#elif defined CONF_WINC_USE_SPI
/* Configure pins */
ioport_configure_pin(CONF_WIFI_M2M_SPI_CS_PIN, IOPORT_INIT_HIGH | IOPORT_DIR_OUTPUT);
ioport_configure_pin(CONF_WIFI_M2M_SPI_MOSI_PIN, IOPORT_INIT_HIGH | IOPORT_DIR_OUTPUT);
ioport_configure_pin(CONF_WIFI_M2M_SPI_MISO_PIN, IOPORT_DIR_INPUT);
ioport_configure_pin(CONF_WIFI_M2M_SPI_SCK_PIN, IOPORT_INIT_LOW | IOPORT_DIR_OUTPUT);
struct spi_device spi_device_conf;
spi_device_conf.id = CONF_WIFI_M2M_SPI_CS_PIN;
/* Configure the SPI master. */
spi_master_init(CONF_WIFI_M2M_SPI_MODULE);
spi_master_setup_device(CONF_WIFI_M2M_SPI_MODULE, &spi_device_conf, SPI_MODE_0, CONF_WIFI_M2M_SPI_BAUDRATE, 0);
/* Enable the SPI master. */
spi_enable(CONF_WIFI_M2M_SPI_MODULE);
nm_bsp_reset();
nm_bsp_sleep(1);
#endif
return result;
}
void configure_spi() {
SPI_Device_Memory = (struct spi_device *) pvPortMalloc( sizeof (struct spi_device) );
SPI_Device_Memory->id = SPI_DEVICE_MEMORY_CHIP_ID;
SPI_Device_CC1120 = (struct spi_device *) pvPortMalloc( sizeof (struct spi_device) );
SPI_Device_CC1120->id = SPI_DEVICE_CC1120_CHIP_ID;
spi_master_init(SPI0);
spi_master_setup_device(SPI0, SPI_Device_Memory, POLARITY_FLAG, BAUD_RATE, 0);
spi_master_setup_device(SPI0, SPI_Device_CC1120, POLARITY_FLAG, BAUD_RATE, 0);
spi_enable(SPI0);
// spi_enable_interrupt(SPI0, SPI_INTERRUPT_FLAGS);
spi_buffer_index = 0;
}
// Initialize Pin and SPI like specified into config file
void nrf24l01_init()
{
// Init SPI pins
ioport_set_pin_dir(CONF_NRF24L01_SS_PIN, IOPORT_DIR_INPUT);
ioport_set_pin_mode(CONF_NRF24L01_SS_PIN, IOPORT_MODE_PULLUP);
ioport_set_pin_dir(CONF_NRF24L01_MOSI_PIN, IOPORT_DIR_OUTPUT);
ioport_set_pin_mode(CONF_NRF24L01_MOSI_PIN, IOPORT_MODE_PULLUP);
ioport_set_pin_high(CONF_NRF24L01_MOSI_PIN);
ioport_set_pin_dir(CONF_NRF24L01_MISO_PIN, IOPORT_DIR_INPUT);
ioport_set_pin_dir(CONF_NRF24L01_SCK_PIN, IOPORT_DIR_OUTPUT);
ioport_set_pin_high(CONF_NRF24L01_SCK_PIN);
// Init nrf24l01 pins
ioport_set_pin_dir(CONF_NRF24L01_CE_PIN, IOPORT_DIR_OUTPUT);
ioport_set_pin_dir(CONF_NRF24L01_CSn_PIN, IOPORT_DIR_OUTPUT);
ioport_set_pin_dir(CONF_NRF24L01_IRQ_PIN, IOPORT_DIR_INPUT);
ioport_set_pin_low(CONF_NRF24L01_CE_PIN);
spi_deselect_device(&CONF_NRF24L01_SPI, &nrf24l01_spi_device_conf);
spi_master_init(&CONF_NRF24L01_SPI);
spi_master_setup_device(&CONF_NRF24L01_SPI, &nrf24l01_spi_device_conf, SPI_MODE_0, CONF_NRF24L01_CLOCK_SPEED, 0);
spi_enable(&CONF_NRF24L01_SPI);
// Wait nrf24l01 power on reset
delay_ms(Tpor);
nrf24l01_power_off();
// Reset registers to default state
nrf24l01_write_register(NRF24L01_CONFIG_REG, NRF24L01_CONFIG_REG_DEF);
nrf24l01_write_register(NRF24L01_STATUS_REG, NRF24L01_STATUS_REG_DEF);
// TODO: reset all registers
// Config parameters sets in CONF_NRF24L01
nrf24l01_set_power_amplifier(CONF_NRF24L01_PA);
nrf24l01_set_data_rate(CONF_NRF24L01_DATA_RATE);
nrf24l01_set_crc(CONF_NRF24L01_CRC);
nrf24l01_set_addr_len(CONF_NRF24L01_ADDR_LEN);
uint8_t nrf24l01_rx_addr[5] = { CONF_NRF24L01_RX_ADDR };
uint8_t nrf24l01_tx_addr[5] = { CONF_NRF24L01_TX_ADDR };
nrf24l01_set_rx_addr(nrf24l01_rx_addr);
nrf24l01_set_tx_addr(nrf24l01_tx_addr);
nrf24l01_write_register(NRF24L01_RF_CH_REG, CONF_NRF24L01_RF_CHANNEL);
nrf24l01_write_register(NRF24L01_RX_PW_P0_REG, CONF_NRF24L01_PAYLOAD);
nrf24l01_write_register(NRF24L01_RX_PW_P1_REG, CONF_NRF24L01_PAYLOAD);
// Power-up (Power Down -> Standby-I)
uint8_t configReg = nrf24l01_read_register(NRF24L01_CONFIG_REG);
nrf24l01_write_register(NRF24L01_CONFIG_REG, configReg | NRF24L01_PWR_UP_BM);
delay_us(Tpd2stby);
}
/**
* \brief Initialize EDBG SPI communication for SAM
*
*/
enum status_code adp_interface_init(void)
{
sysclk_init();
/* Configure the SPI interface */
spi_master_init(EDBG_SPI_MODULE);
spi_master_setup_device(EDBG_SPI_MODULE, &SPI_DEVICE, SPI_MODE_0,
SPI_BAUDRATE, 0);
spi_enable(EDBG_SPI_MODULE);
return STATUS_OK;
}
/**
* \brief Configure SPI
*/
void epd_spi_init(void) {
sysclk_enable_peripheral_clock(EPD_SPI_ID);
gpio_configure_pin(EPD_SPI_MISO_PIN, EPD_SPI_MISO_MUX);
ioport_disable_pin(EPD_SPI_MISO_PIN); // Disable IO (but enable peripheral mode)
gpio_configure_pin(EPD_SPI_MOSI_PIN, EPD_SPI_MOSI_MUX);
ioport_disable_pin(EPD_SPI_MOSI_PIN); // Disable IO (but enable peripheral mode)
gpio_configure_pin(EPD_SPI_CLK_PIN, EPD_SPI_CLK_MUX);
ioport_disable_pin(EPD_SPI_CLK_PIN); // Disable IO (but enable peripheral mode)
gpio_configure_pin(EPD_SPI_SS_PIN, IOPORT_INIT_HIGH | IOPORT_DIR_OUTPUT);
spi_master_init(EPD_SPI_ID);
spi_master_setup_device(EPD_SPI_ID, &epd_device_conf, SPI_MODE_0, EPD_SPI_baudrate, 0);
spi_enable(EPD_SPI_ID);
delay_ms(5);
}
void spi_task_init(void)
{
//enable the SPI interface in the Power Reduction register
spi_master_init(SPI_USB);
spi_master_setup_device(SPI_USB, &SPI_DEVICE_USB, SPI_MODE_0,
SPI_USB_DEFAULT_BAUDRATE, 0);
spi_enable(SPI_USB);
/* THIS IS JUST FOR TESTING-DEBUGGING */
// return YES;
}
void rf230_init(void)
{
//Setup SPI for Zigbee and Clear power reduction
spi_master_init(SPI_ZIGBEE);
//Setup SPI speed for Zigbee
spi_master_setup_device(SPI_ZIGBEE, &SPI_DEVICE_ZIGBEE, SPI_MODE_0,
SPI_ZIGBEE_DEFAULT_BAUDRATE, 0);
spi_enable(SPI_ZIGBEE);
radio_RF230_init();
turn_ON_CRC();
alarm_new(9, "CRC Started \0");
}
void Radio_Init()
{
transmit_lock = 0;
// disable radio during config
ioport_set_pin_low (CE);
/* IRQ */
// Enable radio interrupt. This interrupt is triggered when data are received and when a transmission completes.
ioport_configure_port_pin(&PORTC, PIN2_bm, IOPORT_PULL_UP | IOPORT_DIR_INPUT | IOPORT_SENSE_FALLING);
PORTC.INT0MASK = PIN2_bm;
PORTC.INTCTRL = PORT_INT0LVL_LO_gc;
PMIC.CTRL |= PMIC_LOLVLEN_bm;
/* CE */
ioport_configure_port_pin(&PORTC, PIN3_bm, IOPORT_INIT_HIGH | IOPORT_DIR_OUTPUT);
// A 10.3 ms delay is required between power off and power on states (controlled by 3.3 V supply).
_delay_ms(11);
/* Set up SPI */
/* Slave select */
ioport_configure_port_pin(&PORTC, PIN4_bm, IOPORT_INIT_HIGH | IOPORT_DIR_OUTPUT);
/* MOSI, MISO, SCK */
ioport_configure_port_pin(&PORTC, PIN5_bm, IOPORT_INIT_HIGH | IOPORT_DIR_OUTPUT);
ioport_configure_port_pin(&PORTC, PIN6_bm, IOPORT_DIR_INPUT);
ioport_configure_port_pin(&PORTC, PIN7_bm, IOPORT_INIT_HIGH | IOPORT_DIR_OUTPUT);
spi_master_init(&SPID);
spi_master_setup_device(&SPID, &spi_device_conf, SPI_MODE_0, 1000000, 0);
spi_enable(&SPID);
// Configure the radio registers that are not application-dependent.
configure_registers();
// A 1.5 ms delay is required between power down and power up states (controlled by PWR_UP bit in CONFIG)
_delay_ms(2);
// enable radio as a receiver
ioport_set_pin_high (CE);
}
void spi_sensor_init(void)
{
uint8_t data_buffer[3] = {0x0, 0x0, 0x0};
spi_init_pins();
spi_master_init(&SPIC);
spi_master_setup_device(&SPIC, &SPI_ADC, SPI_MODE_3, 500000, 0);
spi_enable(&SPIC);
spi_select_device(&SPIC, &SPI_ADC);
spi_write_packet(&SPIC, resetdata, 5);
//clock reg
data_buffer[0] = 0x20;
spi_write_packet(&SPIC, data_buffer, 1);
//data_buffer[0] = 0x00;
data_buffer[0] = clockreg;
spi_write_packet(&SPIC, data_buffer, 1);
//setup reg
data_buffer[0] = 0x10;
spi_write_packet(&SPIC, data_buffer, 1);
//data_buffer[0] = 0x04;
data_buffer[0] = setupreg;
spi_write_packet(&SPIC, data_buffer, 1);
//offset reg
data_buffer[0] = 0x60;
spi_write_packet(&SPIC, data_buffer, 1);
data_buffer[0] = 0x18;
data_buffer[1] = 0x3A;
data_buffer[2] = 0x00;
spi_write_packet(&SPIC, data_buffer, 3);
//gain reg
data_buffer[0] = 0x70;
spi_write_packet(&SPIC, data_buffer, 1);
data_buffer[0] = 0x89;
data_buffer[1] = 0x78;
data_buffer[2] = 0xD7;
spi_write_packet(&SPIC, data_buffer, 3);
spi_deselect_device(&SPIC, &SPI_ADC);
}
int main (void)
{
status_code_t status;
uint8_t dataTx[] = "abcd";
uint32_t mySPIselect = 1;
uint32_t myBaudRate = 1;
spi_flags_t mySPIflags = SPI_MODE_3;
struct spi_device mySPI = {
.id = 0
};
sysclk_init();
board_init();
spi_master_init( SPI0 );
spi_master_setup_device(SPI0, &mySPI, mySPIflags, myBaudRate, mySPIselect);
spi_enable( SPI0 );
for (;;)
{
status = spi_write_packet(SPI0, &dataTx[0], sizeof(dataTx));
}
}
/**
* \internal
* \brief Initialize the hardware interface
*
* Depending on what interface used for interfacing the LCD controller this
* function will initialize the necessary hardware.
*/
static void st7565r_interface_init(void)
{
#ifdef ST7565R_SERIAL_INTERFACE
spi_flags_t spi_flags = SPI_MODE_3;
board_spi_select_id_t spi_select_id = 0;
#endif
#if defined(ST7565R_USART_SPI_INTERFACE)
struct usart_spi_device device = {
.id = ST7565R_CS_PIN,
};
usart_spi_init(ST7565R_USART_SPI);
usart_spi_setup_device(ST7565R_USART_SPI, &device, spi_flags,
ST7565R_CLOCK_SPEED, spi_select_id);
#elif defined(ST7565R_SPI_INTERFACE)
struct spi_device device = {
.id = ST7565R_CS_PIN,
};
spi_master_init(ST7565R_SPI);
spi_master_setup_device(ST7565R_SPI, &device, spi_flags,
ST7565R_CLOCK_SPEED, spi_select_id);
#endif
}
/**
* \internal
* \brief Initialize the hardware interface to the controller
*
* This will initialize the module used for communication with the controller.
* Currently supported interfaces by this component driver are the SPI
* interface through either the SPI module in master mode or the USART in
* Master SPI mode. Configuration must be done in the associated
* conf_ili9341.h file.
*/
static void ili9341_interface_init(void)
{
#if defined(CONF_ILI9341_USART_SPI) || defined(CONF_ILI9341_SPI)
spi_flags_t spi_flags = SPI_MODE_0;
board_spi_select_id_t spi_select_id = 0;
#else
#error Interface for ILI9341 has not been selected or interface not\
supported, please configure component driver using the conf_ili9341.h\
file!
#endif
#if defined(CONF_ILI9341_USART_SPI)
struct usart_spi_device device = {
.id = 0,
};
usart_spi_init(CONF_ILI9341_USART_SPI);
usart_spi_setup_device(CONF_ILI9341_USART_SPI, &device, spi_flags,
CONF_ILI9341_CLOCK_SPEED, spi_select_id);
#elif defined(CONF_ILI9341_SPI)
struct spi_device device = {
.id = 0,
};
spi_master_init(CONF_ILI9341_SPI);
spi_master_setup_device(CONF_ILI9341_SPI, &device, spi_flags,
CONF_ILI9341_CLOCK_SPEED, spi_select_id);
spi_enable(CONF_ILI9341_SPI);
# if UC3
spi_set_chipselect(CONF_ILI9341_SPI, ~(1 << 0));
# if defined(ILI9341_DMA_ENABLED)
sysclk_enable_peripheral_clock(&AVR32_PDCA);
# endif
# endif
/* Send one dummy byte for the spi_is_tx_ok() to work as expected */
spi_write_single(CONF_ILI9341_SPI, 0);
#endif
}
/**
* \internal
* \brief Initialize all the display registers
*
* This function will set up all the internal registers according the the
* manufacturer's description.
*/
static void ili9341_controller_init_registers(void)
{
ili9341_send_command(ILI9341_CMD_POWER_CONTROL_A);
ili9341_send_byte(0x39);
ili9341_send_byte(0x2C);
ili9341_send_byte(0x00);
ili9341_send_byte(0x34);
ili9341_send_byte(0x02);
ili9341_wait_for_send_done();
ili9341_deselect_chip();
ili9341_send_command(ILI9341_CMD_POWER_CONTROL_B);
ili9341_send_byte(0x00);
ili9341_send_byte(0xAA);
ili9341_send_byte(0XB0);
ili9341_wait_for_send_done();
ili9341_deselect_chip();
ili9341_send_command(ILI9341_CMD_PUMP_RATIO_CONTROL);
ili9341_send_byte(0x30);
ili9341_wait_for_send_done();
ili9341_deselect_chip();
ili9341_send_command(ILI9341_CMD_POWER_CONTROL_1);
ili9341_send_byte(0x25);
ili9341_wait_for_send_done();
ili9341_deselect_chip();
ili9341_send_command(ILI9341_CMD_POWER_CONTROL_2);
ili9341_send_byte(0x11);
ili9341_wait_for_send_done();
ili9341_deselect_chip();
ili9341_send_command(ILI9341_CMD_VCOM_CONTROL_1);
ili9341_send_byte(0x5C);
ili9341_send_byte(0x4C);
ili9341_wait_for_send_done();
ili9341_deselect_chip();
ili9341_send_command(ILI9341_CMD_VCOM_CONTROL_2);
ili9341_send_byte(0x94);
ili9341_wait_for_send_done();
ili9341_deselect_chip();
ili9341_send_command(ILI9341_CMD_DRIVER_TIMING_CONTROL_A);
ili9341_send_byte(0x85);
ili9341_send_byte(0x01);
ili9341_send_byte(0x78);
ili9341_wait_for_send_done();
ili9341_deselect_chip();
ili9341_send_command(ILI9341_CMD_DRIVER_TIMING_CONTROL_B);
ili9341_send_byte(0x00);
ili9341_send_byte(0x00);
ili9341_wait_for_send_done();
ili9341_deselect_chip();
ili9341_send_command(ILI9341_CMD_COLMOD_PIXEL_FORMAT_SET);
ili9341_send_byte(0x05);
ili9341_wait_for_send_done();
ili9341_deselect_chip();
ili9341_set_orientation(0);
ili9341_set_limits(0, 0, ILI9341_DEFAULT_WIDTH,
ILI9341_DEFAULT_HEIGHT);
}
/**
* \internal
* \brief Send display commands to exit standby mode
*
* This function is used to exit the display standby mode, which is the default
* mode after a reset signal to the display.
*/
static void ili9341_exit_standby(void)
{
ili9341_send_command(ILI9341_CMD_SLEEP_OUT);
ili9341_deselect_chip();
delay_ms(150);
ili9341_send_command(ILI9341_CMD_DISPLAY_ON);
ili9341_deselect_chip();
}
/**
* /brief Initialization routine for the IMU to MCU interface
*
* /details The initialization functions calls asf spi master initialization
* and setup routines with arguments defined by setting macros found in
* conf_spi_master.h. The routine selects the IMU SPI for communication and
* the interface functions will assume that the IMU SPI is still selected.
*/
void imu_interface_init(void){
spi_master_init(SPI_IMU);
spi_master_setup_device(SPI_IMU, &SPI_DEVICE_IMU, 3, SPI_IMU_BAUDRATE, 0);
spi_enable(SPI_IMU);
spi_select_device(SPI_IMU,&SPI_DEVICE_IMU);
}
void hal_aci_tl_init(aci_pins_t *a_pins, bool debug)
{
aci_debug_print = debug;
/* Needs to be called as the first thing for proper intialization*/
m_aci_pins_set(a_pins);
/*
The SPI lines used are mapped directly to the hardware SPI
MISO MOSI and SCK
Change here if the pins are mapped differently
The SPI library assumes that the hardware pins are used
*/
spi_master_init(a_pins->spi);
struct spi_device spi_device_conf = {
.id = a_pins->reqn_pin
};
spi_master_setup_device(a_pins->spi, &spi_device_conf, SPI_MODE_0, BLUETOOTH_DATA_RATE, 0);
//Board dependent defines
#if defined (__AVR__)
//For Arduino use the LSB first
a_pins->spi->CTRL |= SPI_DORD_bm;
#elif defined(__PIC32MX__)
//For ChipKit use MSBFIRST and REVERSE the bits on the SPI as LSBFIRST is not supported
SPI.setBitOrder(MSBFIRST);
#endif
/* Initialize the ACI Command queue. This must be called after the delay above. */
aci_queue_init(&aci_tx_q);
aci_queue_init(&aci_rx_q);
//Configure the IO lines
//pinMode(a_pins->rdyn_pin, INPUT_PULLUP);
//pinMode(a_pins->reqn_pin, OUTPUT);
spi_enable(a_pins->spi);
if (UNUSED != a_pins->active_pin)
{
pinMode(a_pins->active_pin, INPUT);
}
/* Pin reset the nRF8001, required when the nRF8001 setup is being changed */
hal_aci_tl_pin_reset();
/* Set the nRF8001 to a known state as required by the datasheet*/
digitalWrite(a_pins->miso_pin, 0);
digitalWrite(a_pins->mosi_pin, 0);
digitalWrite(a_pins->reqn_pin, 1);
digitalWrite(a_pins->sck_pin, 0);
delay(30); //Wait for the nRF8001 to get hold of its lines - the lines float for a few ms after the reset
/* Attach the interrupt to the RDYN line as requested by the caller */
if (a_pins->interface_is_interrupt)
{
// We use the LOW level of the RDYN line as the atmega328 can wakeup from sleep only on LOW
attachInterrupt(a_pins->interrupt_number, m_aci_isr, LOW);
}
}
bool hal_aci_tl_send(hal_aci_data_t *p_aci_cmd)
{
const uint8_t length = p_aci_cmd->buffer[0];
bool ret_val = false;
if (length > HAL_ACI_MAX_LENGTH)
{
return false;
}
ret_val = aci_queue_enqueue(&aci_tx_q, p_aci_cmd);
if (ret_val)
{
if(!aci_queue_is_full(&aci_rx_q))
{
// Lower the REQN only when successfully enqueued
m_aci_reqn_enable();
}
if (aci_debug_print)
{
//Serial.print("C"); //ACI Command
m_aci_data_print(p_aci_cmd);
}
}
return ret_val;
}
static uint8_t spi_readwrite(const uint8_t aci_byte)
{
//Board dependent defines
#if defined (__AVR__)
//For Arduino the transmission does not have to be reversed
return spi_readwrite_xmega(aci_byte);
#elif defined(__PIC32MX__)
//For ChipKit the transmission has to be reversed
uint8_t tmp_bits;
tmp_bits = SPI.transfer(REVERSE_BITS(aci_byte));
return REVERSE_BITS(tmp_bits);
#endif
}
bool hal_aci_tl_rx_q_empty (void)
{
return aci_queue_is_empty(&aci_rx_q);
}
bool hal_aci_tl_rx_q_full (void)
{
return aci_queue_is_full(&aci_rx_q);
}
bool hal_aci_tl_tx_q_empty (void)
{
return aci_queue_is_empty(&aci_tx_q);
}
bool hal_aci_tl_tx_q_full (void)
{
return aci_queue_is_full(&aci_tx_q);
}
void hal_aci_tl_q_flush (void)
{
m_aci_q_flush();
}
/**
* \internal
* \brief Initialize the hardware interface to the controller
*
* This will initialize the module used for communication with the controller.
* Currently supported interfaces by this component driver are the SPI
* interface through either the SPI module in master mode or the USART in
* Master SPI mode. Configuration must be done in the associated
* conf_ili9341.h file.
*/
static void ili9341_interface_init(void)
{
#if defined(CONF_ILI9341_USART_SPI) || defined(CONF_ILI9341_SPI)
spi_flags_t spi_flags = SPI_MODE_0;
board_spi_select_id_t spi_select_id = 0;
#else
#error Interface for ILI9341 has not been selected or interface not\
supported, please configure component driver using the conf_ili9341.h\
file!
#endif
#if defined(CONF_ILI9341_USART_SPI)
struct usart_spi_device device = {
.id = 0,
};
usart_spi_init(CONF_ILI9341_USART_SPI);
usart_spi_setup_device(CONF_ILI9341_USART_SPI, &device, spi_flags,
CONF_ILI9341_CLOCK_SPEED, spi_select_id);
#elif defined(CONF_ILI9341_SPI)
struct spi_device device = {
.id = 0,
};
spi_master_init(CONF_ILI9341_SPI);
spi_master_setup_device(CONF_ILI9341_SPI, &device, spi_flags,
CONF_ILI9341_CLOCK_SPEED, spi_select_id);
spi_enable(CONF_ILI9341_SPI);
# if UC3
spi_set_chipselect(CONF_ILI9341_SPI, ~(1 << 0));
# if defined(ILI9341_DMA_ENABLED)
sysclk_enable_peripheral_clock(&AVR32_PDCA);
# endif
# endif
/* Send one dummy byte for the spi_is_tx_ok() to work as expected */
spi_write_single(CONF_ILI9341_SPI, 0);
#endif
}
/**
* \internal
* \brief Initialize all the display registers
*
* This function will set up all the internal registers according the the
* manufacturer's description.
*/
static void ili9341_controller_init_registers(void)
{
ili9341_send_command(0xEF);
ili9341_send_byte(0x03);
ili9341_send_byte(0x80);
ili9341_send_byte(0x02);
ili9341_wait_for_send_done();
ili9341_deselect_chip();
ili9341_send_command(0xCF);
ili9341_send_byte(0x00);
ili9341_send_byte(0xC1);
ili9341_send_byte(0x30);
ili9341_wait_for_send_done();
ili9341_deselect_chip();
ili9341_send_command(0xED);
ili9341_send_byte(0x64);
ili9341_send_byte(0x03);
ili9341_send_byte(0x12);
ili9341_send_byte(0x81);
ili9341_wait_for_send_done();
ili9341_deselect_chip();
ili9341_send_command(0xE8);
ili9341_send_byte(0x85);
ili9341_send_byte(0x00);
ili9341_send_byte(0x78);
ili9341_wait_for_send_done();
ili9341_deselect_chip();
ili9341_send_command(0xCB);
ili9341_send_byte(0x39);
ili9341_send_byte(0x2C);
ili9341_send_byte(0x00);
ili9341_send_byte(0x34);
ili9341_send_byte(0x02);
ili9341_wait_for_send_done();
ili9341_deselect_chip();
ili9341_send_command(0xF7);
ili9341_send_byte(0x20);
ili9341_wait_for_send_done();
ili9341_deselect_chip();
ili9341_send_command(0xEA);
ili9341_send_byte(0x00);
ili9341_send_byte(0x00);
ili9341_wait_for_send_done();
ili9341_deselect_chip();
ili9341_send_command(0xC0);
ili9341_send_byte(0x23);
ili9341_wait_for_send_done();
ili9341_deselect_chip();
ili9341_send_command(0xC1);
ili9341_send_byte(0x10);
ili9341_wait_for_send_done();
ili9341_deselect_chip();
ili9341_send_command(0xC5);
ili9341_send_byte(0x3E);
ili9341_send_byte(0x28);
ili9341_wait_for_send_done();
ili9341_deselect_chip();
ili9341_send_command(0xC7);
ili9341_send_byte(0x86);
ili9341_wait_for_send_done();
ili9341_deselect_chip();
ili9341_send_command(0x36);
ili9341_send_byte(0x48);
ili9341_wait_for_send_done();
ili9341_deselect_chip();
ili9341_send_command(0x3A);
ili9341_send_byte(0x55);
ili9341_wait_for_send_done();
ili9341_deselect_chip();
ili9341_send_command(0xB1);
ili9341_send_byte(0x00);
ili9341_send_byte(0x18);
ili9341_wait_for_send_done();
ili9341_deselect_chip();
ili9341_send_command(0xB6);
ili9341_send_byte(0x08);
ili9341_send_byte(0x82);
ili9341_send_byte(0x27);
ili9341_wait_for_send_done();
ili9341_deselect_chip();
ili9341_send_command(0xF2);
ili9341_send_byte(0x00);
ili9341_wait_for_send_done();
ili9341_deselect_chip();
ili9341_send_command(0x26);
ili9341_send_byte(0x01);
ili9341_wait_for_send_done();
ili9341_deselect_chip();
ili9341_send_command(0xE0);
ili9341_send_byte(0x0F);
ili9341_send_byte(0x31);
ili9341_send_byte(0x2B);
ili9341_send_byte(0x0C);
ili9341_send_byte(0x0E);
ili9341_send_byte(0x08);
ili9341_send_byte(0x4E);
ili9341_send_byte(0xF1);
ili9341_send_byte(0x37);
ili9341_send_byte(0x07);
ili9341_send_byte(0x10);
ili9341_send_byte(0x03);
ili9341_send_byte(0x0E);
ili9341_send_byte(0x09);
ili9341_send_byte(0x00);
ili9341_wait_for_send_done();
ili9341_deselect_chip();
ili9341_send_command(0xE1);
ili9341_send_byte(0x00);
ili9341_send_byte(0x0E);
ili9341_send_byte(0x14);
ili9341_send_byte(0x03);
ili9341_send_byte(0x11);
ili9341_send_byte(0x07);
ili9341_send_byte(0x31);
ili9341_send_byte(0xC1);
ili9341_send_byte(0x48);
ili9341_send_byte(0x08);
ili9341_send_byte(0x0F);
ili9341_send_byte(0x0C);
ili9341_send_byte(0x31);
ili9341_send_byte(0x36);
ili9341_send_byte(0x0F);
ili9341_wait_for_send_done();
ili9341_deselect_chip();
// ili9341_send_command(ILI9341_CMD_POWER_CONTROL_A);
// ili9341_send_byte(0x39);
// ili9341_send_byte(0x2C);
// ili9341_send_byte(0x00);
// ili9341_send_byte(0x34);
// ili9341_send_byte(0x02);
// ili9341_wait_for_send_done();
// ili9341_deselect_chip();
// ili9341_send_command(ILI9341_CMD_POWER_CONTROL_B);
// ili9341_send_byte(0x00);
// ili9341_send_byte(0xAA);
// ili9341_send_byte(0XB0);
// ili9341_wait_for_send_done();
// ili9341_deselect_chip();
// ili9341_send_command(ILI9341_CMD_PUMP_RATIO_CONTROL);
// ili9341_send_byte(0x30);
// ili9341_wait_for_send_done();
// ili9341_deselect_chip();
// ili9341_send_command(ILI9341_CMD_POWER_CONTROL_1);
// ili9341_send_byte(0x25);
// ili9341_wait_for_send_done();
// ili9341_deselect_chip();
// ili9341_send_command(ILI9341_CMD_POWER_CONTROL_2);
// ili9341_send_byte(0x11);
// ili9341_wait_for_send_done();
// ili9341_deselect_chip();
// ili9341_send_command(ILI9341_CMD_VCOM_CONTROL_1);
// ili9341_send_byte(0x5C);
// ili9341_send_byte(0x4C);
// ili9341_wait_for_send_done();
// ili9341_deselect_chip();
// ili9341_send_command(ILI9341_CMD_VCOM_CONTROL_2);
// ili9341_send_byte(0x94);
// ili9341_wait_for_send_done();
// ili9341_deselect_chip();
// ili9341_send_command(ILI9341_CMD_DRIVER_TIMING_CONTROL_A);
// ili9341_send_byte(0x85);
// ili9341_send_byte(0x01);
// ili9341_send_byte(0x78);
// ili9341_wait_for_send_done();
// ili9341_deselect_chip();
// ili9341_send_command(ILI9341_CMD_DRIVER_TIMING_CONTROL_B);
// ili9341_send_byte(0x00);
// ili9341_send_byte(0x00);
// ili9341_wait_for_send_done();
// ili9341_deselect_chip();
// ili9341_send_command(ILI9341_CMD_COLMOD_PIXEL_FORMAT_SET);
// ili9341_send_byte(0x05);
// ili9341_wait_for_send_done();
// ili9341_deselect_chip();
ili9341_set_orientation(0);
ili9341_set_limits(0, 0, ILI9341_DEFAULT_WIDTH,
ILI9341_DEFAULT_HEIGHT);
}
void ili9341_enter_standby(void) {
ili9341_send_command(ILI9341_CMD_ENTER_SLEEP_MODE);
ili9341_deselect_chip();
}
void ENC28J60_Init(volatile avr32_spi_t *spi, uint8_t spiDeviceId, spi_flags_t spiFlags, uint32_t spiBaudrate, uint8_t* macaddr)
{
spiDevice.id = spiDeviceId;
avr32SPI = spi;
spi_master_init(avr32SPI);
spi_master_setup_device(avr32SPI, &spiDevice, spiFlags, spiBaudrate, spiDevice.id);
spi_enable(avr32SPI);
ENC28J60_WriteOp(ENC28J60_SOFT_RESET, 0, ENC28J60_SOFT_RESET);
while(!(ENC28J60_Read(ESTAT) & ESTAT_CLKRDY));
// do bank 0 stuff
// initialize receive buffer
// 16-bit transfers, must write low byte first
// set receive buffer start address
nextPacketPtr = RXSTARTBUFFER;
// Rx start
ENC28J60_Write(ERXSTL, RXSTARTBUFFER&0xFF);
ENC28J60_Write(ERXSTH, RXSTARTBUFFER>>8);
// set receive pointer address
ENC28J60_Write(ERXRDPTL, RXSTARTBUFFER&0xFF);
ENC28J60_Write(ERXRDPTH, RXSTARTBUFFER>>8);
// RX end
ENC28J60_Write(ERXNDL, RXSTOPBUFFER&0xFF);
ENC28J60_Write(ERXNDH, RXSTOPBUFFER>>8);
// TX start
ENC28J60_Write(ETXSTL, TXSTART_INIT&0xFF);
ENC28J60_Write(ETXSTH, TXSTART_INIT>>8);
// TX end
ENC28J60_Write(ETXNDL, TXSTOP_INIT&0xFF);
ENC28J60_Write(ETXNDH, TXSTOP_INIT>>8);
// do bank 1 stuff, packet filter:
// For broadcast packets we allow only ARP packtets
// All other packets should be unicast only for our mac (MAADR)
//
// The pattern to match on is therefore
// Type ETH.DST
// ARP BROADCAST
// 06 08 -- ff ff ff ff ff ff -> ip checksum for theses bytes=f7f9
// in binary these poitions are:11 0000 0011 1111
// This is hex 303F->EPMM0=0x3f,EPMM1=0x30
ENC28J60_Write(ERXFCON, ERXFCON_UCEN|ERXFCON_CRCEN|ERXFCON_PMEN);
ENC28J60_Write(EPMM0, 0x3f);
ENC28J60_Write(EPMM1, 0x30);
ENC28J60_Write(EPMCSL, 0xf9);
ENC28J60_Write(EPMCSH, 0xf7);
//
//
// do bank 2 stuff
// enable MAC receive
ENC28J60_Write(MACON1, MACON1_MARXEN|MACON1_TXPAUS|MACON1_RXPAUS);
// bring MAC out of reset
ENC28J60_Write(MACON2, 0x00);
// enable automatic padding to 60bytes and CRC operations
ENC28J60_WriteOp(ENC28J60_BIT_FIELD_SET, MACON3, MACON3_PADCFG0|MACON3_TXCRCEN|MACON3_FRMLNEN);
// set inter-frame gap (non-back-to-back)
ENC28J60_Write(MAIPGL, 0x12);
ENC28J60_Write(MAIPGH, 0x0C);
// set inter-frame gap (back-to-back)
ENC28J60_Write(MABBIPG, 0x12);
// Set the maximum packet size which the controller will accept
// Do not send packets longer than MAX_FRAMELEN:
ENC28J60_Write(MAMXFLL, MAX_FRAMELEN&0xFF);
ENC28J60_Write(MAMXFLH, MAX_FRAMELEN>>8);
// do bank 3 stuff
// write MAC address
// NOTE: MAC address in ENC28J60 is byte-backward
ENC28J60_Write(MAADR5, macaddr[0]);
ENC28J60_Write(MAADR4, macaddr[1]);
ENC28J60_Write(MAADR3, macaddr[2]);
ENC28J60_Write(MAADR2, macaddr[3]);
ENC28J60_Write(MAADR1, macaddr[4]);
ENC28J60_Write(MAADR0, macaddr[5]);
// no loopback of transmitted frames
ENC28J60_PhyRegisterWrite(PHCON2, PHCON2_HDLDIS);
// switch to bank 0
ENC28J60_SetBank(ECON1);
// enable interrutps
ENC28J60_WriteOp(ENC28J60_BIT_FIELD_SET, EIE, EIE_INTIE|EIE_PKTIE);
// enable packet reception
ENC28J60_WriteOp(ENC28J60_BIT_FIELD_SET, ECON1, ECON1_RXEN);
// MagJack LED config
// LEDA=greed LEDB=yellow
//
// 0x880 is PHLCON LEDB=on, LEDA=on
// enc28j60PhyWrite(PHLCON,0b0000 1000 1000 00 00);
ENC28J60_PhyRegisterWrite(PHLCON,0x880);
//
// 0x990 is PHLCON LEDB=off, LEDA=off
// enc28j60PhyWrite(PHLCON,0b0000 1001 1001 00 00);
ENC28J60_PhyRegisterWrite(PHLCON,0x990);
//
// 0x880 is PHLCON LEDB=on, LEDA=on
// enc28j60PhyWrite(PHLCON,0b0000 1000 1000 00 00);
ENC28J60_PhyRegisterWrite(PHLCON,0x880);
//
// 0x990 is PHLCON LEDB=off, LEDA=off
// enc28j60PhyWrite(PHLCON,0b0000 1001 1001 00 00);
ENC28J60_PhyRegisterWrite(PHLCON,0x990);
//
// 0x476 is PHLCON LEDA=links status, LEDB=receive/transmit
// enc28j60PhyWrite(PHLCON,0b0000 0100 0111 01 10);
ENC28J60_PhyRegisterWrite(PHLCON,0x476);
}