//_________________________________________________ INITIALIZE SPI
//
void DWM1000_Anchor::initSpi() {
LOG<< "Init SPI "<<FLUSH;
spi_init(HSPI);
spi_mode(HSPI, 0, 0);
// spi_clock(HSPI, SPI_CLK_PREDIV, SPI_CLK_CNTDIV);
spi_clock(HSPI, 10, 20);//
// spi_tx_byte_order(HSPI, SPI_BYTE_ORDER_HIGH_TO_LOW);
// spi_rx_byte_order(HSPI, SPI_BYTE_ORDER_HIGH_TO_LOW);
spi_tx_byte_order(HSPI, SPI_BYTE_ORDER_LOW_TO_HIGH);
spi_rx_byte_order(HSPI, SPI_BYTE_ORDER_LOW_TO_HIGH);
spi_set_bit_order(0);
WRITE_PERI_REG(SPI_CTRL2(HSPI), 0xFFFFFFFF);
WRITE_PERI_REG(SPI_CTRL2(HSPI),
(( 0xF & SPI_CS_DELAY_NUM ) << SPI_CS_DELAY_NUM_S) |//
(( 0x1 & SPI_CS_DELAY_MODE) << SPI_CS_DELAY_MODE_S) |//
(( 0xF & SPI_SETUP_TIME )<< SPI_SETUP_TIME_S ) |//
(( 0xF & SPI_HOLD_TIME )<< SPI_HOLD_TIME_S ) |//
(( 0xF & SPI_CK_OUT_LOW_MODE )<< SPI_CK_OUT_LOW_MODE_S ) |//
(( 0xF & SPI_CK_OUT_HIGH_MODE )<< SPI_CK_OUT_HIGH_MODE_S ) |//
(( 0x7 & SPI_MOSI_DELAY_NUM ) << SPI_MOSI_DELAY_NUM_S) |//
(( 0x7 & SPI_MISO_DELAY_NUM ) << SPI_MISO_DELAY_NUM_S) |//
(( 0x1 & SPI_MOSI_DELAY_MODE )<< SPI_MOSI_DELAY_MODE_S ) |//
(( 0x1 & SPI_MISO_DELAY_MODE )<< SPI_MISO_DELAY_MODE_S ) |//
0);
}
static void spi_init(void) {
/* Initialize the SPI pins: SCK & MOSI as outputs, MISO as input */
SPI_DDR |= SCK_PIN | MOSI_PIN;
SPI_DDR &= ~MISO_PIN;
/* At least temporarily SS must also be configured as output before
* setting MSTR or else the SPI logic may immediately force it clear */
SPI_DDR |= SS_PIN;
/* Enable SPI Master, MSB, SPI mode 0, FOSC/2 */
spi_mode(0);
}
int main(){
int fd = spi_open("/dev/spidev0.0");
spi_mode(fd, SPI_MODE_1);
// spi_mode(fd, SPI_NO_CS | SPI_MODE_2);
spi_speed(fd, MHZ_32);
dumpstat("SPI device 0: ",fd);
// uint16_t command = MCP3208_START_BIT | MCP3208_SINGLE_ENDED
printf("size %d\n", sizeof(MCP_CHAN_7));
// uint32_t foo = MCP_CHAN_7;
// uint32_t mcp_tx = ((uint32_t)MCP_CHAN_7) << 14;
// uint32_t mcp_rx = 0;
uint8_t tx[] = {1,8 + 0 << 4,0,0};
uint8_t rx[4] = {0};
struct spi_ioc_transfer mcp_tr ={
.tx_buf = (unsigned long)&tx,
.rx_buf = (unsigned long)&rx,
.len = 4,
.delay_usecs = 0,
.speed_hz = KHZ_500,
.bits_per_word = 8,
};
while(1){
spi_transfer(fd, &mcp_tr, 1);
// printf ("B "BYTETOBINARYPATTERN" ", BYTETOBINARY(mcp_tx >> 24));
// printf (""BYTETOBINARYPATTERN" ", BYTETOBINARY(mcp_tx >> 16));
// printf (""BYTETOBINARYPATTERN" ", BYTETOBINARY(mcp_tx >> 8));
// printf (""BYTETOBINARYPATTERN" ", BYTETOBINARY(mcp_tx));
// printf("\tbuf_tx: %u\n", mcp_tx);
// mcp_rx |= 0xff000000;
// mcp_rx &= 0x00ffffff;
// mcp_rx = mcp_rx >> 0;
uint32_t ret = 0;
ret |= (uint32_t)rx[3];
ret |= (uint32_t)rx[2] << 8;
ret |= (uint32_t)rx[1] << 16;
// ret |= (uint32_t)rx[0] << 24;
print_byte(rx[0]);
print_byte(rx[1]);
print_byte(rx[2]);
print_byte(rx[3]);
printf(" rx %d", ret >> 6);
printf("\n");
// printf("%d\n", rx);
// printf ("\nA "BYTETOBINARYPATTERN" ", BYTETOBINARY(mcp_rx >> 24));
// printf (""BYTETOBINARYPATTERN" ", BYTETOBINARY(mcp_rx >> 16));
// printf (""BYTETOBINARYPATTERN" ", BYTETOBINARY(mcp_rx >> 8));
// printf (""BYTETOBINARYPATTERN" ", BYTETOBINARY(mcp_rx));
// printf("\tbuf_rx: %u\n", mcp_rx);
nanosleep(&requested,&remaining);
}
// uint16_t command = get_mcp_channel_command(0);
// printf ("Byte 00 "BYTETOBINARYPATTERN"\n", BYTETOBINARY((uint8_t)command));
// printf ("Byte 01 "BYTETOBINARYPATTERN"\n", BYTETOBINARY((uint8_t)command >> 8));
// printf ("Byte 00 "BYTETOBINARYPATTERN"\n", BYTETOBINARY((uint8_t)0x8));
// printf ("Byte 01 "BYTETOBINARYPATTERN"\n", BYTETOBINARY((uint8_t)0x10));
// printf("command %d %s\n", command, &buf);
// dumpstat("SPI device 0: ",fd);
spi_close(fd);
}
static void print_byte(uint8_t byte){
printf (""BYTETOBINARYPATTERN" ", BYTETOBINARY(byte));
}